1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -enable-machine-outliner -mtriple=msp430-unknown-linux < %s | FileCheck %s
3
4; NOTE: Machine outliner doesn't run.
5@x = global i32 0, align 4
6
7define dso_local i32 @check_boundaries() #0 {
8; CHECK-LABEL: check_boundaries:
9; CHECK:       ; %bb.0:
10; CHECK-NEXT:    push r4
11; CHECK-NEXT:    mov r1, r4
12; CHECK-NEXT:    sub #20, r1
13; CHECK-NEXT:    clr -6(r4)
14; CHECK-NEXT:    clr -8(r4)
15; CHECK-NEXT:    clr -2(r4)
16; CHECK-NEXT:    clr -4(r4)
17; CHECK-NEXT:    clr r12
18; CHECK-NEXT:    tst r12
19; CHECK-NEXT:    jeq .LBB0_2
20; CHECK-NEXT:  ; %bb.1:
21; CHECK-NEXT:    clr -14(r4)
22; CHECK-NEXT:    mov #1, -16(r4)
23; CHECK-NEXT:    jmp .LBB0_3
24; CHECK-NEXT:  .LBB0_2:
25; CHECK-NEXT:    clr -10(r4)
26; CHECK-NEXT:    mov #2, -12(r4)
27; CHECK-NEXT:    clr -6(r4)
28; CHECK-NEXT:    mov #1, -8(r4)
29; CHECK-NEXT:    clr -14(r4)
30; CHECK-NEXT:    mov #3, -16(r4)
31; CHECK-NEXT:    clr -18(r4)
32; CHECK-NEXT:    mov #4, -20(r4)
33; CHECK-NEXT:  .LBB0_3:
34; CHECK-NEXT:    mov -8(r4), r12
35; CHECK-NEXT:    bis -6(r4), r12
36; CHECK-NEXT:    tst r12
37; CHECK-NEXT:    jeq .LBB0_5
38; CHECK-NEXT:  ; %bb.4:
39; CHECK-NEXT:    clr -14(r4)
40; CHECK-NEXT:    mov #1, -16(r4)
41; CHECK-NEXT:    jmp .LBB0_6
42; CHECK-NEXT:  .LBB0_5:
43; CHECK-NEXT:    clr -10(r4)
44; CHECK-NEXT:    mov #2, -12(r4)
45; CHECK-NEXT:    clr -6(r4)
46; CHECK-NEXT:    mov #1, -8(r4)
47; CHECK-NEXT:    clr -14(r4)
48; CHECK-NEXT:    mov #3, -16(r4)
49; CHECK-NEXT:    clr -18(r4)
50; CHECK-NEXT:    mov #4, -20(r4)
51; CHECK-NEXT:  .LBB0_6:
52; CHECK-NEXT:    clr r12
53; CHECK-NEXT:    clr r13
54; CHECK-NEXT:    add #20, r1
55; CHECK-NEXT:    pop r4
56; CHECK-NEXT:    ret
57  %1 = alloca i32, align 4
58  %2 = alloca i32, align 4
59  %3 = alloca i32, align 4
60  %4 = alloca i32, align 4
61  %5 = alloca i32, align 4
62  store i32 0, i32* %1, align 4
63  store i32 0, i32* %2, align 4
64  %6 = load i32, i32* %2, align 4
65  %7 = icmp ne i32 %6, 0
66  br i1 %7, label %9, label %8
67
68  store i32 1, i32* %2, align 4
69  store i32 2, i32* %3, align 4
70  store i32 3, i32* %4, align 4
71  store i32 4, i32* %5, align 4
72  br label %10
73
74  store i32 1, i32* %4, align 4
75  br label %10
76
77  %11 = load i32, i32* %2, align 4
78  %12 = icmp ne i32 %11, 0
79  br i1 %12, label %14, label %13
80
81  store i32 1, i32* %2, align 4
82  store i32 2, i32* %3, align 4
83  store i32 3, i32* %4, align 4
84  store i32 4, i32* %5, align 4
85  br label %15
86
87  store i32 1, i32* %4, align 4
88  br label %15
89
90  ret i32 0
91}
92
93define dso_local i32 @main() #0 {
94; CHECK-LABEL: main:
95; CHECK:       ; %bb.0:
96; CHECK-NEXT:    push r4
97; CHECK-NEXT:    mov r1, r4
98; CHECK-NEXT:    sub #20, r1
99; CHECK-NEXT:    clr &x+2
100; CHECK-NEXT:    mov #1, &x
101; CHECK-NEXT:    clr -2(r4)
102; CHECK-NEXT:    clr -4(r4)
103; CHECK-NEXT:    clr -6(r4)
104; CHECK-NEXT:    mov #1, -8(r4)
105; CHECK-NEXT:    clr -10(r4)
106; CHECK-NEXT:    mov #2, -12(r4)
107; CHECK-NEXT:    clr -14(r4)
108; CHECK-NEXT:    mov #3, -16(r4)
109; CHECK-NEXT:    clr -18(r4)
110; CHECK-NEXT:    mov #4, -20(r4)
111; CHECK-NEXT:    ;APP
112; CHECK-NEXT:    ;NO_APP
113; CHECK-NEXT:    clr -10(r4)
114; CHECK-NEXT:    mov #2, -12(r4)
115; CHECK-NEXT:    clr -6(r4)
116; CHECK-NEXT:    mov #1, -8(r4)
117; CHECK-NEXT:    clr -14(r4)
118; CHECK-NEXT:    mov #3, -16(r4)
119; CHECK-NEXT:    clr -18(r4)
120; CHECK-NEXT:    mov #4, -20(r4)
121; CHECK-NEXT:    clr r12
122; CHECK-NEXT:    clr r13
123; CHECK-NEXT:    add #20, r1
124; CHECK-NEXT:    pop r4
125; CHECK-NEXT:    ret
126  %1 = alloca i32, align 4
127  %2 = alloca i32, align 4
128  %3 = alloca i32, align 4
129  %4 = alloca i32, align 4
130  %5 = alloca i32, align 4
131
132  store i32 0, i32* %1, align 4
133  store i32 0, i32* @x, align 4
134  store i32 1, i32* %2, align 4
135  store i32 2, i32* %3, align 4
136  store i32 3, i32* %4, align 4
137  store i32 4, i32* %5, align 4
138  store i32 1, i32* @x, align 4
139  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
140  store i32 1, i32* %2, align 4
141  store i32 2, i32* %3, align 4
142  store i32 3, i32* %4, align 4
143  store i32 4, i32* %5, align 4
144  ret i32 0
145}
146
147attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
148