1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --include-generated-funcs
2; RUN: llc -enable-machine-outliner -mtriple=msp430-unknown-linux < %s | FileCheck %s
3
4; NOTE: Machine outliner doesn't run.
5@x = global i32 0, align 4
6
7define dso_local i32 @check_boundaries() #0 {
8  %1 = alloca i32, align 4
9  %2 = alloca i32, align 4
10  %3 = alloca i32, align 4
11  %4 = alloca i32, align 4
12  %5 = alloca i32, align 4
13  store i32 0, i32* %1, align 4
14  store i32 0, i32* %2, align 4
15  %6 = load i32, i32* %2, align 4
16  %7 = icmp ne i32 %6, 0
17  br i1 %7, label %9, label %8
18
19  store i32 1, i32* %2, align 4
20  store i32 2, i32* %3, align 4
21  store i32 3, i32* %4, align 4
22  store i32 4, i32* %5, align 4
23  br label %10
24
25  store i32 1, i32* %4, align 4
26  br label %10
27
28  %11 = load i32, i32* %2, align 4
29  %12 = icmp ne i32 %11, 0
30  br i1 %12, label %14, label %13
31
32  store i32 1, i32* %2, align 4
33  store i32 2, i32* %3, align 4
34  store i32 3, i32* %4, align 4
35  store i32 4, i32* %5, align 4
36  br label %15
37
38  store i32 1, i32* %4, align 4
39  br label %15
40
41  ret i32 0
42}
43
44define dso_local i32 @main() #0 {
45  %1 = alloca i32, align 4
46  %2 = alloca i32, align 4
47  %3 = alloca i32, align 4
48  %4 = alloca i32, align 4
49  %5 = alloca i32, align 4
50
51  store i32 0, i32* %1, align 4
52  store i32 0, i32* @x, align 4
53  store i32 1, i32* %2, align 4
54  store i32 2, i32* %3, align 4
55  store i32 3, i32* %4, align 4
56  store i32 4, i32* %5, align 4
57  store i32 1, i32* @x, align 4
58  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
59  store i32 1, i32* %2, align 4
60  store i32 2, i32* %3, align 4
61  store i32 3, i32* %4, align 4
62  store i32 4, i32* %5, align 4
63  ret i32 0
64}
65
66attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
67; CHECK-LABEL: check_boundaries:
68; CHECK:       ; %bb.0:
69; CHECK-NEXT:    push r4
70; CHECK-NEXT:    mov r1, r4
71; CHECK-NEXT:    sub #20, r1
72; CHECK-NEXT:    clr -6(r4)
73; CHECK-NEXT:    clr -8(r4)
74; CHECK-NEXT:    clr -2(r4)
75; CHECK-NEXT:    clr -4(r4)
76; CHECK-NEXT:    clr r12
77; CHECK-NEXT:    tst r12
78; CHECK-NEXT:    jeq .LBB0_2
79; CHECK-NEXT:  ; %bb.1:
80; CHECK-NEXT:    clr -14(r4)
81; CHECK-NEXT:    mov #1, -16(r4)
82; CHECK-NEXT:    jmp .LBB0_3
83; CHECK-NEXT:  .LBB0_2:
84; CHECK-NEXT:    clr -10(r4)
85; CHECK-NEXT:    mov #2, -12(r4)
86; CHECK-NEXT:    clr -6(r4)
87; CHECK-NEXT:    mov #1, -8(r4)
88; CHECK-NEXT:    clr -14(r4)
89; CHECK-NEXT:    mov #3, -16(r4)
90; CHECK-NEXT:    clr -18(r4)
91; CHECK-NEXT:    mov #4, -20(r4)
92; CHECK-NEXT:  .LBB0_3:
93; CHECK-NEXT:    mov -8(r4), r12
94; CHECK-NEXT:    bis -6(r4), r12
95; CHECK-NEXT:    tst r12
96; CHECK-NEXT:    jeq .LBB0_5
97; CHECK-NEXT:  ; %bb.4:
98; CHECK-NEXT:    clr -14(r4)
99; CHECK-NEXT:    mov #1, -16(r4)
100; CHECK-NEXT:    jmp .LBB0_6
101; CHECK-NEXT:  .LBB0_5:
102; CHECK-NEXT:    clr -10(r4)
103; CHECK-NEXT:    mov #2, -12(r4)
104; CHECK-NEXT:    clr -6(r4)
105; CHECK-NEXT:    mov #1, -8(r4)
106; CHECK-NEXT:    clr -14(r4)
107; CHECK-NEXT:    mov #3, -16(r4)
108; CHECK-NEXT:    clr -18(r4)
109; CHECK-NEXT:    mov #4, -20(r4)
110; CHECK-NEXT:  .LBB0_6:
111; CHECK-NEXT:    clr r12
112; CHECK-NEXT:    clr r13
113; CHECK-NEXT:    add #20, r1
114; CHECK-NEXT:    pop r4
115; CHECK-NEXT:    ret
116;
117; CHECK-LABEL: main:
118; CHECK:       ; %bb.0:
119; CHECK-NEXT:    push r4
120; CHECK-NEXT:    mov r1, r4
121; CHECK-NEXT:    sub #20, r1
122; CHECK-NEXT:    clr &x+2
123; CHECK-NEXT:    mov #1, &x
124; CHECK-NEXT:    clr -2(r4)
125; CHECK-NEXT:    clr -4(r4)
126; CHECK-NEXT:    clr -6(r4)
127; CHECK-NEXT:    mov #1, -8(r4)
128; CHECK-NEXT:    clr -10(r4)
129; CHECK-NEXT:    mov #2, -12(r4)
130; CHECK-NEXT:    clr -14(r4)
131; CHECK-NEXT:    mov #3, -16(r4)
132; CHECK-NEXT:    clr -18(r4)
133; CHECK-NEXT:    mov #4, -20(r4)
134; CHECK-NEXT:    ;APP
135; CHECK-NEXT:    ;NO_APP
136; CHECK-NEXT:    clr -10(r4)
137; CHECK-NEXT:    mov #2, -12(r4)
138; CHECK-NEXT:    clr -6(r4)
139; CHECK-NEXT:    mov #1, -8(r4)
140; CHECK-NEXT:    clr -14(r4)
141; CHECK-NEXT:    mov #3, -16(r4)
142; CHECK-NEXT:    clr -18(r4)
143; CHECK-NEXT:    mov #4, -20(r4)
144; CHECK-NEXT:    clr r12
145; CHECK-NEXT:    clr r13
146; CHECK-NEXT:    add #20, r1
147; CHECK-NEXT:    pop r4
148; CHECK-NEXT:    ret
149