1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -enable-machine-outliner -mtriple=arm-unknown-linux < %s | FileCheck %s 3@x = global i32 0, align 4 4 5define dso_local i32 @check_boundaries() #0 { 6; CHECK-LABEL: check_boundaries: 7; CHECK: @ %bb.0: 8; CHECK-NEXT: sub sp, sp, #20 9; CHECK-NEXT: mov r0, #0 10; CHECK-NEXT: cmp r0, #0 11; CHECK-NEXT: str r0, [sp, #12] 12; CHECK-NEXT: str r0, [sp, #16] 13; CHECK-NEXT: beq .LBB0_2 14; CHECK-NEXT: @ %bb.1: 15; CHECK-NEXT: mov r0, #1 16; CHECK-NEXT: str r0, [sp, #4] 17; CHECK-NEXT: b .LBB0_3 18; CHECK-NEXT: .LBB0_2: 19; CHECK-NEXT: mov r1, lr 20; CHECK-NEXT: bl OUTLINED_FUNCTION_0 21; CHECK-NEXT: mov lr, r1 22; CHECK-NEXT: .LBB0_3: 23; CHECK-NEXT: ldr r0, [sp, #12] 24; CHECK-NEXT: cmp r0, #0 25; CHECK-NEXT: beq .LBB0_5 26; CHECK-NEXT: @ %bb.4: 27; CHECK-NEXT: mov r0, #1 28; CHECK-NEXT: str r0, [sp, #4] 29; CHECK-NEXT: b .LBB0_6 30; CHECK-NEXT: .LBB0_5: 31; CHECK-NEXT: mov r1, lr 32; CHECK-NEXT: bl OUTLINED_FUNCTION_0 33; CHECK-NEXT: mov lr, r1 34; CHECK-NEXT: .LBB0_6: 35; CHECK-NEXT: mov r0, #0 36; CHECK-NEXT: add sp, sp, #20 37; CHECK-NEXT: mov pc, lr 38 %1 = alloca i32, align 4 39 %2 = alloca i32, align 4 40 %3 = alloca i32, align 4 41 %4 = alloca i32, align 4 42 %5 = alloca i32, align 4 43 store i32 0, i32* %1, align 4 44 store i32 0, i32* %2, align 4 45 %6 = load i32, i32* %2, align 4 46 %7 = icmp ne i32 %6, 0 47 br i1 %7, label %9, label %8 48 49 store i32 1, i32* %2, align 4 50 store i32 2, i32* %3, align 4 51 store i32 3, i32* %4, align 4 52 store i32 4, i32* %5, align 4 53 br label %10 54 55 store i32 1, i32* %4, align 4 56 br label %10 57 58 %11 = load i32, i32* %2, align 4 59 %12 = icmp ne i32 %11, 0 60 br i1 %12, label %14, label %13 61 62 store i32 1, i32* %2, align 4 63 store i32 2, i32* %3, align 4 64 store i32 3, i32* %4, align 4 65 store i32 4, i32* %5, align 4 66 br label %15 67 68 store i32 1, i32* %4, align 4 69 br label %15 70 71 ret i32 0 72} 73 74define dso_local i32 @main() #0 { 75; CHECK-LABEL: main: 76; CHECK: @ %bb.0: 77; CHECK-NEXT: sub sp, sp, #20 78; CHECK-NEXT: ldr r0, .LCPI1_0 79; CHECK-NEXT: mov r1, #1 80; CHECK-NEXT: mov r2, #3 81; CHECK-NEXT: mov r3, #4 82; CHECK-NEXT: str r1, [sp, #12] 83; CHECK-NEXT: str r1, [r0] 84; CHECK-NEXT: mov r0, #0 85; CHECK-NEXT: str r0, [sp, #16] 86; CHECK-NEXT: mov r0, #2 87; CHECK-NEXT: str r0, [sp, #8] 88; CHECK-NEXT: str r2, [sp, #4] 89; CHECK-NEXT: str r3, [sp] 90; CHECK-NEXT: @APP 91; CHECK-NEXT: @NO_APP 92; CHECK-NEXT: str r0, [sp, #8] 93; CHECK-NEXT: mov r0, #0 94; CHECK-NEXT: str r1, [sp, #12] 95; CHECK-NEXT: str r2, [sp, #4] 96; CHECK-NEXT: str r3, [sp] 97; CHECK-NEXT: add sp, sp, #20 98; CHECK-NEXT: mov pc, lr 99; CHECK-NEXT: .p2align 2 100; CHECK-NEXT: @ %bb.1: 101; CHECK-NEXT: .LCPI1_0: 102; CHECK-NEXT: .long x 103 %1 = alloca i32, align 4 104 %2 = alloca i32, align 4 105 %3 = alloca i32, align 4 106 %4 = alloca i32, align 4 107 %5 = alloca i32, align 4 108 109 store i32 0, i32* %1, align 4 110 store i32 0, i32* @x, align 4 111 store i32 1, i32* %2, align 4 112 store i32 2, i32* %3, align 4 113 store i32 3, i32* %4, align 4 114 store i32 4, i32* %5, align 4 115 store i32 1, i32* @x, align 4 116 call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() 117 store i32 1, i32* %2, align 4 118 store i32 2, i32* %3, align 4 119 store i32 3, i32* %4, align 4 120 store i32 4, i32* %5, align 4 121 ret i32 0 122} 123 124attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" } 125