1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -enable-machine-outliner -mtriple=amdgcn-adm-amdhsa < %s | FileCheck %s
3
4; NOTE: Machine outliner doesn't run.
5@x = dso_local global i32 0, align 4
6
7define dso_local i32 @check_boundaries() #0 {
8; CHECK-LABEL: check_boundaries:
9; CHECK:       check_boundaries$local:
10; CHECK-NEXT:  ; %bb.0:
11; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12; CHECK-NEXT:    s_mov_b32 s4, s33
13; CHECK-NEXT:    s_mov_b32 s33, s32
14; CHECK-NEXT:    v_mov_b32_e32 v0, 0
15; CHECK-NEXT:    s_mov_b32 s33, s4
16; CHECK-NEXT:    s_setpc_b64 s[30:31]
17  %1 = alloca i32, align 4, addrspace(5)
18  %2 = alloca i32, align 4, addrspace(5)
19  %3 = alloca i32, align 4, addrspace(5)
20  %4 = alloca i32, align 4, addrspace(5)
21  %5 = alloca i32, align 4, addrspace(5)
22  store i32 0, i32 addrspace(5)* %1, align 4
23  store i32 0, i32 addrspace(5)* %2, align 4
24  %6 = load i32, i32 addrspace(5)* %2, align 4
25  %7 = icmp ne i32 %6, 0
26  br i1 %7, label %9, label %8
27
28  store i32 1, i32 addrspace(5)* %2, align 4
29  store i32 2, i32 addrspace(5)* %3, align 4
30  store i32 3, i32 addrspace(5)* %4, align 4
31  store i32 4, i32 addrspace(5)* %5, align 4
32  br label %10
33
34  store i32 1, i32 addrspace(5)* %4, align 4
35  br label %10
36
37  %11 = load i32, i32 addrspace(5)* %2, align 4
38  %12 = icmp ne i32 %11, 0
39  br i1 %12, label %14, label %13
40
41  store i32 1, i32 addrspace(5)* %2, align 4
42  store i32 2, i32 addrspace(5)* %3, align 4
43  store i32 3, i32 addrspace(5)* %4, align 4
44  store i32 4, i32 addrspace(5)* %5, align 4
45  br label %15
46
47  store i32 1, i32 addrspace(5)* %4, align 4
48  br label %15
49
50  ret i32 0
51}
52
53define dso_local i32 @main() #0 {
54; CHECK-LABEL: main:
55; CHECK:       main$local:
56; CHECK-NEXT:  ; %bb.0:
57; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
58; CHECK-NEXT:    s_mov_b32 s6, s33
59; CHECK-NEXT:    s_mov_b32 s33, s32
60; CHECK-NEXT:    s_getpc_b64 s[4:5]
61; CHECK-NEXT:    s_add_u32 s4, s4, x@rel32@lo+4
62; CHECK-NEXT:    s_addc_u32 s5, s5, x@rel32@hi+12
63; CHECK-NEXT:    v_mov_b32_e32 v2, 1
64; CHECK-NEXT:    v_mov_b32_e32 v0, s4
65; CHECK-NEXT:    v_mov_b32_e32 v1, s5
66; CHECK-NEXT:    flat_store_dword v[0:1], v2
67; CHECK-NEXT:    ;;#ASMSTART
68; CHECK-NEXT:    ;;#ASMEND
69; CHECK-NEXT:    v_mov_b32_e32 v0, 0
70; CHECK-NEXT:    s_mov_b32 s33, s6
71; CHECK-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
72; CHECK-NEXT:    s_setpc_b64 s[30:31]
73  %1 = alloca i32, align 4, addrspace(5)
74  %2 = alloca i32, align 4, addrspace(5)
75  %3 = alloca i32, align 4, addrspace(5)
76  %4 = alloca i32, align 4, addrspace(5)
77  %5 = alloca i32, align 4, addrspace(5)
78
79  store i32 0, i32 addrspace(5)* %1, align 4
80  store i32 0, i32* @x, align 4
81  store i32 1, i32 addrspace(5)* %2, align 4
82  store i32 2, i32 addrspace(5)* %3, align 4
83  store i32 3, i32 addrspace(5)* %4, align 4
84  store i32 4, i32 addrspace(5)* %5, align 4
85  store i32 1, i32* @x, align 4
86  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
87  store i32 1, i32 addrspace(5)* %2, align 4
88  store i32 2, i32 addrspace(5)* %3, align 4
89  store i32 3, i32 addrspace(5)* %4, align 4
90  store i32 4, i32 addrspace(5)* %5, align 4
91  ret i32 0
92}
93
94attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
95