1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -basic-aa -slp-vectorizer -mtriple=x86_64-apple-macosx10.9.0 -mcpu=corei7-avx -S < %s | FileCheck %s 3target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" 4target triple = "x86_64-apple-macosx10.9.0" 5 6 7; This test used to crash because we were following phi chains incorrectly. 8; We used indices to get the incoming value of two phi nodes rather than 9; incoming block lookup. 10; This can give wrong results when the ordering of incoming 11; edges in the two phi nodes don't match. 12 13%0 = type { %1, %2 } 14%1 = type { double, double } 15%2 = type { double, double } 16 17 18;define fastcc void @bar() { 19define void @bar() { 20; CHECK-LABEL: @bar( 21; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[TMP0:%.*]], %0* undef, i64 0, i32 1, i32 0 22; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 1 23; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 0 24; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 1 25; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 0 26; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 1 27; CHECK-NEXT: br label [[TMP7:%.*]] 28; CHECK: 7: 29; CHECK-NEXT: [[TMP8:%.*]] = phi <2 x double> [ <double 1.800000e+01, double 2.800000e+01>, [[TMP0]] ], [ [[TMP11:%.*]], [[TMP21:%.*]] ], [ [[TMP11]], [[TMP18:%.*]] ], [ [[TMP11]], [[TMP18]] ] 30; CHECK-NEXT: [[TMP9:%.*]] = bitcast double* [[TMP1]] to <2 x double>* 31; CHECK-NEXT: store <2 x double> [[TMP8]], <2 x double>* [[TMP9]], align 8 32; CHECK-NEXT: [[TMP10:%.*]] = bitcast double* [[TMP3]] to <2 x double>* 33; CHECK-NEXT: [[TMP11]] = load <2 x double>, <2 x double>* [[TMP10]], align 8 34; CHECK-NEXT: br i1 undef, label [[TMP12:%.*]], label [[TMP13:%.*]] 35; CHECK: 12: 36; CHECK-NEXT: ret void 37; CHECK: 13: 38; CHECK-NEXT: [[TMP14:%.*]] = bitcast double* [[TMP5]] to <2 x double>* 39; CHECK-NEXT: store <2 x double> [[TMP11]], <2 x double>* [[TMP14]], align 8 40; CHECK-NEXT: br i1 undef, label [[TMP15:%.*]], label [[TMP16:%.*]] 41; CHECK: 15: 42; CHECK-NEXT: br label [[TMP16]] 43; CHECK: 16: 44; CHECK-NEXT: br i1 undef, label [[TMP17:%.*]], label [[TMP18]] 45; CHECK: 17: 46; CHECK-NEXT: unreachable 47; CHECK: 18: 48; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x double> [[TMP11]], i32 0 49; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x double> [[TMP11]], i32 1 50; CHECK-NEXT: switch i32 undef, label [[TMP21]] [ 51; CHECK-NEXT: i32 32, label [[TMP7]] 52; CHECK-NEXT: i32 103, label [[TMP7]] 53; CHECK-NEXT: ] 54; CHECK: 21: 55; CHECK-NEXT: br i1 undef, label [[TMP7]], label [[TMP22:%.*]] 56; CHECK: 22: 57; CHECK-NEXT: unreachable 58; 59 %1 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0 60 %2 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1 61 %3 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0 62 %4 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1 63 %5 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0 64 %6 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1 65 br label %7 66 67; <label>:7 ; preds = %18, %17, %17, %0 68 %8 = phi double [ 2.800000e+01, %0 ], [ %11, %18 ], [ %11, %17 ], [ %11, %17 ] 69 %9 = phi double [ 1.800000e+01, %0 ], [ %10, %18 ], [ %10, %17 ], [ %10, %17 ] 70 store double %9, double* %1, align 8 71 store double %8, double* %2, align 8 72 %10 = load double, double* %3, align 8 73 %11 = load double, double* %4, align 8 74 br i1 undef, label %12, label %13 75 76; <label>:12 ; preds = %7 77 ret void 78 79; <label>:13 ; preds = %7 80 store double %10, double* %5, align 8 81 store double %11, double* %6, align 8 82 br i1 undef, label %14, label %15 83 84; <label>:14 ; preds = %13 85 br label %15 86 87; <label>:15 ; preds = %14, %13 88 br i1 undef, label %16, label %17 89 90; <label>:16 ; preds = %15 91 unreachable 92 93; <label>:17 ; preds = %15 94 switch i32 undef, label %18 [ 95 i32 32, label %7 96 i32 103, label %7 97 ] 98 99; <label>:18 ; preds = %17 100 br i1 undef, label %7, label %19 101 102; <label>:19 ; preds = %18 103 unreachable 104} 105