1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -basic-aa -slp-vectorizer -mtriple=x86_64-apple-macosx10.9.0 -mcpu=corei7-avx -S < %s | FileCheck %s 3target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" 4target triple = "x86_64-apple-macosx10.9.0" 5 6 7; This test used to crash because we were following phi chains incorrectly. 8; We used indices to get the incoming value of two phi nodes rather than 9; incoming block lookup. 10; This can give wrong results when the ordering of incoming 11; edges in the two phi nodes don't match. 12 13%0 = type { %1, %2 } 14%1 = type { double, double } 15%2 = type { double, double } 16 17 18;define fastcc void @bar() { 19define void @bar() { 20; CHECK-LABEL: @bar( 21; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[TMP0:%.*]], %0* undef, i64 0, i32 1, i32 0 22; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 0 23; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 0 24; CHECK-NEXT: br label [[TMP4:%.*]] 25; CHECK: 4: 26; CHECK-NEXT: [[TMP5:%.*]] = phi <2 x double> [ <double 1.800000e+01, double 2.800000e+01>, [[TMP0]] ], [ [[TMP8:%.*]], [[TMP16:%.*]] ], [ [[TMP8]], [[TMP15:%.*]] ], [ [[TMP8]], [[TMP15]] ] 27; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[TMP1]] to <2 x double>* 28; CHECK-NEXT: store <2 x double> [[TMP5]], <2 x double>* [[TMP6]], align 8 29; CHECK-NEXT: [[TMP7:%.*]] = bitcast double* [[TMP2]] to <2 x double>* 30; CHECK-NEXT: [[TMP8]] = load <2 x double>, <2 x double>* [[TMP7]], align 8 31; CHECK-NEXT: br i1 undef, label [[TMP9:%.*]], label [[TMP10:%.*]] 32; CHECK: 9: 33; CHECK-NEXT: ret void 34; CHECK: 10: 35; CHECK-NEXT: [[TMP11:%.*]] = bitcast double* [[TMP3]] to <2 x double>* 36; CHECK-NEXT: store <2 x double> [[TMP8]], <2 x double>* [[TMP11]], align 8 37; CHECK-NEXT: br i1 undef, label [[TMP12:%.*]], label [[TMP13:%.*]] 38; CHECK: 12: 39; CHECK-NEXT: br label [[TMP13]] 40; CHECK: 13: 41; CHECK-NEXT: br i1 undef, label [[TMP14:%.*]], label [[TMP15]] 42; CHECK: 14: 43; CHECK-NEXT: unreachable 44; CHECK: 15: 45; CHECK-NEXT: switch i32 undef, label [[TMP16]] [ 46; CHECK-NEXT: i32 32, label [[TMP4]] 47; CHECK-NEXT: i32 103, label [[TMP4]] 48; CHECK-NEXT: ] 49; CHECK: 16: 50; CHECK-NEXT: br i1 undef, label [[TMP4]], label [[TMP17:%.*]] 51; CHECK: 17: 52; CHECK-NEXT: unreachable 53; 54 %1 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0 55 %2 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1 56 %3 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0 57 %4 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1 58 %5 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0 59 %6 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1 60 br label %7 61 62; <label>:7 ; preds = %18, %17, %17, %0 63 %8 = phi double [ 2.800000e+01, %0 ], [ %11, %18 ], [ %11, %17 ], [ %11, %17 ] 64 %9 = phi double [ 1.800000e+01, %0 ], [ %10, %18 ], [ %10, %17 ], [ %10, %17 ] 65 store double %9, double* %1, align 8 66 store double %8, double* %2, align 8 67 %10 = load double, double* %3, align 8 68 %11 = load double, double* %4, align 8 69 br i1 undef, label %12, label %13 70 71; <label>:12 ; preds = %7 72 ret void 73 74; <label>:13 ; preds = %7 75 store double %10, double* %5, align 8 76 store double %11, double* %6, align 8 77 br i1 undef, label %14, label %15 78 79; <label>:14 ; preds = %13 80 br label %15 81 82; <label>:15 ; preds = %14, %13 83 br i1 undef, label %16, label %17 84 85; <label>:16 ; preds = %15 86 unreachable 87 88; <label>:17 ; preds = %15 89 switch i32 undef, label %18 [ 90 i32 32, label %7 91 i32 103, label %7 92 ] 93 94; <label>:18 ; preds = %17 95 br i1 undef, label %7, label %19 96 97; <label>:19 ; preds = %18 98 unreachable 99} 100