1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -slp-vectorizer -slp-threshold=-5 -S -pass-remarks-output=%t < %s | FileCheck %s
3; RUN: cat %t | FileCheck -check-prefix=YAML %s
4
5
6; FIXME: The threshold is changed to keep this test case a bit smaller.
7; The AArch64 cost model should not give such high costs to select statements.
8
9target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
10target triple = "aarch64--linux"
11
12; YAML:      --- !Passed
13; YAML-NEXT: Pass:            slp-vectorizer
14; YAML-NEXT: Name:            VectorizedHorizontalReduction
15; YAML-NEXT: Function:        test_select
16; YAML-NEXT: Args:
17; YAML-NEXT:   - String:          'Vectorized horizontal reduction with cost '
18; YAML-NEXT:   - Cost:            '-19'
19; YAML-NEXT:   - String:          ' and with tree size '
20; YAML-NEXT:   - TreeSize:        '8'
21
22define i32 @test_select(i32* noalias nocapture readonly %blk1, i32* noalias nocapture readonly %blk2, i32 %lx, i32 %h) {
23; CHECK-LABEL: @test_select(
24; CHECK-NEXT:  entry:
25; CHECK-NEXT:    [[CMP_22:%.*]] = icmp sgt i32 [[H:%.*]], 0
26; CHECK-NEXT:    br i1 [[CMP_22]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
27; CHECK:       for.body.lr.ph:
28; CHECK-NEXT:    [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64
29; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
30; CHECK:       for.body:
31; CHECK-NEXT:    [[S_026:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[FOR_BODY]] ]
32; CHECK-NEXT:    [[J_025:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
33; CHECK-NEXT:    [[P2_024:%.*]] = phi i32* [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR29:%.*]], [[FOR_BODY]] ]
34; CHECK-NEXT:    [[P1_023:%.*]] = phi i32* [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[FOR_BODY]] ]
35; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32* [[P1_023]] to <4 x i32>*
36; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
37; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32* [[P2_024]] to <4 x i32>*
38; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4
39; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw <4 x i32> [[TMP1]], [[TMP3]]
40; CHECK-NEXT:    [[TMP5:%.*]] = icmp slt <4 x i32> [[TMP4]], zeroinitializer
41; CHECK-NEXT:    [[TMP6:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP4]]
42; CHECK-NEXT:    [[TMP7:%.*]] = select <4 x i1> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP4]]
43; CHECK-NEXT:    [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP7]])
44; CHECK-NEXT:    [[OP_RDX]] = add i32 [[TMP8]], [[S_026]]
45; CHECK-NEXT:    [[ADD_PTR]] = getelementptr inbounds i32, i32* [[P1_023]], i64 [[IDX_EXT]]
46; CHECK-NEXT:    [[ADD_PTR29]] = getelementptr inbounds i32, i32* [[P2_024]], i64 [[IDX_EXT]]
47; CHECK-NEXT:    [[INC]] = add nuw nsw i32 [[J_025]], 1
48; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[H]]
49; CHECK-NEXT:    br i1 [[EXITCOND]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY]]
50; CHECK:       for.end.loopexit:
51; CHECK-NEXT:    br label [[FOR_END]]
52; CHECK:       for.end:
53; CHECK-NEXT:    [[S_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ]
54; CHECK-NEXT:    ret i32 [[S_0_LCSSA]]
55;
56entry:
57  %cmp.22 = icmp sgt i32 %h, 0
58  br i1 %cmp.22, label %for.body.lr.ph, label %for.end
59
60for.body.lr.ph:                                   ; preds = %entry
61  %idx.ext = sext i32 %lx to i64
62  br label %for.body
63
64for.body:                                         ; preds = %for.body, %for.body.lr.ph
65  %s.026 = phi i32 [ 0, %for.body.lr.ph ], [ %add27, %for.body ]
66  %j.025 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
67  %p2.024 = phi i32* [ %blk2, %for.body.lr.ph ], [ %add.ptr29, %for.body ]
68  %p1.023 = phi i32* [ %blk1, %for.body.lr.ph ], [ %add.ptr, %for.body ]
69  %0 = load i32, i32* %p1.023, align 4
70  %1 = load i32, i32* %p2.024, align 4
71  %sub = sub nsw i32 %0, %1
72  %cmp2 = icmp slt i32 %sub, 0
73  %sub3 = sub nsw i32 0, %sub
74  %sub3.sub = select i1 %cmp2, i32 %sub3, i32 %sub
75  %add = add nsw i32 %sub3.sub, %s.026
76  %arrayidx4 = getelementptr inbounds i32, i32* %p1.023, i64 1
77  %2 = load i32, i32* %arrayidx4, align 4
78  %arrayidx5 = getelementptr inbounds i32, i32* %p2.024, i64 1
79  %3 = load i32, i32* %arrayidx5, align 4
80  %sub6 = sub nsw i32 %2, %3
81  %cmp7 = icmp slt i32 %sub6, 0
82  %sub9 = sub nsw i32 0, %sub6
83  %v.1 = select i1 %cmp7, i32 %sub9, i32 %sub6
84  %add11 = add nsw i32 %add, %v.1
85  %arrayidx12 = getelementptr inbounds i32, i32* %p1.023, i64 2
86  %4 = load i32, i32* %arrayidx12, align 4
87  %arrayidx13 = getelementptr inbounds i32, i32* %p2.024, i64 2
88  %5 = load i32, i32* %arrayidx13, align 4
89  %sub14 = sub nsw i32 %4, %5
90  %cmp15 = icmp slt i32 %sub14, 0
91  %sub17 = sub nsw i32 0, %sub14
92  %sub17.sub14 = select i1 %cmp15, i32 %sub17, i32 %sub14
93  %add19 = add nsw i32 %add11, %sub17.sub14
94  %arrayidx20 = getelementptr inbounds i32, i32* %p1.023, i64 3
95  %6 = load i32, i32* %arrayidx20, align 4
96  %arrayidx21 = getelementptr inbounds i32, i32* %p2.024, i64 3
97  %7 = load i32, i32* %arrayidx21, align 4
98  %sub22 = sub nsw i32 %6, %7
99  %cmp23 = icmp slt i32 %sub22, 0
100  %sub25 = sub nsw i32 0, %sub22
101  %v.3 = select i1 %cmp23, i32 %sub25, i32 %sub22
102  %add27 = add nsw i32 %add19, %v.3
103  %add.ptr = getelementptr inbounds i32, i32* %p1.023, i64 %idx.ext
104  %add.ptr29 = getelementptr inbounds i32, i32* %p2.024, i64 %idx.ext
105  %inc = add nuw nsw i32 %j.025, 1
106  %exitcond = icmp eq i32 %inc, %h
107  br i1 %exitcond, label %for.end.loopexit, label %for.body
108
109for.end.loopexit:                                 ; preds = %for.body
110  br label %for.end
111
112for.end:                                          ; preds = %for.end.loopexit, %entry
113  %s.0.lcssa = phi i32 [ 0, %entry ], [ %add27, %for.end.loopexit ]
114  ret i32 %s.0.lcssa
115}
116
117;; Check whether SLP can find a reduction phi whose incoming blocks are not
118;; the same as the block containing the phi.
119;;
120;; Came from code like,
121;;
122;; int s = 0;
123;; for (int j = 0; j < h; j++) {
124;;   s += p1[0] * p2[0]
125;;   s += p1[1] * p2[1];
126;;   s += p1[2] * p2[2];
127;;   s += p1[3] * p2[3];
128;;   if (s >= lim)
129;;      break;
130;;   p1 += lx;
131;;   p2 += lx;
132;; }
133define i32 @reduction_with_br(i32* noalias nocapture readonly %blk1, i32* noalias nocapture readonly %blk2, i32 %lx, i32 %h, i32 %lim) {
134; YAML:      --- !Passed
135; YAML-NEXT: Pass:            slp-vectorizer
136; YAML-NEXT: Name:            VectorizedHorizontalReduction
137; YAML-NEXT: Function:        reduction_with_br
138; YAML-NEXT: Args:
139; YAML-NEXT:   - String:          'Vectorized horizontal reduction with cost '
140; YAML-NEXT:   - Cost:            '-10'
141; YAML-NEXT:   - String:          ' and with tree size '
142; YAML-NEXT:   - TreeSize:        '3'
143; CHECK-LABEL: @reduction_with_br(
144; CHECK-NEXT:  entry:
145; CHECK-NEXT:    [[CMP_16:%.*]] = icmp sgt i32 [[H:%.*]], 0
146; CHECK-NEXT:    br i1 [[CMP_16]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
147; CHECK:       for.body.lr.ph:
148; CHECK-NEXT:    [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64
149; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
150; CHECK:       for.body:
151; CHECK-NEXT:    [[S_020:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[IF_END:%.*]] ]
152; CHECK-NEXT:    [[J_019:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[IF_END]] ]
153; CHECK-NEXT:    [[P2_018:%.*]] = phi i32* [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR16:%.*]], [[IF_END]] ]
154; CHECK-NEXT:    [[P1_017:%.*]] = phi i32* [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[IF_END]] ]
155; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32* [[P1_017]] to <4 x i32>*
156; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
157; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32* [[P2_018]] to <4 x i32>*
158; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4
159; CHECK-NEXT:    [[TMP4:%.*]] = mul nsw <4 x i32> [[TMP3]], [[TMP1]]
160; CHECK-NEXT:    [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]])
161; CHECK-NEXT:    [[OP_RDX]] = add i32 [[TMP5]], [[S_020]]
162; CHECK-NEXT:    [[CMP14:%.*]] = icmp slt i32 [[OP_RDX]], [[LIM:%.*]]
163; CHECK-NEXT:    br i1 [[CMP14]], label [[IF_END]], label [[FOR_END_LOOPEXIT:%.*]]
164; CHECK:       if.end:
165; CHECK-NEXT:    [[ADD_PTR]] = getelementptr inbounds i32, i32* [[P1_017]], i64 [[IDX_EXT]]
166; CHECK-NEXT:    [[ADD_PTR16]] = getelementptr inbounds i32, i32* [[P2_018]], i64 [[IDX_EXT]]
167; CHECK-NEXT:    [[INC]] = add nuw nsw i32 [[J_019]], 1
168; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[INC]], [[H]]
169; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT]]
170; CHECK:       for.end.loopexit:
171; CHECK-NEXT:    br label [[FOR_END]]
172; CHECK:       for.end:
173; CHECK-NEXT:    [[S_1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ]
174; CHECK-NEXT:    ret i32 [[S_1]]
175;
176entry:
177  %cmp.16 = icmp sgt i32 %h, 0
178  br i1 %cmp.16, label %for.body.lr.ph, label %for.end
179
180for.body.lr.ph:                                   ; preds = %entry
181  %idx.ext = sext i32 %lx to i64
182  br label %for.body
183
184for.body:                                         ; preds = %for.body.lr.ph, %if.end
185  %s.020 = phi i32 [ 0, %for.body.lr.ph ], [ %add13, %if.end ]
186  %j.019 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %if.end ]
187  %p2.018 = phi i32* [ %blk2, %for.body.lr.ph ], [ %add.ptr16, %if.end ]
188  %p1.017 = phi i32* [ %blk1, %for.body.lr.ph ], [ %add.ptr, %if.end ]
189  %0 = load i32, i32* %p1.017, align 4
190  %1 = load i32, i32* %p2.018, align 4
191  %mul = mul nsw i32 %1, %0
192  %add = add nsw i32 %mul, %s.020
193  %arrayidx2 = getelementptr inbounds i32, i32* %p1.017, i64 1
194  %2 = load i32, i32* %arrayidx2, align 4
195  %arrayidx3 = getelementptr inbounds i32, i32* %p2.018, i64 1
196  %3 = load i32, i32* %arrayidx3, align 4
197  %mul4 = mul nsw i32 %3, %2
198  %add5 = add nsw i32 %add, %mul4
199  %arrayidx6 = getelementptr inbounds i32, i32* %p1.017, i64 2
200  %4 = load i32, i32* %arrayidx6, align 4
201  %arrayidx7 = getelementptr inbounds i32, i32* %p2.018, i64 2
202  %5 = load i32, i32* %arrayidx7, align 4
203  %mul8 = mul nsw i32 %5, %4
204  %add9 = add nsw i32 %add5, %mul8
205  %arrayidx10 = getelementptr inbounds i32, i32* %p1.017, i64 3
206  %6 = load i32, i32* %arrayidx10, align 4
207  %arrayidx11 = getelementptr inbounds i32, i32* %p2.018, i64 3
208  %7 = load i32, i32* %arrayidx11, align 4
209  %mul12 = mul nsw i32 %7, %6
210  %add13 = add nsw i32 %add9, %mul12
211  %cmp14 = icmp slt i32 %add13, %lim
212  br i1 %cmp14, label %if.end, label %for.end.loopexit
213
214if.end:                                           ; preds = %for.body
215  %add.ptr = getelementptr inbounds i32, i32* %p1.017, i64 %idx.ext
216  %add.ptr16 = getelementptr inbounds i32, i32* %p2.018, i64 %idx.ext
217  %inc = add nuw nsw i32 %j.019, 1
218  %cmp = icmp slt i32 %inc, %h
219  br i1 %cmp, label %for.body, label %for.end.loopexit
220
221for.end.loopexit:                                 ; preds = %for.body, %if.end
222  br label %for.end
223
224for.end:                                          ; preds = %for.end.loopexit, %entry
225  %s.1 = phi i32 [ 0, %entry ], [ %add13, %for.end.loopexit ]
226  ret i32 %s.1
227}
228
229; YAML:      --- !Passed
230; YAML-NEXT: Pass:            slp-vectorizer
231; YAML-NEXT: Name:            VectorizedHorizontalReduction
232; YAML-NEXT: Function:        test_unrolled_select
233; YAML-NEXT: Args:
234; YAML-NEXT:   - String:          'Vectorized horizontal reduction with cost '
235; YAML-NEXT:   - Cost:            '-36'
236; YAML-NEXT:   - String:          ' and with tree size '
237; YAML-NEXT:   - TreeSize:        '10'
238
239define i32 @test_unrolled_select(i8* noalias nocapture readonly %blk1, i8* noalias nocapture readonly %blk2, i32 %lx, i32 %h, i32 %lim) #0 {
240; CHECK-LABEL: @test_unrolled_select(
241; CHECK-NEXT:  entry:
242; CHECK-NEXT:    [[CMP_43:%.*]] = icmp sgt i32 [[H:%.*]], 0
243; CHECK-NEXT:    br i1 [[CMP_43]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
244; CHECK:       for.body.lr.ph:
245; CHECK-NEXT:    [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64
246; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
247; CHECK:       for.body:
248; CHECK-NEXT:    [[S_047:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[IF_END_86:%.*]] ]
249; CHECK-NEXT:    [[J_046:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[IF_END_86]] ]
250; CHECK-NEXT:    [[P2_045:%.*]] = phi i8* [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR88:%.*]], [[IF_END_86]] ]
251; CHECK-NEXT:    [[P1_044:%.*]] = phi i8* [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[IF_END_86]] ]
252; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i8* [[P1_044]] to <8 x i8>*
253; CHECK-NEXT:    [[TMP1:%.*]] = load <8 x i8>, <8 x i8>* [[TMP0]], align 1
254; CHECK-NEXT:    [[TMP2:%.*]] = zext <8 x i8> [[TMP1]] to <8 x i32>
255; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i8* [[P2_045]] to <8 x i8>*
256; CHECK-NEXT:    [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[TMP3]], align 1
257; CHECK-NEXT:    [[TMP5:%.*]] = zext <8 x i8> [[TMP4]] to <8 x i32>
258; CHECK-NEXT:    [[TMP6:%.*]] = sub nsw <8 x i32> [[TMP2]], [[TMP5]]
259; CHECK-NEXT:    [[TMP7:%.*]] = icmp slt <8 x i32> [[TMP6]], zeroinitializer
260; CHECK-NEXT:    [[TMP8:%.*]] = sub nsw <8 x i32> zeroinitializer, [[TMP6]]
261; CHECK-NEXT:    [[TMP9:%.*]] = select <8 x i1> [[TMP7]], <8 x i32> [[TMP8]], <8 x i32> [[TMP6]]
262; CHECK-NEXT:    [[TMP10:%.*]] = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> [[TMP9]])
263; CHECK-NEXT:    [[OP_RDX]] = add i32 [[TMP10]], [[S_047]]
264; CHECK-NEXT:    [[CMP83:%.*]] = icmp slt i32 [[OP_RDX]], [[LIM:%.*]]
265; CHECK-NEXT:    br i1 [[CMP83]], label [[IF_END_86]], label [[FOR_END_LOOPEXIT:%.*]]
266; CHECK:       if.end.86:
267; CHECK-NEXT:    [[ADD_PTR]] = getelementptr inbounds i8, i8* [[P1_044]], i64 [[IDX_EXT]]
268; CHECK-NEXT:    [[ADD_PTR88]] = getelementptr inbounds i8, i8* [[P2_045]], i64 [[IDX_EXT]]
269; CHECK-NEXT:    [[INC]] = add nuw nsw i32 [[J_046]], 1
270; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[INC]], [[H]]
271; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT]]
272; CHECK:       for.end.loopexit:
273; CHECK-NEXT:    br label [[FOR_END]]
274; CHECK:       for.end:
275; CHECK-NEXT:    [[S_1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ]
276; CHECK-NEXT:    ret i32 [[S_1]]
277;
278entry:
279  %cmp.43 = icmp sgt i32 %h, 0
280  br i1 %cmp.43, label %for.body.lr.ph, label %for.end
281
282for.body.lr.ph:                                   ; preds = %entry
283  %idx.ext = sext i32 %lx to i64
284  br label %for.body
285
286for.body:                                         ; preds = %for.body.lr.ph, %if.end.86
287  %s.047 = phi i32 [ 0, %for.body.lr.ph ], [ %add82, %if.end.86 ]
288  %j.046 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %if.end.86 ]
289  %p2.045 = phi i8* [ %blk2, %for.body.lr.ph ], [ %add.ptr88, %if.end.86 ]
290  %p1.044 = phi i8* [ %blk1, %for.body.lr.ph ], [ %add.ptr, %if.end.86 ]
291  %0 = load i8, i8* %p1.044, align 1
292  %conv = zext i8 %0 to i32
293  %1 = load i8, i8* %p2.045, align 1
294  %conv2 = zext i8 %1 to i32
295  %sub = sub nsw i32 %conv, %conv2
296  %cmp3 = icmp slt i32 %sub, 0
297  %sub5 = sub nsw i32 0, %sub
298  %sub5.sub = select i1 %cmp3, i32 %sub5, i32 %sub
299  %add = add nsw i32 %sub5.sub, %s.047
300  %arrayidx6 = getelementptr inbounds i8, i8* %p1.044, i64 1
301  %2 = load i8, i8* %arrayidx6, align 1
302  %conv7 = zext i8 %2 to i32
303  %arrayidx8 = getelementptr inbounds i8, i8* %p2.045, i64 1
304  %3 = load i8, i8* %arrayidx8, align 1
305  %conv9 = zext i8 %3 to i32
306  %sub10 = sub nsw i32 %conv7, %conv9
307  %cmp11 = icmp slt i32 %sub10, 0
308  %sub14 = sub nsw i32 0, %sub10
309  %v.1 = select i1 %cmp11, i32 %sub14, i32 %sub10
310  %add16 = add nsw i32 %add, %v.1
311  %arrayidx17 = getelementptr inbounds i8, i8* %p1.044, i64 2
312  %4 = load i8, i8* %arrayidx17, align 1
313  %conv18 = zext i8 %4 to i32
314  %arrayidx19 = getelementptr inbounds i8, i8* %p2.045, i64 2
315  %5 = load i8, i8* %arrayidx19, align 1
316  %conv20 = zext i8 %5 to i32
317  %sub21 = sub nsw i32 %conv18, %conv20
318  %cmp22 = icmp slt i32 %sub21, 0
319  %sub25 = sub nsw i32 0, %sub21
320  %sub25.sub21 = select i1 %cmp22, i32 %sub25, i32 %sub21
321  %add27 = add nsw i32 %add16, %sub25.sub21
322  %arrayidx28 = getelementptr inbounds i8, i8* %p1.044, i64 3
323  %6 = load i8, i8* %arrayidx28, align 1
324  %conv29 = zext i8 %6 to i32
325  %arrayidx30 = getelementptr inbounds i8, i8* %p2.045, i64 3
326  %7 = load i8, i8* %arrayidx30, align 1
327  %conv31 = zext i8 %7 to i32
328  %sub32 = sub nsw i32 %conv29, %conv31
329  %cmp33 = icmp slt i32 %sub32, 0
330  %sub36 = sub nsw i32 0, %sub32
331  %v.3 = select i1 %cmp33, i32 %sub36, i32 %sub32
332  %add38 = add nsw i32 %add27, %v.3
333  %arrayidx39 = getelementptr inbounds i8, i8* %p1.044, i64 4
334  %8 = load i8, i8* %arrayidx39, align 1
335  %conv40 = zext i8 %8 to i32
336  %arrayidx41 = getelementptr inbounds i8, i8* %p2.045, i64 4
337  %9 = load i8, i8* %arrayidx41, align 1
338  %conv42 = zext i8 %9 to i32
339  %sub43 = sub nsw i32 %conv40, %conv42
340  %cmp44 = icmp slt i32 %sub43, 0
341  %sub47 = sub nsw i32 0, %sub43
342  %sub47.sub43 = select i1 %cmp44, i32 %sub47, i32 %sub43
343  %add49 = add nsw i32 %add38, %sub47.sub43
344  %arrayidx50 = getelementptr inbounds i8, i8* %p1.044, i64 5
345  %10 = load i8, i8* %arrayidx50, align 1
346  %conv51 = zext i8 %10 to i32
347  %arrayidx52 = getelementptr inbounds i8, i8* %p2.045, i64 5
348  %11 = load i8, i8* %arrayidx52, align 1
349  %conv53 = zext i8 %11 to i32
350  %sub54 = sub nsw i32 %conv51, %conv53
351  %cmp55 = icmp slt i32 %sub54, 0
352  %sub58 = sub nsw i32 0, %sub54
353  %v.5 = select i1 %cmp55, i32 %sub58, i32 %sub54
354  %add60 = add nsw i32 %add49, %v.5
355  %arrayidx61 = getelementptr inbounds i8, i8* %p1.044, i64 6
356  %12 = load i8, i8* %arrayidx61, align 1
357  %conv62 = zext i8 %12 to i32
358  %arrayidx63 = getelementptr inbounds i8, i8* %p2.045, i64 6
359  %13 = load i8, i8* %arrayidx63, align 1
360  %conv64 = zext i8 %13 to i32
361  %sub65 = sub nsw i32 %conv62, %conv64
362  %cmp66 = icmp slt i32 %sub65, 0
363  %sub69 = sub nsw i32 0, %sub65
364  %sub69.sub65 = select i1 %cmp66, i32 %sub69, i32 %sub65
365  %add71 = add nsw i32 %add60, %sub69.sub65
366  %arrayidx72 = getelementptr inbounds i8, i8* %p1.044, i64 7
367  %14 = load i8, i8* %arrayidx72, align 1
368  %conv73 = zext i8 %14 to i32
369  %arrayidx74 = getelementptr inbounds i8, i8* %p2.045, i64 7
370  %15 = load i8, i8* %arrayidx74, align 1
371  %conv75 = zext i8 %15 to i32
372  %sub76 = sub nsw i32 %conv73, %conv75
373  %cmp77 = icmp slt i32 %sub76, 0
374  %sub80 = sub nsw i32 0, %sub76
375  %v.7 = select i1 %cmp77, i32 %sub80, i32 %sub76
376  %add82 = add nsw i32 %add71, %v.7
377  %cmp83 = icmp slt i32 %add82, %lim
378  br i1 %cmp83, label %if.end.86, label %for.end.loopexit
379
380if.end.86:                                        ; preds = %for.body
381  %add.ptr = getelementptr inbounds i8, i8* %p1.044, i64 %idx.ext
382  %add.ptr88 = getelementptr inbounds i8, i8* %p2.045, i64 %idx.ext
383  %inc = add nuw nsw i32 %j.046, 1
384  %cmp = icmp slt i32 %inc, %h
385  br i1 %cmp, label %for.body, label %for.end.loopexit
386
387for.end.loopexit:                                 ; preds = %for.body, %if.end.86
388  br label %for.end
389
390for.end:                                          ; preds = %for.end.loopexit, %entry
391  %s.1 = phi i32 [ 0, %entry ], [ %add82, %for.end.loopexit ]
392  ret i32 %s.1
393}
394
395