1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes='default<O2>' -enable-matrix -S %s | FileCheck %s
3
4target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
5target triple = "systemz"
6
7@ARR = internal global [100 x i32] zeroinitializer, align 4
8
9; This test uses 'sub' instructions for gep offsets to allow
10; codegen (LSR) to create optimal asm. If 'sub' is canonicalized
11; to 'xor', then the backend needs to be able to see through
12; that transform to produce optimal asm.
13
14define dso_local zeroext i32 @foo(ptr noundef %a) #0 {
15; CHECK-LABEL: @foo(
16; CHECK-NEXT:  entry:
17; CHECK-NEXT:    tail call void @populate(ptr noundef nonnull @ARR) #[[ATTR2:[0-9]+]]
18; CHECK-NEXT:    br label [[FOR_BODY4:%.*]]
19; CHECK:       for.body4:
20; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT_7:%.*]], [[FOR_BODY4]] ]
21; CHECK-NEXT:    [[SUM_11:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD_7:%.*]], [[FOR_BODY4]] ]
22; CHECK-NEXT:    [[IDX_NEG:%.*]] = sub nsw i64 0, [[INDVARS_IV]]
23; CHECK-NEXT:    [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG]]
24; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ADD_PTR]], align 4, !tbaa [[TBAA3:![0-9]+]]
25; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[TMP0]], [[SUM_11]]
26; CHECK-NEXT:    [[IDX_NEG_19:%.*]] = xor i64 [[INDVARS_IV]], -1
27; CHECK-NEXT:    [[ADD_PTR_110:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_19]]
28; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[ADD_PTR_110]], align 4, !tbaa [[TBAA3]]
29; CHECK-NEXT:    [[ADD_111:%.*]] = add i32 [[TMP1]], [[ADD]]
30; CHECK-NEXT:    [[IDX_NEG_216:%.*]] = sub nuw nsw i64 -2, [[INDVARS_IV]]
31; CHECK-NEXT:    [[ADD_PTR_217:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_216]]
32; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[ADD_PTR_217]], align 4, !tbaa [[TBAA3]]
33; CHECK-NEXT:    [[ADD_218:%.*]] = add i32 [[TMP2]], [[ADD_111]]
34; CHECK-NEXT:    [[IDX_NEG_3:%.*]] = sub nuw nsw i64 -3, [[INDVARS_IV]]
35; CHECK-NEXT:    [[ADD_PTR_3:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_3]]
36; CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr [[ADD_PTR_3]], align 4, !tbaa [[TBAA3]]
37; CHECK-NEXT:    [[ADD_3:%.*]] = add i32 [[TMP3]], [[ADD_218]]
38; CHECK-NEXT:    [[IDX_NEG_4:%.*]] = sub nuw nsw i64 -4, [[INDVARS_IV]]
39; CHECK-NEXT:    [[ADD_PTR_4:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_4]]
40; CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr [[ADD_PTR_4]], align 4, !tbaa [[TBAA3]]
41; CHECK-NEXT:    [[ADD_4:%.*]] = add i32 [[TMP4]], [[ADD_3]]
42; CHECK-NEXT:    [[IDX_NEG_5:%.*]] = sub nuw nsw i64 -5, [[INDVARS_IV]]
43; CHECK-NEXT:    [[ADD_PTR_5:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_5]]
44; CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr [[ADD_PTR_5]], align 4, !tbaa [[TBAA3]]
45; CHECK-NEXT:    [[ADD_5:%.*]] = add i32 [[TMP5]], [[ADD_4]]
46; CHECK-NEXT:    [[IDX_NEG_6:%.*]] = sub nuw nsw i64 -6, [[INDVARS_IV]]
47; CHECK-NEXT:    [[ADD_PTR_6:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_6]]
48; CHECK-NEXT:    [[TMP6:%.*]] = load i32, ptr [[ADD_PTR_6]], align 4, !tbaa [[TBAA3]]
49; CHECK-NEXT:    [[ADD_6:%.*]] = add i32 [[TMP6]], [[ADD_5]]
50; CHECK-NEXT:    [[IDX_NEG_7:%.*]] = sub nuw nsw i64 -7, [[INDVARS_IV]]
51; CHECK-NEXT:    [[ADD_PTR_7:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_7]]
52; CHECK-NEXT:    [[TMP7:%.*]] = load i32, ptr [[ADD_PTR_7]], align 4, !tbaa [[TBAA3]]
53; CHECK-NEXT:    [[ADD_7]] = add i32 [[TMP7]], [[ADD_6]]
54; CHECK-NEXT:    [[INDVARS_IV_NEXT_7]] = add nuw nsw i64 [[INDVARS_IV]], 8
55; CHECK-NEXT:    [[EXITCOND_NOT_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_7]], 32
56; CHECK-NEXT:    br i1 [[EXITCOND_NOT_7]], label [[FOR_BODY4_1:%.*]], label [[FOR_BODY4]], !llvm.loop [[LOOP7:![0-9]+]]
57; CHECK:       for.body4.1:
58; CHECK-NEXT:    [[INDVARS_IV_1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_1_7:%.*]], [[FOR_BODY4_1]] ], [ 0, [[FOR_BODY4]] ]
59; CHECK-NEXT:    [[SUM_11_1:%.*]] = phi i32 [ [[ADD_1_7:%.*]], [[FOR_BODY4_1]] ], [ [[ADD_7]], [[FOR_BODY4]] ]
60; CHECK-NEXT:    [[IDX_NEG_1:%.*]] = sub nsw i64 0, [[INDVARS_IV_1]]
61; CHECK-NEXT:    [[ADD_PTR_1:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_1]]
62; CHECK-NEXT:    [[TMP8:%.*]] = load i32, ptr [[ADD_PTR_1]], align 4, !tbaa [[TBAA3]]
63; CHECK-NEXT:    [[MUL_1:%.*]] = shl i32 [[TMP8]], 1
64; CHECK-NEXT:    [[ADD_1:%.*]] = add i32 [[MUL_1]], [[SUM_11_1]]
65; CHECK-NEXT:    [[IDX_NEG_1_1:%.*]] = xor i64 [[INDVARS_IV_1]], -1
66; CHECK-NEXT:    [[ADD_PTR_1_1:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_1_1]]
67; CHECK-NEXT:    [[TMP9:%.*]] = load i32, ptr [[ADD_PTR_1_1]], align 4, !tbaa [[TBAA3]]
68; CHECK-NEXT:    [[MUL_1_1:%.*]] = shl i32 [[TMP9]], 1
69; CHECK-NEXT:    [[ADD_1_1:%.*]] = add i32 [[MUL_1_1]], [[ADD_1]]
70; CHECK-NEXT:    [[IDX_NEG_1_2:%.*]] = sub nuw nsw i64 -2, [[INDVARS_IV_1]]
71; CHECK-NEXT:    [[ADD_PTR_1_2:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_1_2]]
72; CHECK-NEXT:    [[TMP10:%.*]] = load i32, ptr [[ADD_PTR_1_2]], align 4, !tbaa [[TBAA3]]
73; CHECK-NEXT:    [[MUL_1_2:%.*]] = shl i32 [[TMP10]], 1
74; CHECK-NEXT:    [[ADD_1_2:%.*]] = add i32 [[MUL_1_2]], [[ADD_1_1]]
75; CHECK-NEXT:    [[IDX_NEG_1_3:%.*]] = sub nuw nsw i64 -3, [[INDVARS_IV_1]]
76; CHECK-NEXT:    [[ADD_PTR_1_3:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_1_3]]
77; CHECK-NEXT:    [[TMP11:%.*]] = load i32, ptr [[ADD_PTR_1_3]], align 4, !tbaa [[TBAA3]]
78; CHECK-NEXT:    [[MUL_1_3:%.*]] = shl i32 [[TMP11]], 1
79; CHECK-NEXT:    [[ADD_1_3:%.*]] = add i32 [[MUL_1_3]], [[ADD_1_2]]
80; CHECK-NEXT:    [[IDX_NEG_1_4:%.*]] = sub nuw nsw i64 -4, [[INDVARS_IV_1]]
81; CHECK-NEXT:    [[ADD_PTR_1_4:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_1_4]]
82; CHECK-NEXT:    [[TMP12:%.*]] = load i32, ptr [[ADD_PTR_1_4]], align 4, !tbaa [[TBAA3]]
83; CHECK-NEXT:    [[MUL_1_4:%.*]] = shl i32 [[TMP12]], 1
84; CHECK-NEXT:    [[ADD_1_4:%.*]] = add i32 [[MUL_1_4]], [[ADD_1_3]]
85; CHECK-NEXT:    [[IDX_NEG_1_5:%.*]] = sub nuw nsw i64 -5, [[INDVARS_IV_1]]
86; CHECK-NEXT:    [[ADD_PTR_1_5:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_1_5]]
87; CHECK-NEXT:    [[TMP13:%.*]] = load i32, ptr [[ADD_PTR_1_5]], align 4, !tbaa [[TBAA3]]
88; CHECK-NEXT:    [[MUL_1_5:%.*]] = shl i32 [[TMP13]], 1
89; CHECK-NEXT:    [[ADD_1_5:%.*]] = add i32 [[MUL_1_5]], [[ADD_1_4]]
90; CHECK-NEXT:    [[IDX_NEG_1_6:%.*]] = sub nuw nsw i64 -6, [[INDVARS_IV_1]]
91; CHECK-NEXT:    [[ADD_PTR_1_6:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_1_6]]
92; CHECK-NEXT:    [[TMP14:%.*]] = load i32, ptr [[ADD_PTR_1_6]], align 4, !tbaa [[TBAA3]]
93; CHECK-NEXT:    [[MUL_1_6:%.*]] = shl i32 [[TMP14]], 1
94; CHECK-NEXT:    [[ADD_1_6:%.*]] = add i32 [[MUL_1_6]], [[ADD_1_5]]
95; CHECK-NEXT:    [[IDX_NEG_1_7:%.*]] = sub nuw nsw i64 -7, [[INDVARS_IV_1]]
96; CHECK-NEXT:    [[ADD_PTR_1_7:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_1_7]]
97; CHECK-NEXT:    [[TMP15:%.*]] = load i32, ptr [[ADD_PTR_1_7]], align 4, !tbaa [[TBAA3]]
98; CHECK-NEXT:    [[MUL_1_7:%.*]] = shl i32 [[TMP15]], 1
99; CHECK-NEXT:    [[ADD_1_7]] = add i32 [[MUL_1_7]], [[ADD_1_6]]
100; CHECK-NEXT:    [[INDVARS_IV_NEXT_1_7]] = add nuw nsw i64 [[INDVARS_IV_1]], 8
101; CHECK-NEXT:    [[EXITCOND_1_NOT_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_1_7]], 32
102; CHECK-NEXT:    br i1 [[EXITCOND_1_NOT_7]], label [[FOR_BODY4_2:%.*]], label [[FOR_BODY4_1]], !llvm.loop [[LOOP7]]
103; CHECK:       for.body4.2:
104; CHECK-NEXT:    [[INDVARS_IV_2:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_2_7:%.*]], [[FOR_BODY4_2]] ], [ 0, [[FOR_BODY4_1]] ]
105; CHECK-NEXT:    [[SUM_11_2:%.*]] = phi i32 [ [[ADD_2_7:%.*]], [[FOR_BODY4_2]] ], [ [[ADD_1_7]], [[FOR_BODY4_1]] ]
106; CHECK-NEXT:    [[IDX_NEG_2:%.*]] = sub nsw i64 0, [[INDVARS_IV_2]]
107; CHECK-NEXT:    [[ADD_PTR_2:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_2]]
108; CHECK-NEXT:    [[TMP16:%.*]] = load i32, ptr [[ADD_PTR_2]], align 4, !tbaa [[TBAA3]]
109; CHECK-NEXT:    [[MUL_2:%.*]] = mul i32 [[TMP16]], 3
110; CHECK-NEXT:    [[ADD_2:%.*]] = add i32 [[MUL_2]], [[SUM_11_2]]
111; CHECK-NEXT:    [[IDX_NEG_2_1:%.*]] = xor i64 [[INDVARS_IV_2]], -1
112; CHECK-NEXT:    [[ADD_PTR_2_1:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_2_1]]
113; CHECK-NEXT:    [[TMP17:%.*]] = load i32, ptr [[ADD_PTR_2_1]], align 4, !tbaa [[TBAA3]]
114; CHECK-NEXT:    [[MUL_2_1:%.*]] = mul i32 [[TMP17]], 3
115; CHECK-NEXT:    [[ADD_2_1:%.*]] = add i32 [[MUL_2_1]], [[ADD_2]]
116; CHECK-NEXT:    [[IDX_NEG_2_2:%.*]] = sub nuw nsw i64 -2, [[INDVARS_IV_2]]
117; CHECK-NEXT:    [[ADD_PTR_2_2:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_2_2]]
118; CHECK-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ADD_PTR_2_2]], align 4, !tbaa [[TBAA3]]
119; CHECK-NEXT:    [[MUL_2_2:%.*]] = mul i32 [[TMP18]], 3
120; CHECK-NEXT:    [[ADD_2_2:%.*]] = add i32 [[MUL_2_2]], [[ADD_2_1]]
121; CHECK-NEXT:    [[IDX_NEG_2_3:%.*]] = sub nuw nsw i64 -3, [[INDVARS_IV_2]]
122; CHECK-NEXT:    [[ADD_PTR_2_3:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_2_3]]
123; CHECK-NEXT:    [[TMP19:%.*]] = load i32, ptr [[ADD_PTR_2_3]], align 4, !tbaa [[TBAA3]]
124; CHECK-NEXT:    [[MUL_2_3:%.*]] = mul i32 [[TMP19]], 3
125; CHECK-NEXT:    [[ADD_2_3:%.*]] = add i32 [[MUL_2_3]], [[ADD_2_2]]
126; CHECK-NEXT:    [[IDX_NEG_2_4:%.*]] = sub nuw nsw i64 -4, [[INDVARS_IV_2]]
127; CHECK-NEXT:    [[ADD_PTR_2_4:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_2_4]]
128; CHECK-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ADD_PTR_2_4]], align 4, !tbaa [[TBAA3]]
129; CHECK-NEXT:    [[MUL_2_4:%.*]] = mul i32 [[TMP20]], 3
130; CHECK-NEXT:    [[ADD_2_4:%.*]] = add i32 [[MUL_2_4]], [[ADD_2_3]]
131; CHECK-NEXT:    [[IDX_NEG_2_5:%.*]] = sub nuw nsw i64 -5, [[INDVARS_IV_2]]
132; CHECK-NEXT:    [[ADD_PTR_2_5:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_2_5]]
133; CHECK-NEXT:    [[TMP21:%.*]] = load i32, ptr [[ADD_PTR_2_5]], align 4, !tbaa [[TBAA3]]
134; CHECK-NEXT:    [[MUL_2_5:%.*]] = mul i32 [[TMP21]], 3
135; CHECK-NEXT:    [[ADD_2_5:%.*]] = add i32 [[MUL_2_5]], [[ADD_2_4]]
136; CHECK-NEXT:    [[IDX_NEG_2_6:%.*]] = sub nuw nsw i64 -6, [[INDVARS_IV_2]]
137; CHECK-NEXT:    [[ADD_PTR_2_6:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_2_6]]
138; CHECK-NEXT:    [[TMP22:%.*]] = load i32, ptr [[ADD_PTR_2_6]], align 4, !tbaa [[TBAA3]]
139; CHECK-NEXT:    [[MUL_2_6:%.*]] = mul i32 [[TMP22]], 3
140; CHECK-NEXT:    [[ADD_2_6:%.*]] = add i32 [[MUL_2_6]], [[ADD_2_5]]
141; CHECK-NEXT:    [[IDX_NEG_2_7:%.*]] = sub nuw nsw i64 -7, [[INDVARS_IV_2]]
142; CHECK-NEXT:    [[ADD_PTR_2_7:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 [[IDX_NEG_2_7]]
143; CHECK-NEXT:    [[TMP23:%.*]] = load i32, ptr [[ADD_PTR_2_7]], align 4, !tbaa [[TBAA3]]
144; CHECK-NEXT:    [[MUL_2_7:%.*]] = mul i32 [[TMP23]], 3
145; CHECK-NEXT:    [[ADD_2_7]] = add i32 [[MUL_2_7]], [[ADD_2_6]]
146; CHECK-NEXT:    [[INDVARS_IV_NEXT_2_7]] = add nuw nsw i64 [[INDVARS_IV_2]], 8
147; CHECK-NEXT:    [[EXITCOND_2_NOT_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_2_7]], 32
148; CHECK-NEXT:    br i1 [[EXITCOND_2_NOT_7]], label [[FOR_INC5_2:%.*]], label [[FOR_BODY4_2]], !llvm.loop [[LOOP7]]
149; CHECK:       for.inc5.2:
150; CHECK-NEXT:    ret i32 [[ADD_2_7]]
151;
152entry:
153  call void @populate(ptr noundef @ARR)
154  br label %for.cond
155
156for.cond:                                         ; preds = %for.inc5, %entry
157  %j.0 = phi i32 [ 1, %entry ], [ %inc6, %for.inc5 ]
158  %sum.0 = phi i32 [ 0, %entry ], [ %sum.1, %for.inc5 ]
159  %cmp = icmp slt i32 %j.0, 4
160  br i1 %cmp, label %for.body, label %for.cond.cleanup
161
162for.cond.cleanup:                                 ; preds = %for.cond
163  br label %for.end7
164
165for.body:                                         ; preds = %for.cond
166  br label %for.cond1
167
168for.cond1:                                        ; preds = %for.inc, %for.body
169  %sum.1 = phi i32 [ %sum.0, %for.body ], [ %add, %for.inc ]
170  %i.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ]
171  %cmp2 = icmp slt i32 %i.0, 32
172  br i1 %cmp2, label %for.body4, label %for.cond.cleanup3
173
174for.cond.cleanup3:                                ; preds = %for.cond1
175  br label %for.end
176
177for.body4:                                        ; preds = %for.cond1
178  %idx.ext = sext i32 %i.0 to i64
179  %idx.neg = sub i64 0, %idx.ext
180  %add.ptr = getelementptr inbounds i32, ptr getelementptr inbounds ([100 x i32], ptr @ARR, i64 0, i64 99), i64 %idx.neg
181  %0 = load i32, ptr %add.ptr, align 4, !tbaa !3
182  %mul = mul i32 %j.0, %0
183  %add = add i32 %sum.1, %mul
184  br label %for.inc
185
186for.inc:                                          ; preds = %for.body4
187  %inc = add nsw i32 %i.0, 1
188  br label %for.cond1, !llvm.loop !7
189
190for.end:                                          ; preds = %for.cond.cleanup3
191  br label %for.inc5
192
193for.inc5:                                         ; preds = %for.end
194  %inc6 = add nsw i32 %j.0, 1
195  br label %for.cond, !llvm.loop !9
196
197for.end7:                                         ; preds = %for.cond.cleanup
198  ret i32 %sum.0
199}
200
201declare dso_local void @populate(ptr noundef) #1
202
203attributes #0 = { nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="z10" }
204attributes #1 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="z10" }
205attributes #2 = { argmemonly nocallback nofree nosync nounwind willreturn }
206
207!llvm.module.flags = !{!0, !1}
208!llvm.ident = !{!2}
209
210!0 = !{i32 1, !"wchar_size", i32 4}
211!1 = !{i32 7, !"frame-pointer", i32 2}
212!2 = !{!"clang version 15.0.0 (https://github.com/llvm/llvm-project.git 0bfef0669075f229fd325d8c8521c9adfb453f83)"}
213!3 = !{!4, !4, i64 0}
214!4 = !{!"int", !5, i64 0}
215!5 = !{!"omnipotent char", !6, i64 0}
216!6 = !{!"Simple C/C++ TBAA"}
217!7 = distinct !{!7, !8}
218!8 = !{!"llvm.loop.mustprogress"}
219!9 = distinct !{!9, !8}
220