1; RUN: opt -S -passes=lowertypetests -mtriple=i686-unknown-linux-gnu %s | FileCheck --check-prefixes=X86,X86-LINUX,NATIVE %s 2; RUN: opt -S -passes=lowertypetests -mtriple=x86_64-unknown-linux-gnu %s | FileCheck --check-prefixes=X86,X86-LINUX,NATIVE %s 3; RUN: opt -S -passes=lowertypetests -mtriple=i686-pc-win32 %s | FileCheck --check-prefixes=X86,X86-WIN32,NATIVE %s 4; RUN: opt -S -passes=lowertypetests -mtriple=x86_64-pc-win32 %s | FileCheck --check-prefixes=X86,X86-WIN32,NATIVE %s 5; RUN: opt -S -passes=lowertypetests -mtriple=arm-unknown-linux-gnu %s | FileCheck --check-prefixes=ARM,NATIVE %s 6; RUN: opt -S -passes=lowertypetests -mtriple=thumb-unknown-linux-gnu %s | FileCheck --check-prefixes=THUMB,NATIVE %s 7; RUN: opt -S -passes=lowertypetests -mtriple=aarch64-unknown-linux-gnu %s | FileCheck --check-prefixes=ARM,NATIVE %s 8; RUN: opt -S -passes=lowertypetests -mtriple=riscv32-unknown-linux-gnu %s | FileCheck --check-prefixes=RISCV,NATIVE %s 9; RUN: opt -S -passes=lowertypetests -mtriple=riscv64-unknown-linux-gnu %s | FileCheck --check-prefixes=RISCV,NATIVE %s 10; RUN: opt -S -passes=lowertypetests -mtriple=wasm32-unknown-unknown %s | FileCheck --check-prefix=WASM32 %s 11 12; Tests that we correctly handle bitsets containing 2 or more functions. 13 14target datalayout = "e-p:64:64" 15 16 17; NATIVE: @0 = private unnamed_addr constant [2 x void (...)*] [void (...)* bitcast (void ()* @f to void (...)*), void (...)* bitcast (void ()* @g to void (...)*)], align 16 18@0 = private unnamed_addr constant [2 x void (...)*] [void (...)* bitcast (void ()* @f to void (...)*), void (...)* bitcast (void ()* @g to void (...)*)], align 16 19 20; NATIVE: private constant [0 x i8] zeroinitializer 21; WASM32: private constant [0 x i8] zeroinitializer 22 23; NATIVE: @f = alias void (), void ()* @[[JT:.*]] 24 25; X86: @g = internal alias void (), bitcast ([8 x i8]* getelementptr inbounds ([2 x [8 x i8]], [2 x [8 x i8]]* bitcast (void ()* @[[JT]] to [2 x [8 x i8]]*), i64 0, i64 1) to void ()*) 26; ARM: @g = internal alias void (), bitcast ([4 x i8]* getelementptr inbounds ([2 x [4 x i8]], [2 x [4 x i8]]* bitcast (void ()* @[[JT]] to [2 x [4 x i8]]*), i64 0, i64 1) to void ()*) 27; THUMB: @g = internal alias void (), bitcast ([4 x i8]* getelementptr inbounds ([2 x [4 x i8]], [2 x [4 x i8]]* bitcast (void ()* @[[JT]] to [2 x [4 x i8]]*), i64 0, i64 1) to void ()*) 28; RISCV: @g = internal alias void (), bitcast ([8 x i8]* getelementptr inbounds ([2 x [8 x i8]], [2 x [8 x i8]]* bitcast (void ()* @[[JT]] to [2 x [8 x i8]]*), i64 0, i64 1) to void ()*) 29 30; NATIVE: define hidden void @f.cfi() 31; WASM32: define void @f() !type !{{[0-9]+}} !wasm.index ![[I0:[0-9]+]] 32define void @f() !type !0 { 33 ret void 34} 35 36; NATIVE: define internal void @g.cfi() 37; WASM32: define internal void @g() !type !{{[0-9]+}} !wasm.index ![[I1:[0-9]+]] 38define internal void @g() !type !0 { 39 ret void 40} 41 42!0 = !{i32 0, !"typeid1"} 43 44declare i1 @llvm.type.test(i8* %ptr, metadata %bitset) nounwind readnone 45 46define i1 @foo(i8* %p) { 47 ; NATIVE: sub i64 {{.*}}, ptrtoint (void ()* @[[JT]] to i64) 48 ; WASM32: sub i64 {{.*}}, ptrtoint (i8* getelementptr (i8, i8* null, i64 1) to i64) 49 ; WASM32: icmp ule i64 {{.*}}, 1 50 %x = call i1 @llvm.type.test(i8* %p, metadata !"typeid1") 51 ret i1 %x 52} 53 54; X86-LINUX: define private void @[[JT]]() #[[ATTR:.*]] align 8 { 55; X86-WIN32: define private void @[[JT]]() #[[ATTR:.*]] align 8 { 56; ARM: define private void @[[JT]]() #[[ATTR:.*]] align 4 { 57; THUMB: define private void @[[JT]]() #[[ATTR:.*]] align 4 { 58; RISCV: define private void @[[JT]]() #[[ATTR:.*]] align 8 { 59 60; X86: jmp ${0:c}@plt 61; X86-SAME: int3 62; X86-SAME: int3 63; X86-SAME: int3 64; X86-SAME: jmp ${1:c}@plt 65; X86-SAME: int3 66; X86-SAME: int3 67; X86-SAME: int3 68 69; ARM: b $0 70; ARM-SAME: b $1 71 72; THUMB: b.w $0 73; THUMB-SAME: b.w $1 74 75; RISCV: tail $0@plt 76; RISCV-SAME: tail $1@plt 77 78; NATIVE-SAME: "s,s"(void ()* @f.cfi, void ()* @g.cfi) 79 80; X86-LINUX: attributes #[[ATTR]] = { naked nounwind } 81; X86-WIN32: attributes #[[ATTR]] = { nounwind } 82; ARM: attributes #[[ATTR]] = { naked nounwind 83; THUMB: attributes #[[ATTR]] = { naked nounwind "target-cpu"="cortex-a8" "target-features"="+thumb-mode" } 84; RISCV: attributes #[[ATTR]] = { naked nounwind "target-features"="-c,-relax" } 85 86; WASM32: ![[I0]] = !{i64 1} 87; WASM32: ![[I1]] = !{i64 2} 88