1; REQUIRES: asserts 2 3; RUN: opt -loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -enable-interleaved-mem-accesses=true -enable-masked-interleaved-mem-accesses -disable-output %s 2>&1 | FileCheck %s 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 6 7; Tests for printing VPlans. 8 9define void @print_call_and_memory(i64 %n, float* noalias %y, float* noalias %x) nounwind uwtable { 10; CHECK-LABEL: Checking a loop in "print_call_and_memory" 11; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 12; CHECK-NEXT: <x1> vector loop: { 13; CHECK-NEXT: for.body: 14; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 15; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0 16; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, ir<%iv> 17; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 18; CHECK-NEXT: WIDEN-CALL ir<%call> = call @llvm.sqrt.f32(ir<%lv>) 19; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, ir<%iv> 20; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%call> 21; CHECK-NEXT: EMIT vp<{{.+}}> = VF * UF +(nuw) vp<[[CAN_IV]]> 22; CHECK-NEXT: No successors 23; CHECK-NEXT: } 24; CHECK-NEXT: No successors 25; CHECK-NEXT: } 26; 27entry: 28 %cmp6 = icmp sgt i64 %n, 0 29 br i1 %cmp6, label %for.body, label %for.end 30 31for.body: ; preds = %entry, %for.body 32 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 33 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 34 %lv = load float, float* %arrayidx, align 4 35 %call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone 36 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 37 store float %call, float* %arrayidx2, align 4 38 %iv.next = add i64 %iv, 1 39 %exitcond = icmp eq i64 %iv.next, %n 40 br i1 %exitcond, label %for.end, label %for.body 41 42for.end: ; preds = %for.body, %entry 43 ret void 44} 45 46define void @print_widen_gep_and_select(i64 %n, float* noalias %y, float* noalias %x, float* %z) nounwind uwtable { 47; CHECK-LABEL: Checking a loop in "print_widen_gep_and_select" 48; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 49; CHECK-NEXT: <x1> vector loop: { 50; CHECK-NEXT: for.body: 51; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 52; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0 53; CHECK-NEXT: WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr ir<%y>, ir<%iv> 54; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 55; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%arrayidx>, ir<%z> 56; CHECK-NEXT: WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01> 57; CHECK-NEXT: WIDEN ir<%add> = fadd ir<%lv>, ir<%sel> 58; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, ir<%iv> 59; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%add> 60; CHECK-NEXT: EMIT vp<{{.+}}> = VF * UF +(nuw) vp<[[CAN_IV]]> 61; CHECK-NEXT: No successors 62; CHECK-NEXT: } 63; CHECK-NEXT: No successors 64; CHECK-NEXT: } 65; 66entry: 67 %cmp6 = icmp sgt i64 %n, 0 68 br i1 %cmp6, label %for.body, label %for.end 69 70for.body: ; preds = %entry, %for.body 71 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 72 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 73 %lv = load float, float* %arrayidx, align 4 74 %cmp = icmp eq float* %arrayidx, %z 75 %sel = select i1 %cmp, float 10.0, float 20.0 76 %add = fadd float %lv, %sel 77 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 78 store float %add, float* %arrayidx2, align 4 79 %iv.next = add i64 %iv, 1 80 %exitcond = icmp eq i64 %iv.next, %n 81 br i1 %exitcond, label %for.end, label %for.body 82 83for.end: ; preds = %for.body, %entry 84 ret void 85} 86 87define float @print_reduction(i64 %n, float* noalias %y) { 88; CHECK-LABEL: Checking a loop in "print_reduction" 89; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 90; CHECK-NEXT: <x1> vector loop: { 91; CHECK-NEXT: for.body: 92; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 93; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0 94; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> 95; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, ir<%iv> 96; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 97; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) 98; CHECK-NEXT: EMIT vp<{{.+}}> = VF * UF +(nuw) vp<[[CAN_IV]]> 99; CHECK-NEXT: No successors 100; CHECK-NEXT: } 101; CHECK-NEXT: No successors 102; CHECK-NEXT: } 103; 104entry: 105 br label %for.body 106 107for.body: ; preds = %entry, %for.body 108 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 109 %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ] 110 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 111 %lv = load float, float* %arrayidx, align 4 112 %red.next = fadd fast float %lv, %red 113 %iv.next = add i64 %iv, 1 114 %exitcond = icmp eq i64 %iv.next, %n 115 br i1 %exitcond, label %for.end, label %for.body 116 117for.end: ; preds = %for.body, %entry 118 ret float %red.next 119} 120 121define void @print_replicate_predicated_phi(i64 %n, i64* %x) { 122; CHECK-LABEL: Checking a loop in "print_replicate_predicated_phi" 123; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 124; CHECK-NEXT: <x1> vector loop: { 125; CHECK-NEXT: for.body: 126; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 127; CHECK-NEXT: WIDEN-INDUCTION %i = phi 0, %i.next 128; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%i>, ir<5> 129; CHECK-NEXT: Successor(s): if.then 130; CHECK-EMPTY: 131; CHECK-NEXT: if.then: 132; CHECK-NEXT: Successor(s): pred.udiv 133; CHECK-EMPTY: 134; CHECK-NEXT: <xVFxUF> pred.udiv: { 135; CHECK-NEXT: pred.udiv.entry: 136; CHECK-NEXT: BRANCH-ON-MASK ir<%cmp> 137; CHECK-NEXT: Successor(s): pred.udiv.if, pred.udiv.continue 138; CHECK-NEXT: CondBit: ir<%cmp> 139; CHECK-EMPTY: 140; CHECK-NEXT: pred.udiv.if: 141; CHECK-NEXT: REPLICATE ir<%tmp4> = udiv ir<%n>, ir<%i> (S->V) 142; CHECK-NEXT: Successor(s): pred.udiv.continue 143; CHECK-EMPTY: 144; CHECK-NEXT: pred.udiv.continue: 145; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%tmp4> 146; CHECK-NEXT: No successors 147; CHECK-NEXT: } 148; CHECK-NEXT: Successor(s): if.then.0 149; CHECK-EMPTY: 150; CHECK-NEXT: if.then.0: 151; CHECK-NEXT: Successor(s): for.inc 152; CHECK-EMPTY: 153; CHECK-NEXT: for.inc: 154; CHECK-NEXT: EMIT vp<[[NOT:%.+]]> = not ir<%cmp> 155; CHECK-NEXT: BLEND %d = ir<0>/vp<[[NOT]]> vp<[[PRED]]>/ir<%cmp> 156; CHECK-NEXT: CLONE ir<%idx> = getelementptr ir<%x>, ir<%i> 157; CHECK-NEXT: WIDEN store ir<%idx>, ir<%d> 158; CHECK-NEXT: EMIT vp<{{.+}}> = VF * UF +(nuw) vp<[[CAN_IV]]> 159; CHECK-NEXT: No successors 160; CHECK-NEXT: } 161; CHECK-NEXT: No successors 162; CHECK-NEXT: } 163; 164entry: 165 br label %for.body 166 167for.body: ; preds = %for.inc, %entry 168 %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ] 169 %cmp = icmp ult i64 %i, 5 170 br i1 %cmp, label %if.then, label %for.inc 171 172if.then: ; preds = %for.body 173 %tmp4 = udiv i64 %n, %i 174 br label %for.inc 175 176for.inc: ; preds = %if.then, %for.body 177 %d = phi i64 [ 0, %for.body ], [ %tmp4, %if.then ] 178 %idx = getelementptr i64, i64* %x, i64 %i 179 store i64 %d, i64* %idx 180 %i.next = add nuw nsw i64 %i, 1 181 %cond = icmp slt i64 %i.next, %n 182 br i1 %cond, label %for.body, label %for.end 183 184for.end: ; preds = %for.inc 185 ret void 186} 187 188@AB = common global [1024 x i32] zeroinitializer, align 4 189@CD = common global [1024 x i32] zeroinitializer, align 4 190 191define void @print_interleave_groups(i32 %C, i32 %D) { 192; CHECK-LABEL: Checking a loop in "print_interleave_groups" 193; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 194; CHECK-NEXT: <x1> vector loop: { 195; CHECK-NEXT: for.body: 196; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 197; CHECK-NEXT: WIDEN-INDUCTION %iv = phi 0, %iv.next 198; CHECK-NEXT: CLONE ir<%gep.AB.0> = getelementptr ir<@AB>, ir<0>, ir<%iv> 199; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at %AB.0, ir<%gep.AB.0> 200; CHECK-NEXT: ir<%AB.0> = load from index 0 201; CHECK-NEXT: ir<%AB.1> = load from index 1 202; CHECK-NEXT: ir<%AB.3> = load from index 3 203; CHECK-NEXT: CLONE ir<%iv.plus.1> = add ir<%iv>, ir<1> 204; CHECK-NEXT: CLONE ir<%gep.AB.1> = getelementptr ir<@AB>, ir<0>, ir<%iv.plus.1> 205; CHECK-NEXT: CLONE ir<%iv.plus.2> = add ir<%iv>, ir<2> 206; CHECK-NEXT: CLONE ir<%iv.plus.3> = add ir<%iv>, ir<3> 207; CHECK-NEXT: CLONE ir<%gep.AB.3> = getelementptr ir<@AB>, ir<0>, ir<%iv.plus.3> 208; CHECK-NEXT: WIDEN ir<%add> = add ir<%AB.0>, ir<%AB.1> 209; CHECK-NEXT: CLONE ir<%gep.CD.0> = getelementptr ir<@CD>, ir<0>, ir<%iv> 210; CHECK-NEXT: CLONE ir<%gep.CD.1> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.1> 211; CHECK-NEXT: CLONE ir<%gep.CD.2> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.2> 212; CHECK-NEXT: CLONE ir<%gep.CD.3> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.3> 213; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at <badref>, ir<%gep.CD.3> 214; CHECK-NEXT: store ir<%add> to index 0 215; CHECK-NEXT: store ir<1> to index 1 216; CHECK-NEXT: store ir<2> to index 2 217; CHECK-NEXT: store ir<%AB.3> to index 3 218; CHECK-NEXT: EMIT vp<{{.+}}> = VF * UF +(nuw) vp<[[CAN_IV]]> 219; CHECK-NEXT: No successors 220; CHECK-NEXT: } 221; CHECK-NEXT: No successors 222; CHECK-NEXT: } 223; 224entry: 225 br label %for.body 226 227for.body: 228 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 229 %gep.AB.0= getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv 230 %AB.0 = load i32, i32* %gep.AB.0, align 4 231 %iv.plus.1 = add i64 %iv, 1 232 %gep.AB.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.1 233 %AB.1 = load i32, i32* %gep.AB.1, align 4 234 %iv.plus.2 = add i64 %iv, 2 235 %iv.plus.3 = add i64 %iv, 3 236 %gep.AB.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.3 237 %AB.3 = load i32, i32* %gep.AB.3, align 4 238 %add = add nsw i32 %AB.0, %AB.1 239 %gep.CD.0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv 240 store i32 %add, i32* %gep.CD.0, align 4 241 %gep.CD.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.1 242 store i32 1, i32* %gep.CD.1, align 4 243 %gep.CD.2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.2 244 store i32 2, i32* %gep.CD.2, align 4 245 %gep.CD.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.3 246 store i32 %AB.3, i32* %gep.CD.3, align 4 247 %iv.next = add nuw nsw i64 %iv, 4 248 %cmp = icmp slt i64 %iv.next, 1024 249 br i1 %cmp, label %for.body, label %for.end 250 251for.end: 252 ret void 253} 254 255define float @print_fmuladd_strict(float* %a, float* %b, i64 %n) { 256; CHECK-LABEL: Checking a loop in "print_fmuladd_strict" 257; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 258; CHECK-NEXT: <x1> vector loop: { 259; CHECK-NEXT: for.body: 260; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 261; CHECK-NEXT: WIDEN-INDUCTION %iv = phi 0, %iv.next 262; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%sum.07> = phi ir<0.000000e+00>, ir<%muladd> 263; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%a>, ir<%iv> 264; CHECK-NEXT: WIDEN ir<%l.a> = load ir<%arrayidx> 265; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%b>, ir<%iv> 266; CHECK-NEXT: WIDEN ir<%l.b> = load ir<%arrayidx2> 267; CHECK-NEXT: EMIT vp<[[FMUL:%.]]> = fmul nnan ninf nsz ir<%l.a> ir<%l.b> 268; CHECK-NEXT: REDUCE ir<[[MULADD:%.+]]> = ir<%sum.07> + nnan ninf nsz reduce.fadd (vp<[[FMUL]]>) 269; CHECK-NEXT: EMIT vp<{{.+}}> = VF * UF +(nuw) vp<[[CAN_IV]]> 270; CHECK-NEXT: No successors 271; CHECK-NEXT: } 272 273entry: 274 br label %for.body 275 276for.body: 277 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 278 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ] 279 %arrayidx = getelementptr inbounds float, float* %a, i64 %iv 280 %l.a = load float, float* %arrayidx, align 4 281 %arrayidx2 = getelementptr inbounds float, float* %b, i64 %iv 282 %l.b = load float, float* %arrayidx2, align 4 283 %muladd = tail call nnan ninf nsz float @llvm.fmuladd.f32(float %l.a, float %l.b, float %sum.07) 284 %iv.next = add nuw nsw i64 %iv, 1 285 %exitcond.not = icmp eq i64 %iv.next, %n 286 br i1 %exitcond.not, label %for.end, label %for.body 287 288for.end: 289 ret float %muladd 290} 291 292define void @debug_loc_vpinstruction(i32* nocapture %asd, i32* nocapture %bsd) !dbg !5 { 293; CHECK-LABEL: Checking a loop in "debug_loc_vpinstruction" 294; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 295; CHECK-NEXT: <x1> vector loop: { 296; CHECK-NEXT: loop: 297; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 298; CHECK-NEXT: WIDEN-INDUCTION %iv = phi 0, %iv.next 299; CHECK-NEXT: CLONE ir<%isd> = getelementptr ir<%asd>, ir<%iv> 300; CHECK-NEXT: WIDEN ir<%lsd> = load ir<%isd> 301; CHECK-NEXT: WIDEN ir<%psd> = add ir<%lsd>, ir<23> 302; CHECK-NEXT: WIDEN ir<%cmp1> = icmp ir<%lsd>, ir<100> 303; CHECK-NEXT: Successor(s): check 304; CHECK-EMPTY: 305; CHECK-NEXT: check: 306; CHECK-NEXT: WIDEN ir<%cmp2> = icmp ir<%lsd>, ir<200> 307; CHECK-NEXT: Successor(s): if.then 308; CHECK-EMPTY: 309; CHECK-NEXT: if.then: 310; CHECK-NEXT: EMIT vp<[[NOT1:%.+]]> = not ir<%cmp1>, !dbg /tmp/s.c:5:3 311; CHECK-NEXT: EMIT vp<[[SEL1:%.+]]> = select vp<[[NOT1]]> ir<%cmp2> ir<false>, !dbg /tmp/s.c:5:21 312; CHECK-NEXT: EMIT vp<[[OR1:%.+]]> = or vp<[[SEL1]]> ir<%cmp1> 313; CHECK-NEXT: Successor(s): pred.sdiv 314; CHECK-EMPTY: 315; CHECK-NEXT: <xVFxUF> pred.sdiv: { 316; CHECK-NEXT: pred.sdiv.entry: 317; CHECK-NEXT: BRANCH-ON-MASK vp<[[OR1]]> 318; CHECK-NEXT: Successor(s): pred.sdiv.if, pred.sdiv.continue 319; CHECK-NEXT: CondBit: vp<[[OR1]]> (if.then) 320; CHECK-EMPTY: 321; CHECK-NEXT: pred.sdiv.if: 322; CHECK-NEXT: REPLICATE ir<%sd1> = sdiv ir<%psd>, ir<%lsd> (S->V) 323; CHECK-NEXT: Successor(s): pred.sdiv.continue 324; CHECK-EMPTY: 325; CHECK-NEXT: pred.sdiv.continue: 326; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PHI:%.+]]> = ir<%sd1> 327; CHECK-NEXT: No successors 328; CHECK-NEXT: } 329; CHECK-NEXT: Successor(s): if.then.0 330; CHECK-EMPTY: 331; CHECK-NEXT: if.then.0: 332; CHECK-NEXT: Successor(s): if.end 333; CHECK-EMPTY: 334; CHECK-NEXT: if.end: 335; CHECK-NEXT: EMIT vp<[[NOT2:%.+]]> = not ir<%cmp2> 336; CHECK-NEXT: EMIT vp<[[SEL2:%.+]]> = select vp<[[NOT1]]> vp<[[NOT2]]> ir<false> 337; CHECK-NEXT: BLEND %ysd.0 = vp<[[PHI]]>/vp<[[OR1]]> ir<%psd>/vp<[[SEL2]]> 338; CHECK-NEXT: WIDEN store ir<%isd>, ir<%ysd.0> 339; CHECK-NEXT: EMIT vp<{{.+}}> = VF * UF +(nuw) vp<[[CAN_IV]]> 340; CHECK-NEXT: No successors 341; CHECK-NEXT:} 342; CHECK-NEXT:No successors 343; CHECK-NEXT:} 344; 345entry: 346 br label %loop 347 348loop: 349 %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ] 350 %isd = getelementptr inbounds i32, i32* %asd, i64 %iv 351 %lsd = load i32, i32* %isd, align 4 352 %psd = add nsw i32 %lsd, 23 353 %cmp1 = icmp slt i32 %lsd, 100 354 br i1 %cmp1, label %if.then, label %check, !dbg !7 355 356check: 357 %cmp2 = icmp sge i32 %lsd, 200 358 br i1 %cmp2, label %if.then, label %if.end, !dbg !8 359 360if.then: 361 %sd1 = sdiv i32 %psd, %lsd 362 br label %if.end 363 364if.end: 365 %ysd.0 = phi i32 [ %sd1, %if.then ], [ %psd, %check ] 366 store i32 %ysd.0, i32* %isd, align 4 367 %iv.next = add nuw nsw i64 %iv, 1 368 %exitcond = icmp eq i64 %iv.next, 128 369 br i1 %exitcond, label %exit, label %loop 370 371exit: 372 ret void 373} 374 375declare float @llvm.sqrt.f32(float) nounwind readnone 376declare float @llvm.fmuladd.f32(float, float, float) 377 378!llvm.dbg.cu = !{!0} 379!llvm.module.flags = !{!3, !4} 380 381!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !2) 382!1 = !DIFile(filename: "/tmp/s.c", directory: "/tmp") 383!2 = !{} 384!3 = !{i32 2, !"Debug Info Version", i32 3} 385!4 = !{i32 7, !"PIC Level", i32 2} 386!5 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 4, type: !6, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2) 387!6 = !DISubroutineType(types: !2) 388!7 = !DILocation(line: 5, column: 3, scope: !5) 389!8 = !DILocation(line: 5, column: 21, scope: !5) 390