1; REQUIRES: asserts
2
3; RUN: opt -loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -enable-interleaved-mem-accesses=true -enable-masked-interleaved-mem-accesses -disable-output %s 2>&1 | FileCheck %s
4
5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
6
7; Tests for printing VPlans.
8
9define void @print_call_and_memory(i64 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
10; CHECK-LABEL: Checking a loop in "print_call_and_memory"
11; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
12; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
13; CHECK-EMPTY:
14; CHECK-NEXT: <x1> vector loop: {
15; CHECK-NEXT: for.body:
16; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
17; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1>
18; CHECK-NEXT:   CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]>
19; CHECK-NEXT:   WIDEN ir<%lv> = load ir<%arrayidx>
20; CHECK-NEXT:   WIDEN-CALL ir<%call> = call @llvm.sqrt.f32(ir<%lv>)
21; CHECK-NEXT:   CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]>
22; CHECK-NEXT:   WIDEN store ir<%arrayidx2>, ir<%call>
23; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
24; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
25; CHECK-NEXT: No successors
26; CHECK-NEXT: }
27; CHECK-NEXT: No successors
28; CHECK-NEXT: }
29;
30entry:
31  %cmp6 = icmp sgt i64 %n, 0
32  br i1 %cmp6, label %for.body, label %for.end
33
34for.body:                                         ; preds = %entry, %for.body
35  %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
36  %arrayidx = getelementptr inbounds float, float* %y, i64 %iv
37  %lv = load float, float* %arrayidx, align 4
38  %call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone
39  %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv
40  store float %call, float* %arrayidx2, align 4
41  %iv.next = add i64 %iv, 1
42  %exitcond = icmp eq i64 %iv.next, %n
43  br i1 %exitcond, label %for.end, label %for.body
44
45for.end:                                          ; preds = %for.body, %entry
46  ret void
47}
48
49define void @print_widen_gep_and_select(i64 %n, float* noalias %y, float* noalias %x, float* %z) nounwind uwtable {
50; CHECK-LABEL: Checking a loop in "print_widen_gep_and_select"
51; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
52; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
53; CHECK-EMPTY:
54; CHECK-NEXT: <x1> vector loop: {
55; CHECK-NEXT: for.body:
56; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
57; CHECK-NEXT:   WIDEN-INDUCTION %iv = phi %iv.next, 0
58; CHECK-NEXT:   WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr ir<%y>, ir<%iv>
59; CHECK-NEXT:   WIDEN ir<%lv> = load ir<%arrayidx>
60; CHECK-NEXT:   WIDEN ir<%cmp> = icmp ir<%arrayidx>, ir<%z>
61; CHECK-NEXT:   WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01>
62; CHECK-NEXT:   WIDEN ir<%add> = fadd ir<%lv>, ir<%sel>
63; CHECK-NEXT:   CLONE ir<%arrayidx2> = getelementptr ir<%x>, ir<%iv>
64; CHECK-NEXT:   WIDEN store ir<%arrayidx2>, ir<%add>
65; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
66; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
67; CHECK-NEXT: No successors
68; CHECK-NEXT: }
69; CHECK-NEXT: No successors
70; CHECK-NEXT: }
71;
72entry:
73  %cmp6 = icmp sgt i64 %n, 0
74  br i1 %cmp6, label %for.body, label %for.end
75
76for.body:                                         ; preds = %entry, %for.body
77  %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
78  %arrayidx = getelementptr inbounds float, float* %y, i64 %iv
79  %lv = load float, float* %arrayidx, align 4
80  %cmp = icmp eq float* %arrayidx, %z
81  %sel = select i1 %cmp, float 10.0, float 20.0
82  %add = fadd float %lv, %sel
83  %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv
84  store float %add, float* %arrayidx2, align 4
85  %iv.next = add i64 %iv, 1
86  %exitcond = icmp eq i64 %iv.next, %n
87  br i1 %exitcond, label %for.end, label %for.body
88
89for.end:                                          ; preds = %for.body, %entry
90  ret void
91}
92
93define float @print_reduction(i64 %n, float* noalias %y) {
94; CHECK-LABEL: Checking a loop in "print_reduction"
95; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
96; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
97; CHECK-EMPTY:
98; CHECK-NEXT: <x1> vector loop: {
99; CHECK-NEXT: for.body:
100; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
101; CHECK-NEXT:   WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next>
102; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1>
103; CHECK-NEXT:   CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]>
104; CHECK-NEXT:   WIDEN ir<%lv> = load ir<%arrayidx>
105; CHECK-NEXT:   REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>)
106; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
107; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
108; CHECK-NEXT: No successors
109; CHECK-NEXT: }
110; CHECK-NEXT: No successors
111; CHECK-NEXT: }
112;
113entry:
114  br label %for.body
115
116for.body:                                         ; preds = %entry, %for.body
117  %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
118  %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ]
119  %arrayidx = getelementptr inbounds float, float* %y, i64 %iv
120  %lv = load float, float* %arrayidx, align 4
121  %red.next = fadd fast float %lv, %red
122  %iv.next = add i64 %iv, 1
123  %exitcond = icmp eq i64 %iv.next, %n
124  br i1 %exitcond, label %for.end, label %for.body
125
126for.end:                                          ; preds = %for.body, %entry
127  ret float %red.next
128}
129
130define void @print_replicate_predicated_phi(i64 %n, i64* %x) {
131; CHECK-LABEL: Checking a loop in "print_replicate_predicated_phi"
132; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
133; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
134; CHECK-EMPTY:
135; CHECK-NEXT: <x1> vector loop: {
136; CHECK-NEXT: for.body:
137; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
138; CHECK-NEXT:   WIDEN-INDUCTION %i = phi 0, %i.next
139; CHECK-NEXT:   WIDEN ir<%cmp> = icmp ir<%i>, ir<5>
140; CHECK-NEXT: Successor(s): if.then
141; CHECK-EMPTY:
142; CHECK-NEXT: if.then:
143; CHECK-NEXT: Successor(s): pred.udiv
144; CHECK-EMPTY:
145; CHECK-NEXT: <xVFxUF> pred.udiv: {
146; CHECK-NEXT:   pred.udiv.entry:
147; CHECK-NEXT:     BRANCH-ON-MASK ir<%cmp>
148; CHECK-NEXT:   Successor(s): pred.udiv.if, pred.udiv.continue
149; CHECK-NEXT:   CondBit: ir<%cmp>
150; CHECK-EMPTY:
151; CHECK-NEXT:   pred.udiv.if:
152; CHECK-NEXT:     REPLICATE ir<%tmp4> = udiv ir<%n>, ir<%i> (S->V)
153; CHECK-NEXT:   Successor(s): pred.udiv.continue
154; CHECK-EMPTY:
155; CHECK-NEXT:   pred.udiv.continue:
156; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%tmp4>
157; CHECK-NEXT:   No successors
158; CHECK-NEXT: }
159; CHECK-NEXT: Successor(s): if.then.0
160; CHECK-EMPTY:
161; CHECK-NEXT: if.then.0:
162; CHECK-NEXT: Successor(s): for.inc
163; CHECK-EMPTY:
164; CHECK-NEXT: for.inc:
165; CHECK-NEXT:   EMIT vp<[[NOT:%.+]]> = not ir<%cmp>
166; CHECK-NEXT:   BLEND %d = ir<0>/vp<[[NOT]]> vp<[[PRED]]>/ir<%cmp>
167; CHECK-NEXT:   CLONE ir<%idx> = getelementptr ir<%x>, ir<%i>
168; CHECK-NEXT:   WIDEN store ir<%idx>, ir<%d>
169; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
170; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
171; CHECK-NEXT: No successors
172; CHECK-NEXT: }
173; CHECK-NEXT: No successors
174; CHECK-NEXT: }
175;
176entry:
177  br label %for.body
178
179for.body:                                         ; preds = %for.inc, %entry
180  %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ]
181  %cmp = icmp ult i64 %i, 5
182  br i1 %cmp, label %if.then, label %for.inc
183
184if.then:                                          ; preds = %for.body
185  %tmp4 = udiv i64 %n, %i
186  br label %for.inc
187
188for.inc:                                          ; preds = %if.then, %for.body
189  %d = phi i64 [ 0, %for.body ], [ %tmp4, %if.then ]
190  %idx = getelementptr i64, i64* %x, i64 %i
191  store i64 %d, i64* %idx
192  %i.next = add nuw nsw i64 %i, 1
193  %cond = icmp slt i64 %i.next, %n
194  br i1 %cond, label %for.body, label %for.end
195
196for.end:                                          ; preds = %for.inc
197  ret void
198}
199
200@AB = common global [1024 x i32] zeroinitializer, align 4
201@CD = common global [1024 x i32] zeroinitializer, align 4
202
203define void @print_interleave_groups(i32 %C, i32 %D) {
204; CHECK-LABEL: Checking a loop in "print_interleave_groups"
205; CHECK:       VPlan 'Initial VPlan for VF={4},UF>=1' {
206; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
207; CHECK-EMPTY:
208; CHECK-NEXT: <x1> vector loop: {
209; CHECK-NEXT:  for.body:
210; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
211; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<4>
212; CHECK-NEXT:   CLONE ir<%gep.AB.0> = getelementptr ir<@AB>, ir<0>, vp<[[STEPS]]>
213; CHECK-NEXT:   INTERLEAVE-GROUP with factor 4 at %AB.0, ir<%gep.AB.0>
214; CHECK-NEXT:     ir<%AB.0> = load from index 0
215; CHECK-NEXT:     ir<%AB.1> = load from index 1
216; CHECK-NEXT:     ir<%AB.3> = load from index 3
217; CHECK-NEXT:   CLONE ir<%iv.plus.3> = add vp<[[STEPS]]>, ir<3>
218; CHECK-NEXT:   WIDEN ir<%add> = add ir<%AB.0>, ir<%AB.1>
219; CHECK-NEXT:   CLONE ir<%gep.CD.3> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.3>
220; CHECK-NEXT:   INTERLEAVE-GROUP with factor 4 at <badref>, ir<%gep.CD.3>
221; CHECK-NEXT:     store ir<%add> to index 0
222; CHECK-NEXT:     store ir<1> to index 1
223; CHECK-NEXT:     store ir<2> to index 2
224; CHECK-NEXT:     store ir<%AB.3> to index 3
225; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
226; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
227; CHECK-NEXT: No successors
228; CHECK-NEXT: }
229; CHECK-NEXT: No successors
230; CHECK-NEXT: }
231;
232entry:
233  br label %for.body
234
235for.body:
236  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
237  %gep.AB.0= getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv
238  %AB.0 = load i32, i32* %gep.AB.0, align 4
239  %iv.plus.1 = add i64 %iv, 1
240  %gep.AB.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.1
241  %AB.1 = load i32, i32* %gep.AB.1, align 4
242  %iv.plus.2 = add i64 %iv, 2
243  %iv.plus.3 = add i64 %iv, 3
244  %gep.AB.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.3
245  %AB.3 = load i32, i32* %gep.AB.3, align 4
246  %add = add nsw i32 %AB.0, %AB.1
247  %gep.CD.0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv
248  store i32 %add, i32* %gep.CD.0, align 4
249  %gep.CD.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.1
250  store i32 1, i32* %gep.CD.1, align 4
251  %gep.CD.2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.2
252  store i32 2, i32* %gep.CD.2, align 4
253  %gep.CD.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.3
254  store i32 %AB.3, i32* %gep.CD.3, align 4
255  %iv.next = add nuw nsw i64 %iv, 4
256  %cmp = icmp slt i64 %iv.next, 1024
257  br i1 %cmp, label %for.body, label %for.end
258
259for.end:
260  ret void
261}
262
263define float @print_fmuladd_strict(float* %a, float* %b, i64 %n) {
264; CHECK-LABEL: Checking a loop in "print_fmuladd_strict"
265; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
266; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
267; CHECK-EMPTY:
268; CHECK-NEXT: <x1> vector loop: {
269; CHECK-NEXT: for.body:
270; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
271; CHECK-NEXT:   WIDEN-REDUCTION-PHI ir<%sum.07> = phi ir<0.000000e+00>, ir<%muladd>
272; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1>
273; CHECK-NEXT:   CLONE ir<%arrayidx> = getelementptr ir<%a>, vp<[[STEPS]]>
274; CHECK-NEXT:   WIDEN ir<%l.a> = load ir<%arrayidx>
275; CHECK-NEXT:   CLONE ir<%arrayidx2> = getelementptr ir<%b>, vp<[[STEPS]]>
276; CHECK-NEXT:   WIDEN ir<%l.b> = load ir<%arrayidx2>
277; CHECK-NEXT:   EMIT vp<[[FMUL:%.]]> = fmul nnan ninf nsz ir<%l.a> ir<%l.b>
278; CHECK-NEXT:   REDUCE ir<[[MULADD:%.+]]> = ir<%sum.07> + nnan ninf nsz reduce.fadd (vp<[[FMUL]]>)
279; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
280; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
281; CHECK-NEXT:   No successors
282; CHECK-NEXT: }
283
284entry:
285  br label %for.body
286
287for.body:
288  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
289  %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ]
290  %arrayidx = getelementptr inbounds float, float* %a, i64 %iv
291  %l.a = load float, float* %arrayidx, align 4
292  %arrayidx2 = getelementptr inbounds float, float* %b, i64 %iv
293  %l.b = load float, float* %arrayidx2, align 4
294  %muladd = tail call nnan ninf nsz float @llvm.fmuladd.f32(float %l.a, float %l.b, float %sum.07)
295  %iv.next = add nuw nsw i64 %iv, 1
296  %exitcond.not = icmp eq i64 %iv.next, %n
297  br i1 %exitcond.not, label %for.end, label %for.body
298
299for.end:
300  ret float %muladd
301}
302
303define void @debug_loc_vpinstruction(i32* nocapture %asd, i32* nocapture %bsd) !dbg !5 {
304; CHECK-LABEL: Checking a loop in "debug_loc_vpinstruction"
305; CHECK:    VPlan 'Initial VPlan for VF={4},UF>=1' {
306; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
307; CHECK-EMPTY:
308; CHECK-NEXT: <x1> vector loop: {
309; CHECK-NEXT:  loop:
310; CHECK-NEXT:    EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
311; CHECK-NEXT:    vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1>
312; CHECK-NEXT:    CLONE ir<%isd> = getelementptr ir<%asd>, vp<[[STEPS]]>
313; CHECK-NEXT:    WIDEN ir<%lsd> = load ir<%isd>
314; CHECK-NEXT:    WIDEN ir<%psd> = add ir<%lsd>, ir<23>
315; CHECK-NEXT:    WIDEN ir<%cmp1> = icmp ir<%lsd>, ir<100>
316; CHECK-NEXT:  Successor(s): check
317; CHECK-EMPTY:
318; CHECK-NEXT:  check:
319; CHECK-NEXT:    WIDEN ir<%cmp2> = icmp ir<%lsd>, ir<200>
320; CHECK-NEXT:  Successor(s): if.then
321; CHECK-EMPTY:
322; CHECK-NEXT:  if.then:
323; CHECK-NEXT:    EMIT vp<[[NOT1:%.+]]> = not ir<%cmp1>, !dbg /tmp/s.c:5:3
324; CHECK-NEXT:    EMIT vp<[[SEL1:%.+]]> = select vp<[[NOT1]]> ir<%cmp2> ir<false>, !dbg /tmp/s.c:5:21
325; CHECK-NEXT:    EMIT vp<[[OR1:%.+]]> = or vp<[[SEL1]]> ir<%cmp1>
326; CHECK-NEXT:  Successor(s): pred.sdiv
327; CHECK-EMPTY:
328; CHECK-NEXT:  <xVFxUF> pred.sdiv: {
329; CHECK-NEXT:    pred.sdiv.entry:
330; CHECK-NEXT:      BRANCH-ON-MASK vp<[[OR1]]>
331; CHECK-NEXT:    Successor(s): pred.sdiv.if, pred.sdiv.continue
332; CHECK-NEXT:    CondBit: vp<[[OR1]]> (if.then)
333; CHECK-EMPTY:
334; CHECK-NEXT:    pred.sdiv.if:
335; CHECK-NEXT:      REPLICATE ir<%sd1> = sdiv ir<%psd>, ir<%lsd> (S->V)
336; CHECK-NEXT:    Successor(s): pred.sdiv.continue
337; CHECK-EMPTY:
338; CHECK-NEXT:    pred.sdiv.continue:
339; CHECK-NEXT:      PHI-PREDICATED-INSTRUCTION vp<[[PHI:%.+]]> = ir<%sd1>
340; CHECK-NEXT:    No successors
341; CHECK-NEXT:  }
342; CHECK-NEXT:  Successor(s): if.then.0
343; CHECK-EMPTY:
344; CHECK-NEXT:  if.then.0:
345; CHECK-NEXT:  Successor(s): if.end
346; CHECK-EMPTY:
347; CHECK-NEXT:  if.end:
348; CHECK-NEXT:    EMIT vp<[[NOT2:%.+]]> = not ir<%cmp2>
349; CHECK-NEXT:    EMIT vp<[[SEL2:%.+]]> = select vp<[[NOT1]]> vp<[[NOT2]]> ir<false>
350; CHECK-NEXT:    BLEND %ysd.0 = vp<[[PHI]]>/vp<[[OR1]]> ir<%psd>/vp<[[SEL2]]>
351; CHECK-NEXT:    WIDEN store ir<%isd>, ir<%ysd.0>
352; CHECK-NEXT:    EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
353; CHECK-NEXT:    EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
354; CHECK-NEXT:  No successors
355; CHECK-NEXT:}
356; CHECK-NEXT:No successors
357; CHECK-NEXT:}
358;
359entry:
360  br label %loop
361
362loop:
363  %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ]
364  %isd = getelementptr inbounds i32, i32* %asd, i64 %iv
365  %lsd = load i32, i32* %isd, align 4
366  %psd = add nsw i32 %lsd, 23
367  %cmp1 = icmp slt i32 %lsd, 100
368  br i1 %cmp1, label %if.then, label %check, !dbg !7
369
370check:
371  %cmp2 = icmp sge i32 %lsd, 200
372  br i1 %cmp2, label %if.then, label %if.end, !dbg !8
373
374if.then:
375  %sd1 = sdiv i32 %psd, %lsd
376  br label %if.end
377
378if.end:
379  %ysd.0 = phi i32 [ %sd1, %if.then ], [ %psd, %check ]
380  store i32 %ysd.0, i32* %isd, align 4
381  %iv.next = add nuw nsw i64 %iv, 1
382  %exitcond = icmp eq i64 %iv.next, 128
383  br i1 %exitcond, label %exit, label %loop
384
385exit:
386  ret void
387}
388
389declare float @llvm.sqrt.f32(float) nounwind readnone
390declare float @llvm.fmuladd.f32(float, float, float)
391
392!llvm.dbg.cu = !{!0}
393!llvm.module.flags = !{!3, !4}
394
395!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !2)
396!1 = !DIFile(filename: "/tmp/s.c", directory: "/tmp")
397!2 = !{}
398!3 = !{i32 2, !"Debug Info Version", i32 3}
399!4 = !{i32 7, !"PIC Level", i32 2}
400!5 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 4, type: !6, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2)
401!6 = !DISubroutineType(types: !2)
402!7 = !DILocation(line: 5, column: 3, scope: !5)
403!8 = !DILocation(line: 5, column: 21, scope: !5)
404