1; REQUIRES: asserts 2 3; RUN: opt -loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -enable-interleaved-mem-accesses=true -enable-masked-interleaved-mem-accesses -disable-output %s 2>&1 | FileCheck %s 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 6 7; Tests for printing VPlans. 8 9define void @print_call_and_memory(i64 %n, float* noalias %y, float* noalias %x) nounwind uwtable { 10; CHECK-LABEL: Checking a loop in 'print_call_and_memory' 11; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 12; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 13; CHECK-EMPTY: 14; CHECK-NEXT: vector.ph: 15; CHECK-NEXT: Successor(s): vector loop 16; CHECK-EMPTY: 17; CHECK-NEXT: <x1> vector loop: { 18; CHECK-NEXT: vector.body: 19; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 20; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 21; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]> 22; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 23; CHECK-NEXT: WIDEN-CALL ir<%call> = call @llvm.sqrt.f32(ir<%lv>) 24; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]> 25; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%call> 26; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 27; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 28; CHECK-NEXT: No successors 29; CHECK-NEXT: } 30; CHECK-NEXT: Successor(s): middle.block 31; CHECK-EMPTY: 32; CHECK-NEXT: middle.block: 33; CHECK-NEXT: No successors 34; CHECK-NEXT: } 35; 36entry: 37 %cmp6 = icmp sgt i64 %n, 0 38 br i1 %cmp6, label %for.body, label %for.end 39 40for.body: ; preds = %entry, %for.body 41 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 42 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 43 %lv = load float, float* %arrayidx, align 4 44 %call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone 45 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 46 store float %call, float* %arrayidx2, align 4 47 %iv.next = add i64 %iv, 1 48 %exitcond = icmp eq i64 %iv.next, %n 49 br i1 %exitcond, label %for.end, label %for.body 50 51for.end: ; preds = %for.body, %entry 52 ret void 53} 54 55define void @print_widen_gep_and_select(i64 %n, float* noalias %y, float* noalias %x, float* %z) nounwind uwtable { 56; CHECK-LABEL: Checking a loop in 'print_widen_gep_and_select' 57; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 58; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 59; CHECK-EMPTY: 60; CHECK-NEXT: vector.ph: 61; CHECK-NEXT: Successor(s): vector loop 62; CHECK-EMPTY: 63; CHECK-NEXT: <x1> vector loop: { 64; CHECK-NEXT: vector.body: 65; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 66; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0, ir<1> 67; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 68; CHECK-NEXT: WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr ir<%y>, ir<%iv> 69; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 70; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%arrayidx>, ir<%z> 71; CHECK-NEXT: WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01> 72; CHECK-NEXT: WIDEN ir<%add> = fadd ir<%lv>, ir<%sel> 73; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]> 74; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%add> 75; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 76; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 77; CHECK-NEXT: No successors 78; CHECK-NEXT: } 79; CHECK-NEXT: Successor(s): middle.block 80; CHECK-EMPTY: 81; CHECK-NEXT: middle.block: 82; CHECK-NEXT: No successors 83; CHECK-NEXT: } 84; 85entry: 86 %cmp6 = icmp sgt i64 %n, 0 87 br i1 %cmp6, label %for.body, label %for.end 88 89for.body: ; preds = %entry, %for.body 90 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 91 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 92 %lv = load float, float* %arrayidx, align 4 93 %cmp = icmp eq float* %arrayidx, %z 94 %sel = select i1 %cmp, float 10.0, float 20.0 95 %add = fadd float %lv, %sel 96 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 97 store float %add, float* %arrayidx2, align 4 98 %iv.next = add i64 %iv, 1 99 %exitcond = icmp eq i64 %iv.next, %n 100 br i1 %exitcond, label %for.end, label %for.body 101 102for.end: ; preds = %for.body, %entry 103 ret void 104} 105 106define float @print_reduction(i64 %n, float* noalias %y) { 107; CHECK-LABEL: Checking a loop in 'print_reduction' 108; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 109; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 110; CHECK-EMPTY: 111; CHECK-NEXT: vector.ph: 112; CHECK-NEXT: Successor(s): vector loop 113; CHECK-EMPTY: 114; CHECK-NEXT: <x1> vector loop: { 115; CHECK-NEXT: vector.body: 116; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 117; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> 118; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 119; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]> 120; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 121; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) 122; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 123; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 124; CHECK-NEXT: No successors 125; CHECK-NEXT: } 126; CHECK-NEXT: Successor(s): middle.block 127; CHECK-EMPTY: 128; CHECK-NEXT: middle.block: 129; CHECK-NEXT: No successors 130; CHECK-NEXT: } 131; 132entry: 133 br label %for.body 134 135for.body: ; preds = %entry, %for.body 136 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 137 %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ] 138 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 139 %lv = load float, float* %arrayidx, align 4 140 %red.next = fadd fast float %lv, %red 141 %iv.next = add i64 %iv, 1 142 %exitcond = icmp eq i64 %iv.next, %n 143 br i1 %exitcond, label %for.end, label %for.body 144 145for.end: ; preds = %for.body, %entry 146 ret float %red.next 147} 148 149define void @print_replicate_predicated_phi(i64 %n, i64* %x) { 150; CHECK-LABEL: Checking a loop in 'print_replicate_predicated_phi' 151; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 152; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 153; CHECK-EMPTY: 154; CHECK-NEXT: vector.ph: 155; CHECK-NEXT: Successor(s): vector loop 156; CHECK-EMPTY: 157; CHECK-NEXT: <x1> vector loop: { 158; CHECK-NEXT: vector.body: 159; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 160; CHECK-NEXT: WIDEN-INDUCTION %i = phi 0, %i.next, ir<1> 161; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 162; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%i>, ir<5> 163; CHECK-NEXT: Successor(s): if.then 164; CHECK-EMPTY: 165; CHECK-NEXT: if.then: 166; CHECK-NEXT: Successor(s): pred.udiv 167; CHECK-EMPTY: 168; CHECK-NEXT: <xVFxUF> pred.udiv: { 169; CHECK-NEXT: pred.udiv.entry: 170; CHECK-NEXT: BRANCH-ON-MASK ir<%cmp> 171; CHECK-NEXT: Successor(s): pred.udiv.if, pred.udiv.continue 172; CHECK-NEXT: CondBit: ir<%cmp> 173; CHECK-EMPTY: 174; CHECK-NEXT: pred.udiv.if: 175; CHECK-NEXT: REPLICATE ir<%tmp4> = udiv ir<%n>, vp<[[STEPS]]> (S->V) 176; CHECK-NEXT: Successor(s): pred.udiv.continue 177; CHECK-EMPTY: 178; CHECK-NEXT: pred.udiv.continue: 179; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%tmp4> 180; CHECK-NEXT: No successors 181; CHECK-NEXT: } 182; CHECK-NEXT: Successor(s): if.then.0 183; CHECK-EMPTY: 184; CHECK-NEXT: if.then.0: 185; CHECK-NEXT: Successor(s): for.inc 186; CHECK-EMPTY: 187; CHECK-NEXT: for.inc: 188; CHECK-NEXT: EMIT vp<[[NOT:%.+]]> = not ir<%cmp> 189; CHECK-NEXT: BLEND %d = ir<0>/vp<[[NOT]]> vp<[[PRED]]>/ir<%cmp> 190; CHECK-NEXT: CLONE ir<%idx> = getelementptr ir<%x>, vp<[[STEPS]]> 191; CHECK-NEXT: WIDEN store ir<%idx>, ir<%d> 192; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 193; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 194; CHECK-NEXT: No successors 195; CHECK-NEXT: } 196; CHECK-NEXT: Successor(s): middle.block 197; CHECK-EMPTY: 198; CHECK-NEXT: middle.block: 199; CHECK-NEXT: No successors 200; CHECK-NEXT: } 201; 202entry: 203 br label %for.body 204 205for.body: ; preds = %for.inc, %entry 206 %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ] 207 %cmp = icmp ult i64 %i, 5 208 br i1 %cmp, label %if.then, label %for.inc 209 210if.then: ; preds = %for.body 211 %tmp4 = udiv i64 %n, %i 212 br label %for.inc 213 214for.inc: ; preds = %if.then, %for.body 215 %d = phi i64 [ 0, %for.body ], [ %tmp4, %if.then ] 216 %idx = getelementptr i64, i64* %x, i64 %i 217 store i64 %d, i64* %idx 218 %i.next = add nuw nsw i64 %i, 1 219 %cond = icmp slt i64 %i.next, %n 220 br i1 %cond, label %for.body, label %for.end 221 222for.end: ; preds = %for.inc 223 ret void 224} 225 226@AB = common global [1024 x i32] zeroinitializer, align 4 227@CD = common global [1024 x i32] zeroinitializer, align 4 228 229define void @print_interleave_groups(i32 %C, i32 %D) { 230; CHECK-LABEL: Checking a loop in 'print_interleave_groups' 231; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 232; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 233; CHECK-EMPTY: 234; CHECK-NEXT: vector.ph: 235; CHECK-NEXT: Successor(s): vector loop 236; CHECK-EMPTY: 237; CHECK-NEXT: <x1> vector loop: { 238; CHECK-NEXT: vector.body: 239; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 240; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<4> 241; CHECK-NEXT: CLONE ir<%gep.AB.0> = getelementptr ir<@AB>, ir<0>, vp<[[STEPS]]> 242; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at %AB.0, ir<%gep.AB.0> 243; CHECK-NEXT: ir<%AB.0> = load from index 0 244; CHECK-NEXT: ir<%AB.1> = load from index 1 245; CHECK-NEXT: ir<%AB.3> = load from index 3 246; CHECK-NEXT: CLONE ir<%iv.plus.3> = add vp<[[STEPS]]>, ir<3> 247; CHECK-NEXT: WIDEN ir<%add> = add ir<%AB.0>, ir<%AB.1> 248; CHECK-NEXT: CLONE ir<%gep.CD.3> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.3> 249; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at <badref>, ir<%gep.CD.3> 250; CHECK-NEXT: store ir<%add> to index 0 251; CHECK-NEXT: store ir<1> to index 1 252; CHECK-NEXT: store ir<2> to index 2 253; CHECK-NEXT: store ir<%AB.3> to index 3 254; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 255; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 256; CHECK-NEXT: No successors 257; CHECK-NEXT: } 258; CHECK-NEXT: Successor(s): middle.block 259; CHECK-EMPTY: 260; CHECK-NEXT: middle.block: 261; CHECK-NEXT: No successors 262; CHECK-NEXT: } 263; 264entry: 265 br label %for.body 266 267for.body: 268 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 269 %gep.AB.0= getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv 270 %AB.0 = load i32, i32* %gep.AB.0, align 4 271 %iv.plus.1 = add i64 %iv, 1 272 %gep.AB.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.1 273 %AB.1 = load i32, i32* %gep.AB.1, align 4 274 %iv.plus.2 = add i64 %iv, 2 275 %iv.plus.3 = add i64 %iv, 3 276 %gep.AB.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.3 277 %AB.3 = load i32, i32* %gep.AB.3, align 4 278 %add = add nsw i32 %AB.0, %AB.1 279 %gep.CD.0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv 280 store i32 %add, i32* %gep.CD.0, align 4 281 %gep.CD.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.1 282 store i32 1, i32* %gep.CD.1, align 4 283 %gep.CD.2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.2 284 store i32 2, i32* %gep.CD.2, align 4 285 %gep.CD.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.3 286 store i32 %AB.3, i32* %gep.CD.3, align 4 287 %iv.next = add nuw nsw i64 %iv, 4 288 %cmp = icmp slt i64 %iv.next, 1024 289 br i1 %cmp, label %for.body, label %for.end 290 291for.end: 292 ret void 293} 294 295define float @print_fmuladd_strict(float* %a, float* %b, i64 %n) { 296; CHECK-LABEL: Checking a loop in 'print_fmuladd_strict' 297; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 298; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 299; CHECK-EMPTY: 300; CHECK-NEXT: vector.ph: 301; CHECK-NEXT: Successor(s): vector loop 302; CHECK-EMPTY: 303; CHECK-NEXT: <x1> vector loop: { 304; CHECK-NEXT: vector.body: 305; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 306; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%sum.07> = phi ir<0.000000e+00>, ir<%muladd> 307; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 308; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%a>, vp<[[STEPS]]> 309; CHECK-NEXT: WIDEN ir<%l.a> = load ir<%arrayidx> 310; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%b>, vp<[[STEPS]]> 311; CHECK-NEXT: WIDEN ir<%l.b> = load ir<%arrayidx2> 312; CHECK-NEXT: EMIT vp<[[FMUL:%.+]]> = fmul nnan ninf nsz ir<%l.a> ir<%l.b> 313; CHECK-NEXT: REDUCE ir<[[MULADD:%.+]]> = ir<%sum.07> + nnan ninf nsz reduce.fadd (vp<[[FMUL]]>) 314; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 315; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 316; CHECK-NEXT: No successors 317; CHECK-NEXT: } 318; CHECK-NEXT: Successor(s): middle.block 319; CHECK-EMPTY: 320; CHECK-NEXT: middle.block: 321; CHECK-NEXT: No successors 322; CHECK-NEXT:} 323 324entry: 325 br label %for.body 326 327for.body: 328 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 329 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ] 330 %arrayidx = getelementptr inbounds float, float* %a, i64 %iv 331 %l.a = load float, float* %arrayidx, align 4 332 %arrayidx2 = getelementptr inbounds float, float* %b, i64 %iv 333 %l.b = load float, float* %arrayidx2, align 4 334 %muladd = tail call nnan ninf nsz float @llvm.fmuladd.f32(float %l.a, float %l.b, float %sum.07) 335 %iv.next = add nuw nsw i64 %iv, 1 336 %exitcond.not = icmp eq i64 %iv.next, %n 337 br i1 %exitcond.not, label %for.end, label %for.body 338 339for.end: 340 ret float %muladd 341} 342 343define void @debug_loc_vpinstruction(i32* nocapture %asd, i32* nocapture %bsd) !dbg !5 { 344; CHECK-LABEL: Checking a loop in 'debug_loc_vpinstruction' 345; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 346; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 347; CHECK-EMPTY: 348; CHECK-NEXT: vector.ph: 349; CHECK-NEXT: Successor(s): vector loop 350; CHECK-EMPTY: 351; CHECK-NEXT: <x1> vector loop: { 352; CHECK-NEXT: vector.body: 353; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 354; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 355; CHECK-NEXT: CLONE ir<%isd> = getelementptr ir<%asd>, vp<[[STEPS]]> 356; CHECK-NEXT: WIDEN ir<%lsd> = load ir<%isd> 357; CHECK-NEXT: WIDEN ir<%psd> = add ir<%lsd>, ir<23> 358; CHECK-NEXT: WIDEN ir<%cmp1> = icmp ir<%lsd>, ir<100> 359; CHECK-NEXT: Successor(s): check 360; CHECK-EMPTY: 361; CHECK-NEXT: check: 362; CHECK-NEXT: WIDEN ir<%cmp2> = icmp ir<%lsd>, ir<200> 363; CHECK-NEXT: Successor(s): if.then 364; CHECK-EMPTY: 365; CHECK-NEXT: if.then: 366; CHECK-NEXT: EMIT vp<[[NOT1:%.+]]> = not ir<%cmp1>, !dbg /tmp/s.c:5:3 367; CHECK-NEXT: EMIT vp<[[SEL1:%.+]]> = select vp<[[NOT1]]> ir<%cmp2> ir<false>, !dbg /tmp/s.c:5:21 368; CHECK-NEXT: EMIT vp<[[OR1:%.+]]> = or vp<[[SEL1]]> ir<%cmp1> 369; CHECK-NEXT: Successor(s): pred.sdiv 370; CHECK-EMPTY: 371; CHECK-NEXT: <xVFxUF> pred.sdiv: { 372; CHECK-NEXT: pred.sdiv.entry: 373; CHECK-NEXT: BRANCH-ON-MASK vp<[[OR1]]> 374; CHECK-NEXT: Successor(s): pred.sdiv.if, pred.sdiv.continue 375; CHECK-NEXT: CondBit: vp<[[OR1]]> (if.then) 376; CHECK-EMPTY: 377; CHECK-NEXT: pred.sdiv.if: 378; CHECK-NEXT: REPLICATE ir<%sd1> = sdiv ir<%psd>, ir<%lsd> (S->V) 379; CHECK-NEXT: Successor(s): pred.sdiv.continue 380; CHECK-EMPTY: 381; CHECK-NEXT: pred.sdiv.continue: 382; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PHI:%.+]]> = ir<%sd1> 383; CHECK-NEXT: No successors 384; CHECK-NEXT: } 385; CHECK-NEXT: Successor(s): if.then.0 386; CHECK-EMPTY: 387; CHECK-NEXT: if.then.0: 388; CHECK-NEXT: Successor(s): if.end 389; CHECK-EMPTY: 390; CHECK-NEXT: if.end: 391; CHECK-NEXT: EMIT vp<[[NOT2:%.+]]> = not ir<%cmp2> 392; CHECK-NEXT: EMIT vp<[[SEL2:%.+]]> = select vp<[[NOT1]]> vp<[[NOT2]]> ir<false> 393; CHECK-NEXT: BLEND %ysd.0 = vp<[[PHI]]>/vp<[[OR1]]> ir<%psd>/vp<[[SEL2]]> 394; CHECK-NEXT: WIDEN store ir<%isd>, ir<%ysd.0> 395; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 396; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 397; CHECK-NEXT: No successors 398; CHECK-NEXT:} 399; CHECK-NEXT: Successor(s): middle.block 400; CHECK-EMPTY: 401; CHECK-NEXT: middle.block: 402; CHECK-NEXT: No successors 403; CHECK-NEXT:} 404; 405entry: 406 br label %loop 407 408loop: 409 %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ] 410 %isd = getelementptr inbounds i32, i32* %asd, i64 %iv 411 %lsd = load i32, i32* %isd, align 4 412 %psd = add nsw i32 %lsd, 23 413 %cmp1 = icmp slt i32 %lsd, 100 414 br i1 %cmp1, label %if.then, label %check, !dbg !7 415 416check: 417 %cmp2 = icmp sge i32 %lsd, 200 418 br i1 %cmp2, label %if.then, label %if.end, !dbg !8 419 420if.then: 421 %sd1 = sdiv i32 %psd, %lsd 422 br label %if.end 423 424if.end: 425 %ysd.0 = phi i32 [ %sd1, %if.then ], [ %psd, %check ] 426 store i32 %ysd.0, i32* %isd, align 4 427 %iv.next = add nuw nsw i64 %iv, 1 428 %exitcond = icmp eq i64 %iv.next, 128 429 br i1 %exitcond, label %exit, label %loop 430 431exit: 432 ret void 433} 434 435declare float @llvm.sqrt.f32(float) nounwind readnone 436declare float @llvm.fmuladd.f32(float, float, float) 437 438define void @print_expand_scev(i64 %y, i8* %ptr) { 439; CHECK-LABEL: Checking a loop in 'print_expand_scev' 440; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 441; CHECK-NEXT: Live-in vp<%0> = vector-trip-count 442; CHECK-EMPTY: 443; CHECK-NEXT: vector.ph: 444; CHECK-NEXT: EMIT vp<[[EXP_SCEV:%.+]]> = EXPAND SCEV (1 + (%y /u 492802768830814060))<nuw><nsw> 445; CHECK-NEXT: Successor(s): vector loop 446; CHECK-EMPTY: 447; CHECK-NEXT: <x1> vector loop: { 448; CHECK-NEXT: vector.body: 449; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 450; CHECK-NEXT: WIDEN-INDUCTION\l" + 451; CHECK-NEXT: " %iv = phi %iv.next, 0\l" + 452; CHECK-NEXT: " ir<%v2>, vp<[[EXP_SCEV]]> 453; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, vp<[[EXP_SCEV]]> 454; CHECK-NEXT: WIDEN ir<%v3> = add ir<%v2>, ir<1> 455; CHECK-NEXT: REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]> 456; CHECK-NEXT: REPLICATE store ir<%v3>, ir<%gep> 457; CHECK-NEXT: EMIT vp<[[CAN_INC:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 458; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_INC]]> vp<%0> 459; CHECK-NEXT: No successors 460; CHECK-NEXT: } 461; CHECK-NEXT: Successor(s): middle.block 462; CHECK-EMPTY: 463; CHECK-NEXT: middle.block: 464; CHECK-NEXT: No successors 465; CHECK-NEXT: } 466; 467entry: 468 %div = udiv i64 %y, 492802768830814060 469 %inc = add i64 %div, 1 470 br label %loop 471 472loop: ; preds = %loop, %entry 473 %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] 474 %v2 = trunc i64 %iv to i8 475 %v3 = add i8 %v2, 1 476 %gep = getelementptr inbounds i8, i8* %ptr, i64 %iv 477 store i8 %v3, i8* %gep 478 479 %cmp15 = icmp slt i8 %v3, 10000 480 %iv.next = add i64 %iv, %inc 481 br i1 %cmp15, label %loop, label %loop.exit 482 483loop.exit: 484 ret void 485} 486 487!llvm.dbg.cu = !{!0} 488!llvm.module.flags = !{!3, !4} 489 490!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !2) 491!1 = !DIFile(filename: "/tmp/s.c", directory: "/tmp") 492!2 = !{} 493!3 = !{i32 2, !"Debug Info Version", i32 3} 494!4 = !{i32 7, !"PIC Level", i32 2} 495!5 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 4, type: !6, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2) 496!6 = !DISubroutineType(types: !2) 497!7 = !DILocation(line: 5, column: 3, scope: !5) 498!8 = !DILocation(line: 5, column: 21, scope: !5) 499