1; REQUIRES: asserts 2 3; RUN: opt -loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -enable-interleaved-mem-accesses=true -enable-masked-interleaved-mem-accesses -disable-output %s 2>&1 | FileCheck %s 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 6 7; Tests for printing VPlans. 8 9define void @print_call_and_memory(i64 %n, float* noalias %y, float* noalias %x) nounwind uwtable { 10; CHECK-LABEL: Checking a loop in 'print_call_and_memory' 11; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 12; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 13; CHECK-EMPTY: 14; CHECK-NEXT: vector.ph: 15; CHECK-NEXT: Successor(s): vector loop 16; CHECK-EMPTY: 17; CHECK-NEXT: <x1> vector loop: { 18; CHECK-NEXT: vector.body: 19; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 20; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 21; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]> 22; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 23; CHECK-NEXT: WIDEN-CALL ir<%call> = call @llvm.sqrt.f32(ir<%lv>) 24; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]> 25; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%call> 26; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 27; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 28; CHECK-NEXT: No successors 29; CHECK-NEXT: } 30; CHECK-NEXT: Successor(s): middle.block 31; CHECK-EMPTY: 32; CHECK-NEXT: middle.block: 33; CHECK-NEXT: No successors 34; CHECK-NEXT: } 35; 36entry: 37 %cmp6 = icmp sgt i64 %n, 0 38 br i1 %cmp6, label %for.body, label %for.end 39 40for.body: ; preds = %entry, %for.body 41 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 42 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 43 %lv = load float, float* %arrayidx, align 4 44 %call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone 45 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 46 store float %call, float* %arrayidx2, align 4 47 %iv.next = add i64 %iv, 1 48 %exitcond = icmp eq i64 %iv.next, %n 49 br i1 %exitcond, label %for.end, label %for.body 50 51for.end: ; preds = %for.body, %entry 52 ret void 53} 54 55define void @print_widen_gep_and_select(i64 %n, float* noalias %y, float* noalias %x, float* %z) nounwind uwtable { 56; CHECK-LABEL: Checking a loop in 'print_widen_gep_and_select' 57; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 58; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 59; CHECK-EMPTY: 60; CHECK-NEXT: vector.ph: 61; CHECK-NEXT: Successor(s): vector loop 62; CHECK-EMPTY: 63; CHECK-NEXT: <x1> vector loop: { 64; CHECK-NEXT: vector.body: 65; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 66; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0, ir<1> 67; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 68; CHECK-NEXT: WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr ir<%y>, ir<%iv> 69; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 70; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%arrayidx>, ir<%z> 71; CHECK-NEXT: WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01> 72; CHECK-NEXT: WIDEN ir<%add> = fadd ir<%lv>, ir<%sel> 73; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]> 74; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%add> 75; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 76; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 77; CHECK-NEXT: No successors 78; CHECK-NEXT: } 79; CHECK-NEXT: Successor(s): middle.block 80; CHECK-EMPTY: 81; CHECK-NEXT: middle.block: 82; CHECK-NEXT: No successors 83; CHECK-NEXT: } 84; 85entry: 86 %cmp6 = icmp sgt i64 %n, 0 87 br i1 %cmp6, label %for.body, label %for.end 88 89for.body: ; preds = %entry, %for.body 90 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 91 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 92 %lv = load float, float* %arrayidx, align 4 93 %cmp = icmp eq float* %arrayidx, %z 94 %sel = select i1 %cmp, float 10.0, float 20.0 95 %add = fadd float %lv, %sel 96 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 97 store float %add, float* %arrayidx2, align 4 98 %iv.next = add i64 %iv, 1 99 %exitcond = icmp eq i64 %iv.next, %n 100 br i1 %exitcond, label %for.end, label %for.body 101 102for.end: ; preds = %for.body, %entry 103 ret void 104} 105 106define float @print_reduction(i64 %n, float* noalias %y) { 107; CHECK-LABEL: Checking a loop in 'print_reduction' 108; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 109; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 110; CHECK-EMPTY: 111; CHECK-NEXT: vector.ph: 112; CHECK-NEXT: Successor(s): vector loop 113; CHECK-EMPTY: 114; CHECK-NEXT: <x1> vector loop: { 115; CHECK-NEXT: vector.body: 116; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 117; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> 118; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 119; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]> 120; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 121; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) 122; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 123; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 124; CHECK-NEXT: No successors 125; CHECK-NEXT: } 126; CHECK-NEXT: Successor(s): middle.block 127; CHECK-EMPTY: 128; CHECK-NEXT: middle.block: 129; CHECK-NEXT: No successors 130; CHECK-NEXT: } 131; 132entry: 133 br label %for.body 134 135for.body: ; preds = %entry, %for.body 136 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 137 %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ] 138 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 139 %lv = load float, float* %arrayidx, align 4 140 %red.next = fadd fast float %lv, %red 141 %iv.next = add i64 %iv, 1 142 %exitcond = icmp eq i64 %iv.next, %n 143 br i1 %exitcond, label %for.end, label %for.body 144 145for.end: ; preds = %for.body, %entry 146 ret float %red.next 147} 148 149define void @print_reduction_with_invariant_store(i64 %n, float* noalias %y, float* noalias %dst) { 150; CHECK-LABEL: Checking a loop in 'print_reduction_with_invariant_store' 151; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 152; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 153; CHECK-EMPTY: 154; CHECK-NEXT: vector.ph: 155; CHECK-NEXT: Successor(s): vector loop 156; CHECK-EMPTY: 157; CHECK-NEXT: <x1> vector loop: { 158; CHECK-NEXT: vector.body: 159; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 160; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> 161; CHECK-NEXT: vp<[[IV:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 162; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[IV]]> 163; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 164; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) (with final reduction value stored in invariant address sank outside of loop) 165; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 166; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 167; CHECK-NEXT: No successors 168; CHECK-NEXT: } 169; CHECK-NEXT: Successor(s): middle.block 170; CHECK-EMPTY: 171; CHECK-NEXT: middle.block: 172; CHECK-NEXT: No successors 173; CHECK-NEXT: } 174; 175entry: 176 br label %for.body 177 178for.body: ; preds = %entry, %for.body 179 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 180 %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ] 181 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 182 %lv = load float, float* %arrayidx, align 4 183 %red.next = fadd fast float %lv, %red 184 store float %red.next, float* %dst, align 4 185 %iv.next = add i64 %iv, 1 186 %exitcond = icmp eq i64 %iv.next, %n 187 br i1 %exitcond, label %for.end, label %for.body 188 189for.end: ; preds = %for.body, %entry 190 ret void 191} 192 193define void @print_replicate_predicated_phi(i64 %n, i64* %x) { 194; CHECK-LABEL: Checking a loop in 'print_replicate_predicated_phi' 195; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 196; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 197; CHECK-EMPTY: 198; CHECK-NEXT: vector.ph: 199; CHECK-NEXT: Successor(s): vector loop 200; CHECK-EMPTY: 201; CHECK-NEXT: <x1> vector loop: { 202; CHECK-NEXT: vector.body: 203; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 204; CHECK-NEXT: WIDEN-INDUCTION %i = phi 0, %i.next, ir<1> 205; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 206; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%i>, ir<5> 207; CHECK-NEXT: Successor(s): if.then 208; CHECK-EMPTY: 209; CHECK-NEXT: if.then: 210; CHECK-NEXT: Successor(s): pred.udiv 211; CHECK-EMPTY: 212; CHECK-NEXT: <xVFxUF> pred.udiv: { 213; CHECK-NEXT: pred.udiv.entry: 214; CHECK-NEXT: BRANCH-ON-MASK ir<%cmp> 215; CHECK-NEXT: Successor(s): pred.udiv.if, pred.udiv.continue 216; CHECK-NEXT: CondBit: ir<%cmp> 217; CHECK-EMPTY: 218; CHECK-NEXT: pred.udiv.if: 219; CHECK-NEXT: REPLICATE ir<%tmp4> = udiv ir<%n>, vp<[[STEPS]]> (S->V) 220; CHECK-NEXT: Successor(s): pred.udiv.continue 221; CHECK-EMPTY: 222; CHECK-NEXT: pred.udiv.continue: 223; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%tmp4> 224; CHECK-NEXT: No successors 225; CHECK-NEXT: } 226; CHECK-NEXT: Successor(s): if.then.0 227; CHECK-EMPTY: 228; CHECK-NEXT: if.then.0: 229; CHECK-NEXT: Successor(s): for.inc 230; CHECK-EMPTY: 231; CHECK-NEXT: for.inc: 232; CHECK-NEXT: EMIT vp<[[NOT:%.+]]> = not ir<%cmp> 233; CHECK-NEXT: BLEND %d = ir<0>/vp<[[NOT]]> vp<[[PRED]]>/ir<%cmp> 234; CHECK-NEXT: CLONE ir<%idx> = getelementptr ir<%x>, vp<[[STEPS]]> 235; CHECK-NEXT: WIDEN store ir<%idx>, ir<%d> 236; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 237; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 238; CHECK-NEXT: No successors 239; CHECK-NEXT: } 240; CHECK-NEXT: Successor(s): middle.block 241; CHECK-EMPTY: 242; CHECK-NEXT: middle.block: 243; CHECK-NEXT: No successors 244; CHECK-NEXT: } 245; 246entry: 247 br label %for.body 248 249for.body: ; preds = %for.inc, %entry 250 %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ] 251 %cmp = icmp ult i64 %i, 5 252 br i1 %cmp, label %if.then, label %for.inc 253 254if.then: ; preds = %for.body 255 %tmp4 = udiv i64 %n, %i 256 br label %for.inc 257 258for.inc: ; preds = %if.then, %for.body 259 %d = phi i64 [ 0, %for.body ], [ %tmp4, %if.then ] 260 %idx = getelementptr i64, i64* %x, i64 %i 261 store i64 %d, i64* %idx 262 %i.next = add nuw nsw i64 %i, 1 263 %cond = icmp slt i64 %i.next, %n 264 br i1 %cond, label %for.body, label %for.end 265 266for.end: ; preds = %for.inc 267 ret void 268} 269 270@AB = common global [1024 x i32] zeroinitializer, align 4 271@CD = common global [1024 x i32] zeroinitializer, align 4 272 273define void @print_interleave_groups(i32 %C, i32 %D) { 274; CHECK-LABEL: Checking a loop in 'print_interleave_groups' 275; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 276; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 277; CHECK-EMPTY: 278; CHECK-NEXT: vector.ph: 279; CHECK-NEXT: Successor(s): vector loop 280; CHECK-EMPTY: 281; CHECK-NEXT: <x1> vector loop: { 282; CHECK-NEXT: vector.body: 283; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 284; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<4> 285; CHECK-NEXT: CLONE ir<%gep.AB.0> = getelementptr ir<@AB>, ir<0>, vp<[[STEPS]]> 286; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at %AB.0, ir<%gep.AB.0> 287; CHECK-NEXT: ir<%AB.0> = load from index 0 288; CHECK-NEXT: ir<%AB.1> = load from index 1 289; CHECK-NEXT: ir<%AB.3> = load from index 3 290; CHECK-NEXT: CLONE ir<%iv.plus.3> = add vp<[[STEPS]]>, ir<3> 291; CHECK-NEXT: WIDEN ir<%add> = add ir<%AB.0>, ir<%AB.1> 292; CHECK-NEXT: CLONE ir<%gep.CD.3> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.3> 293; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at <badref>, ir<%gep.CD.3> 294; CHECK-NEXT: store ir<%add> to index 0 295; CHECK-NEXT: store ir<1> to index 1 296; CHECK-NEXT: store ir<2> to index 2 297; CHECK-NEXT: store ir<%AB.3> to index 3 298; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 299; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 300; CHECK-NEXT: No successors 301; CHECK-NEXT: } 302; CHECK-NEXT: Successor(s): middle.block 303; CHECK-EMPTY: 304; CHECK-NEXT: middle.block: 305; CHECK-NEXT: No successors 306; CHECK-NEXT: } 307; 308entry: 309 br label %for.body 310 311for.body: 312 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 313 %gep.AB.0= getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv 314 %AB.0 = load i32, i32* %gep.AB.0, align 4 315 %iv.plus.1 = add i64 %iv, 1 316 %gep.AB.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.1 317 %AB.1 = load i32, i32* %gep.AB.1, align 4 318 %iv.plus.2 = add i64 %iv, 2 319 %iv.plus.3 = add i64 %iv, 3 320 %gep.AB.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.3 321 %AB.3 = load i32, i32* %gep.AB.3, align 4 322 %add = add nsw i32 %AB.0, %AB.1 323 %gep.CD.0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv 324 store i32 %add, i32* %gep.CD.0, align 4 325 %gep.CD.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.1 326 store i32 1, i32* %gep.CD.1, align 4 327 %gep.CD.2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.2 328 store i32 2, i32* %gep.CD.2, align 4 329 %gep.CD.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.3 330 store i32 %AB.3, i32* %gep.CD.3, align 4 331 %iv.next = add nuw nsw i64 %iv, 4 332 %cmp = icmp slt i64 %iv.next, 1024 333 br i1 %cmp, label %for.body, label %for.end 334 335for.end: 336 ret void 337} 338 339define float @print_fmuladd_strict(float* %a, float* %b, i64 %n) { 340; CHECK-LABEL: Checking a loop in 'print_fmuladd_strict' 341; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 342; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 343; CHECK-EMPTY: 344; CHECK-NEXT: vector.ph: 345; CHECK-NEXT: Successor(s): vector loop 346; CHECK-EMPTY: 347; CHECK-NEXT: <x1> vector loop: { 348; CHECK-NEXT: vector.body: 349; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 350; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%sum.07> = phi ir<0.000000e+00>, ir<%muladd> 351; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 352; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%a>, vp<[[STEPS]]> 353; CHECK-NEXT: WIDEN ir<%l.a> = load ir<%arrayidx> 354; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%b>, vp<[[STEPS]]> 355; CHECK-NEXT: WIDEN ir<%l.b> = load ir<%arrayidx2> 356; CHECK-NEXT: EMIT vp<[[FMUL:%.+]]> = fmul nnan ninf nsz ir<%l.a> ir<%l.b> 357; CHECK-NEXT: REDUCE ir<[[MULADD:%.+]]> = ir<%sum.07> + nnan ninf nsz reduce.fadd (vp<[[FMUL]]>) 358; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 359; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 360; CHECK-NEXT: No successors 361; CHECK-NEXT: } 362; CHECK-NEXT: Successor(s): middle.block 363; CHECK-EMPTY: 364; CHECK-NEXT: middle.block: 365; CHECK-NEXT: No successors 366; CHECK-NEXT:} 367 368entry: 369 br label %for.body 370 371for.body: 372 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 373 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ] 374 %arrayidx = getelementptr inbounds float, float* %a, i64 %iv 375 %l.a = load float, float* %arrayidx, align 4 376 %arrayidx2 = getelementptr inbounds float, float* %b, i64 %iv 377 %l.b = load float, float* %arrayidx2, align 4 378 %muladd = tail call nnan ninf nsz float @llvm.fmuladd.f32(float %l.a, float %l.b, float %sum.07) 379 %iv.next = add nuw nsw i64 %iv, 1 380 %exitcond.not = icmp eq i64 %iv.next, %n 381 br i1 %exitcond.not, label %for.end, label %for.body 382 383for.end: 384 ret float %muladd 385} 386 387define void @debug_loc_vpinstruction(i32* nocapture %asd, i32* nocapture %bsd) !dbg !5 { 388; CHECK-LABEL: Checking a loop in 'debug_loc_vpinstruction' 389; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 390; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 391; CHECK-EMPTY: 392; CHECK-NEXT: vector.ph: 393; CHECK-NEXT: Successor(s): vector loop 394; CHECK-EMPTY: 395; CHECK-NEXT: <x1> vector loop: { 396; CHECK-NEXT: vector.body: 397; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 398; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 399; CHECK-NEXT: CLONE ir<%isd> = getelementptr ir<%asd>, vp<[[STEPS]]> 400; CHECK-NEXT: WIDEN ir<%lsd> = load ir<%isd> 401; CHECK-NEXT: WIDEN ir<%psd> = add ir<%lsd>, ir<23> 402; CHECK-NEXT: WIDEN ir<%cmp1> = icmp ir<%lsd>, ir<100> 403; CHECK-NEXT: Successor(s): check 404; CHECK-EMPTY: 405; CHECK-NEXT: check: 406; CHECK-NEXT: WIDEN ir<%cmp2> = icmp ir<%lsd>, ir<200> 407; CHECK-NEXT: Successor(s): if.then 408; CHECK-EMPTY: 409; CHECK-NEXT: if.then: 410; CHECK-NEXT: EMIT vp<[[NOT1:%.+]]> = not ir<%cmp1>, !dbg /tmp/s.c:5:3 411; CHECK-NEXT: EMIT vp<[[SEL1:%.+]]> = select vp<[[NOT1]]> ir<%cmp2> ir<false>, !dbg /tmp/s.c:5:21 412; CHECK-NEXT: EMIT vp<[[OR1:%.+]]> = or vp<[[SEL1]]> ir<%cmp1> 413; CHECK-NEXT: Successor(s): pred.sdiv 414; CHECK-EMPTY: 415; CHECK-NEXT: <xVFxUF> pred.sdiv: { 416; CHECK-NEXT: pred.sdiv.entry: 417; CHECK-NEXT: BRANCH-ON-MASK vp<[[OR1]]> 418; CHECK-NEXT: Successor(s): pred.sdiv.if, pred.sdiv.continue 419; CHECK-NEXT: CondBit: vp<[[OR1]]> (if.then) 420; CHECK-EMPTY: 421; CHECK-NEXT: pred.sdiv.if: 422; CHECK-NEXT: REPLICATE ir<%sd1> = sdiv ir<%psd>, ir<%lsd> (S->V) 423; CHECK-NEXT: Successor(s): pred.sdiv.continue 424; CHECK-EMPTY: 425; CHECK-NEXT: pred.sdiv.continue: 426; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PHI:%.+]]> = ir<%sd1> 427; CHECK-NEXT: No successors 428; CHECK-NEXT: } 429; CHECK-NEXT: Successor(s): if.then.0 430; CHECK-EMPTY: 431; CHECK-NEXT: if.then.0: 432; CHECK-NEXT: Successor(s): if.end 433; CHECK-EMPTY: 434; CHECK-NEXT: if.end: 435; CHECK-NEXT: EMIT vp<[[NOT2:%.+]]> = not ir<%cmp2> 436; CHECK-NEXT: EMIT vp<[[SEL2:%.+]]> = select vp<[[NOT1]]> vp<[[NOT2]]> ir<false> 437; CHECK-NEXT: BLEND %ysd.0 = vp<[[PHI]]>/vp<[[OR1]]> ir<%psd>/vp<[[SEL2]]> 438; CHECK-NEXT: WIDEN store ir<%isd>, ir<%ysd.0> 439; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 440; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 441; CHECK-NEXT: No successors 442; CHECK-NEXT:} 443; CHECK-NEXT: Successor(s): middle.block 444; CHECK-EMPTY: 445; CHECK-NEXT: middle.block: 446; CHECK-NEXT: No successors 447; CHECK-NEXT:} 448; 449entry: 450 br label %loop 451 452loop: 453 %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ] 454 %isd = getelementptr inbounds i32, i32* %asd, i64 %iv 455 %lsd = load i32, i32* %isd, align 4 456 %psd = add nsw i32 %lsd, 23 457 %cmp1 = icmp slt i32 %lsd, 100 458 br i1 %cmp1, label %if.then, label %check, !dbg !7 459 460check: 461 %cmp2 = icmp sge i32 %lsd, 200 462 br i1 %cmp2, label %if.then, label %if.end, !dbg !8 463 464if.then: 465 %sd1 = sdiv i32 %psd, %lsd 466 br label %if.end 467 468if.end: 469 %ysd.0 = phi i32 [ %sd1, %if.then ], [ %psd, %check ] 470 store i32 %ysd.0, i32* %isd, align 4 471 %iv.next = add nuw nsw i64 %iv, 1 472 %exitcond = icmp eq i64 %iv.next, 128 473 br i1 %exitcond, label %exit, label %loop 474 475exit: 476 ret void 477} 478 479declare float @llvm.sqrt.f32(float) nounwind readnone 480declare float @llvm.fmuladd.f32(float, float, float) 481 482define void @print_expand_scev(i64 %y, i8* %ptr) { 483; CHECK-LABEL: Checking a loop in 'print_expand_scev' 484; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 485; CHECK-NEXT: Live-in vp<%0> = vector-trip-count 486; CHECK-EMPTY: 487; CHECK-NEXT: vector.ph: 488; CHECK-NEXT: EMIT vp<[[EXP_SCEV:%.+]]> = EXPAND SCEV (1 + (%y /u 492802768830814060))<nuw><nsw> 489; CHECK-NEXT: Successor(s): vector loop 490; CHECK-EMPTY: 491; CHECK-NEXT: <x1> vector loop: { 492; CHECK-NEXT: vector.body: 493; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 494; CHECK-NEXT: WIDEN-INDUCTION\l" + 495; CHECK-NEXT: " %iv = phi %iv.next, 0\l" + 496; CHECK-NEXT: " ir<%v2>, vp<[[EXP_SCEV]]> 497; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, vp<[[EXP_SCEV]]> 498; CHECK-NEXT: WIDEN ir<%v3> = add ir<%v2>, ir<1> 499; CHECK-NEXT: REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]> 500; CHECK-NEXT: REPLICATE store ir<%v3>, ir<%gep> 501; CHECK-NEXT: EMIT vp<[[CAN_INC:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 502; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_INC]]> vp<%0> 503; CHECK-NEXT: No successors 504; CHECK-NEXT: } 505; CHECK-NEXT: Successor(s): middle.block 506; CHECK-EMPTY: 507; CHECK-NEXT: middle.block: 508; CHECK-NEXT: No successors 509; CHECK-NEXT: } 510; 511entry: 512 %div = udiv i64 %y, 492802768830814060 513 %inc = add i64 %div, 1 514 br label %loop 515 516loop: ; preds = %loop, %entry 517 %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] 518 %v2 = trunc i64 %iv to i8 519 %v3 = add i8 %v2, 1 520 %gep = getelementptr inbounds i8, i8* %ptr, i64 %iv 521 store i8 %v3, i8* %gep 522 523 %cmp15 = icmp slt i8 %v3, 10000 524 %iv.next = add i64 %iv, %inc 525 br i1 %cmp15, label %loop, label %loop.exit 526 527loop.exit: 528 ret void 529} 530 531define i32 @print_exit_value(i8* %ptr, i32 %off) { 532; CHECK-LABEL: Checking a loop in 'print_exit_value' 533; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 534; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 535; CHECK-EMPTY: 536; CHECK-NEXT: vector.ph: 537; CHECK-NEXT: Successor(s): vector loop 538; CHECK-EMPTY: 539; CHECK-NEXT: <x1> vector loop: { 540; CHECK-NEXT: vector.body: 541; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 542; CHECK-NEXT: WIDEN-INDUCTION %iv = phi 0, %iv.next, ir<1> 543; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 544; CHECK-NEXT: CLONE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]> 545; CHECK-NEXT: WIDEN ir<%add> = add ir<%iv>, ir<%off> 546; CHECK-NEXT: WIDEN store ir<%gep>, ir<0> 547; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 548; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 549; CHECK-NEXT: No successors 550; CHECK-NEXT: } 551; CHECK-NEXT: Successor(s): middle.block 552; CHECK-EMPTY: 553; CHECK-NEXT: middle.block: 554; CHECK-NEXT: No successors 555; CHECK-NEXT: } 556; 557entry: 558 br label %loop 559 560loop: 561 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] 562 %gep = getelementptr inbounds i8, i8* %ptr, i32 %iv 563 %add = add i32 %iv, %off 564 store i8 0, i8* %gep 565 %iv.next = add nsw i32 %iv, 1 566 %ec = icmp eq i32 %iv.next, 1000 567 br i1 %ec, label %exit, label %loop 568 569exit: 570 %lcssa = phi i32 [ %add, %loop ] 571 ret i32 %lcssa 572} 573 574!llvm.dbg.cu = !{!0} 575!llvm.module.flags = !{!3, !4} 576 577!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !2) 578!1 = !DIFile(filename: "/tmp/s.c", directory: "/tmp") 579!2 = !{} 580!3 = !{i32 2, !"Debug Info Version", i32 3} 581!4 = !{i32 7, !"PIC Level", i32 2} 582!5 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 4, type: !6, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2) 583!6 = !DISubroutineType(types: !2) 584!7 = !DILocation(line: 5, column: 3, scope: !5) 585!8 = !DILocation(line: 5, column: 21, scope: !5) 586