1; REQUIRES: asserts 2 3; RUN: opt -loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -enable-interleaved-mem-accesses=true -enable-masked-interleaved-mem-accesses -disable-output %s 2>&1 | FileCheck %s 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 6 7; Tests for printing VPlans. 8 9define void @print_call_and_memory(i64 %n, float* noalias %y, float* noalias %x) nounwind uwtable { 10; CHECK-LABEL: Checking a loop in 'print_call_and_memory' 11; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 12; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 13; CHECK-EMPTY: 14; CHECK-NEXT: vector.ph: 15; CHECK-NEXT: Successor(s): vector loop 16; CHECK-EMPTY: 17; CHECK-NEXT: <x1> vector loop: { 18; CHECK-NEXT: vector.body: 19; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 20; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 21; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]> 22; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 23; CHECK-NEXT: WIDEN-CALL ir<%call> = call @llvm.sqrt.f32(ir<%lv>) 24; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]> 25; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%call> 26; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 27; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 28; CHECK-NEXT: No successors 29; CHECK-NEXT: } 30; CHECK-NEXT: No successors 31; CHECK-NEXT: } 32; 33entry: 34 %cmp6 = icmp sgt i64 %n, 0 35 br i1 %cmp6, label %for.body, label %for.end 36 37for.body: ; preds = %entry, %for.body 38 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 39 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 40 %lv = load float, float* %arrayidx, align 4 41 %call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone 42 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 43 store float %call, float* %arrayidx2, align 4 44 %iv.next = add i64 %iv, 1 45 %exitcond = icmp eq i64 %iv.next, %n 46 br i1 %exitcond, label %for.end, label %for.body 47 48for.end: ; preds = %for.body, %entry 49 ret void 50} 51 52define void @print_widen_gep_and_select(i64 %n, float* noalias %y, float* noalias %x, float* %z) nounwind uwtable { 53; CHECK-LABEL: Checking a loop in 'print_widen_gep_and_select' 54; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 55; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 56; CHECK-EMPTY: 57; CHECK-NEXT: vector.ph: 58; CHECK-NEXT: Successor(s): vector loop 59; CHECK-EMPTY: 60; CHECK-NEXT: <x1> vector loop: { 61; CHECK-NEXT: vector.body: 62; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 63; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0 64; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 65; CHECK-NEXT: WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr ir<%y>, ir<%iv> 66; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 67; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%arrayidx>, ir<%z> 68; CHECK-NEXT: WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01> 69; CHECK-NEXT: WIDEN ir<%add> = fadd ir<%lv>, ir<%sel> 70; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]> 71; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%add> 72; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 73; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 74; CHECK-NEXT: No successors 75; CHECK-NEXT: } 76; CHECK-NEXT: No successors 77; CHECK-NEXT: } 78; 79entry: 80 %cmp6 = icmp sgt i64 %n, 0 81 br i1 %cmp6, label %for.body, label %for.end 82 83for.body: ; preds = %entry, %for.body 84 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 85 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 86 %lv = load float, float* %arrayidx, align 4 87 %cmp = icmp eq float* %arrayidx, %z 88 %sel = select i1 %cmp, float 10.0, float 20.0 89 %add = fadd float %lv, %sel 90 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 91 store float %add, float* %arrayidx2, align 4 92 %iv.next = add i64 %iv, 1 93 %exitcond = icmp eq i64 %iv.next, %n 94 br i1 %exitcond, label %for.end, label %for.body 95 96for.end: ; preds = %for.body, %entry 97 ret void 98} 99 100define float @print_reduction(i64 %n, float* noalias %y) { 101; CHECK-LABEL: Checking a loop in 'print_reduction' 102; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 103; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 104; CHECK-EMPTY: 105; CHECK-NEXT: vector.ph: 106; CHECK-NEXT: Successor(s): vector loop 107; CHECK-EMPTY: 108; CHECK-NEXT: <x1> vector loop: { 109; CHECK-NEXT: vector.body: 110; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 111; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> 112; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 113; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]> 114; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 115; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) 116; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 117; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 118; CHECK-NEXT: No successors 119; CHECK-NEXT: } 120; CHECK-NEXT: No successors 121; CHECK-NEXT: } 122; 123entry: 124 br label %for.body 125 126for.body: ; preds = %entry, %for.body 127 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 128 %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ] 129 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 130 %lv = load float, float* %arrayidx, align 4 131 %red.next = fadd fast float %lv, %red 132 %iv.next = add i64 %iv, 1 133 %exitcond = icmp eq i64 %iv.next, %n 134 br i1 %exitcond, label %for.end, label %for.body 135 136for.end: ; preds = %for.body, %entry 137 ret float %red.next 138} 139 140define void @print_replicate_predicated_phi(i64 %n, i64* %x) { 141; CHECK-LABEL: Checking a loop in 'print_replicate_predicated_phi' 142; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 143; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 144; CHECK-EMPTY: 145; CHECK-NEXT: vector.ph: 146; CHECK-NEXT: Successor(s): vector loop 147; CHECK-EMPTY: 148; CHECK-NEXT: <x1> vector loop: { 149; CHECK-NEXT: vector.body: 150; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 151; CHECK-NEXT: WIDEN-INDUCTION %i = phi 0, %i.next 152; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 153; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%i>, ir<5> 154; CHECK-NEXT: Successor(s): if.then 155; CHECK-EMPTY: 156; CHECK-NEXT: if.then: 157; CHECK-NEXT: Successor(s): pred.udiv 158; CHECK-EMPTY: 159; CHECK-NEXT: <xVFxUF> pred.udiv: { 160; CHECK-NEXT: pred.udiv.entry: 161; CHECK-NEXT: BRANCH-ON-MASK ir<%cmp> 162; CHECK-NEXT: Successor(s): pred.udiv.if, pred.udiv.continue 163; CHECK-NEXT: CondBit: ir<%cmp> 164; CHECK-EMPTY: 165; CHECK-NEXT: pred.udiv.if: 166; CHECK-NEXT: REPLICATE ir<%tmp4> = udiv ir<%n>, vp<[[STEPS]]> (S->V) 167; CHECK-NEXT: Successor(s): pred.udiv.continue 168; CHECK-EMPTY: 169; CHECK-NEXT: pred.udiv.continue: 170; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%tmp4> 171; CHECK-NEXT: No successors 172; CHECK-NEXT: } 173; CHECK-NEXT: Successor(s): if.then.0 174; CHECK-EMPTY: 175; CHECK-NEXT: if.then.0: 176; CHECK-NEXT: Successor(s): for.inc 177; CHECK-EMPTY: 178; CHECK-NEXT: for.inc: 179; CHECK-NEXT: EMIT vp<[[NOT:%.+]]> = not ir<%cmp> 180; CHECK-NEXT: BLEND %d = ir<0>/vp<[[NOT]]> vp<[[PRED]]>/ir<%cmp> 181; CHECK-NEXT: CLONE ir<%idx> = getelementptr ir<%x>, vp<[[STEPS]]> 182; CHECK-NEXT: WIDEN store ir<%idx>, ir<%d> 183; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 184; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 185; CHECK-NEXT: No successors 186; CHECK-NEXT: } 187; CHECK-NEXT: No successors 188; CHECK-NEXT: } 189; 190entry: 191 br label %for.body 192 193for.body: ; preds = %for.inc, %entry 194 %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ] 195 %cmp = icmp ult i64 %i, 5 196 br i1 %cmp, label %if.then, label %for.inc 197 198if.then: ; preds = %for.body 199 %tmp4 = udiv i64 %n, %i 200 br label %for.inc 201 202for.inc: ; preds = %if.then, %for.body 203 %d = phi i64 [ 0, %for.body ], [ %tmp4, %if.then ] 204 %idx = getelementptr i64, i64* %x, i64 %i 205 store i64 %d, i64* %idx 206 %i.next = add nuw nsw i64 %i, 1 207 %cond = icmp slt i64 %i.next, %n 208 br i1 %cond, label %for.body, label %for.end 209 210for.end: ; preds = %for.inc 211 ret void 212} 213 214@AB = common global [1024 x i32] zeroinitializer, align 4 215@CD = common global [1024 x i32] zeroinitializer, align 4 216 217define void @print_interleave_groups(i32 %C, i32 %D) { 218; CHECK-LABEL: Checking a loop in 'print_interleave_groups' 219; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 220; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 221; CHECK-EMPTY: 222; CHECK-NEXT: vector.ph: 223; CHECK-NEXT: Successor(s): vector loop 224; CHECK-EMPTY: 225; CHECK-NEXT: <x1> vector loop: { 226; CHECK-NEXT: vector.body: 227; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 228; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<4> 229; CHECK-NEXT: CLONE ir<%gep.AB.0> = getelementptr ir<@AB>, ir<0>, vp<[[STEPS]]> 230; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at %AB.0, ir<%gep.AB.0> 231; CHECK-NEXT: ir<%AB.0> = load from index 0 232; CHECK-NEXT: ir<%AB.1> = load from index 1 233; CHECK-NEXT: ir<%AB.3> = load from index 3 234; CHECK-NEXT: CLONE ir<%iv.plus.3> = add vp<[[STEPS]]>, ir<3> 235; CHECK-NEXT: WIDEN ir<%add> = add ir<%AB.0>, ir<%AB.1> 236; CHECK-NEXT: CLONE ir<%gep.CD.3> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.3> 237; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at <badref>, ir<%gep.CD.3> 238; CHECK-NEXT: store ir<%add> to index 0 239; CHECK-NEXT: store ir<1> to index 1 240; CHECK-NEXT: store ir<2> to index 2 241; CHECK-NEXT: store ir<%AB.3> to index 3 242; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 243; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 244; CHECK-NEXT: No successors 245; CHECK-NEXT: } 246; CHECK-NEXT: No successors 247; CHECK-NEXT: } 248; 249entry: 250 br label %for.body 251 252for.body: 253 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 254 %gep.AB.0= getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv 255 %AB.0 = load i32, i32* %gep.AB.0, align 4 256 %iv.plus.1 = add i64 %iv, 1 257 %gep.AB.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.1 258 %AB.1 = load i32, i32* %gep.AB.1, align 4 259 %iv.plus.2 = add i64 %iv, 2 260 %iv.plus.3 = add i64 %iv, 3 261 %gep.AB.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.3 262 %AB.3 = load i32, i32* %gep.AB.3, align 4 263 %add = add nsw i32 %AB.0, %AB.1 264 %gep.CD.0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv 265 store i32 %add, i32* %gep.CD.0, align 4 266 %gep.CD.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.1 267 store i32 1, i32* %gep.CD.1, align 4 268 %gep.CD.2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.2 269 store i32 2, i32* %gep.CD.2, align 4 270 %gep.CD.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.3 271 store i32 %AB.3, i32* %gep.CD.3, align 4 272 %iv.next = add nuw nsw i64 %iv, 4 273 %cmp = icmp slt i64 %iv.next, 1024 274 br i1 %cmp, label %for.body, label %for.end 275 276for.end: 277 ret void 278} 279 280define float @print_fmuladd_strict(float* %a, float* %b, i64 %n) { 281; CHECK-LABEL: Checking a loop in 'print_fmuladd_strict' 282; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 283; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 284; CHECK-EMPTY: 285; CHECK-NEXT: vector.ph: 286; CHECK-NEXT: Successor(s): vector loop 287; CHECK-EMPTY: 288; CHECK-NEXT: <x1> vector loop: { 289; CHECK-NEXT: vector.body: 290; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 291; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%sum.07> = phi ir<0.000000e+00>, ir<%muladd> 292; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 293; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%a>, vp<[[STEPS]]> 294; CHECK-NEXT: WIDEN ir<%l.a> = load ir<%arrayidx> 295; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%b>, vp<[[STEPS]]> 296; CHECK-NEXT: WIDEN ir<%l.b> = load ir<%arrayidx2> 297; CHECK-NEXT: EMIT vp<[[FMUL:%.+]]> = fmul nnan ninf nsz ir<%l.a> ir<%l.b> 298; CHECK-NEXT: REDUCE ir<[[MULADD:%.+]]> = ir<%sum.07> + nnan ninf nsz reduce.fadd (vp<[[FMUL]]>) 299; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 300; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 301; CHECK-NEXT: No successors 302; CHECK-NEXT: } 303 304entry: 305 br label %for.body 306 307for.body: 308 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 309 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ] 310 %arrayidx = getelementptr inbounds float, float* %a, i64 %iv 311 %l.a = load float, float* %arrayidx, align 4 312 %arrayidx2 = getelementptr inbounds float, float* %b, i64 %iv 313 %l.b = load float, float* %arrayidx2, align 4 314 %muladd = tail call nnan ninf nsz float @llvm.fmuladd.f32(float %l.a, float %l.b, float %sum.07) 315 %iv.next = add nuw nsw i64 %iv, 1 316 %exitcond.not = icmp eq i64 %iv.next, %n 317 br i1 %exitcond.not, label %for.end, label %for.body 318 319for.end: 320 ret float %muladd 321} 322 323define void @debug_loc_vpinstruction(i32* nocapture %asd, i32* nocapture %bsd) !dbg !5 { 324; CHECK-LABEL: Checking a loop in 'debug_loc_vpinstruction' 325; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 326; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 327; CHECK-EMPTY: 328; CHECK-NEXT: vector.ph: 329; CHECK-NEXT: Successor(s): vector loop 330; CHECK-EMPTY: 331; CHECK-NEXT: <x1> vector loop: { 332; CHECK-NEXT: vector.body: 333; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 334; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 335; CHECK-NEXT: CLONE ir<%isd> = getelementptr ir<%asd>, vp<[[STEPS]]> 336; CHECK-NEXT: WIDEN ir<%lsd> = load ir<%isd> 337; CHECK-NEXT: WIDEN ir<%psd> = add ir<%lsd>, ir<23> 338; CHECK-NEXT: WIDEN ir<%cmp1> = icmp ir<%lsd>, ir<100> 339; CHECK-NEXT: Successor(s): check 340; CHECK-EMPTY: 341; CHECK-NEXT: check: 342; CHECK-NEXT: WIDEN ir<%cmp2> = icmp ir<%lsd>, ir<200> 343; CHECK-NEXT: Successor(s): if.then 344; CHECK-EMPTY: 345; CHECK-NEXT: if.then: 346; CHECK-NEXT: EMIT vp<[[NOT1:%.+]]> = not ir<%cmp1>, !dbg /tmp/s.c:5:3 347; CHECK-NEXT: EMIT vp<[[SEL1:%.+]]> = select vp<[[NOT1]]> ir<%cmp2> ir<false>, !dbg /tmp/s.c:5:21 348; CHECK-NEXT: EMIT vp<[[OR1:%.+]]> = or vp<[[SEL1]]> ir<%cmp1> 349; CHECK-NEXT: Successor(s): pred.sdiv 350; CHECK-EMPTY: 351; CHECK-NEXT: <xVFxUF> pred.sdiv: { 352; CHECK-NEXT: pred.sdiv.entry: 353; CHECK-NEXT: BRANCH-ON-MASK vp<[[OR1]]> 354; CHECK-NEXT: Successor(s): pred.sdiv.if, pred.sdiv.continue 355; CHECK-NEXT: CondBit: vp<[[OR1]]> (if.then) 356; CHECK-EMPTY: 357; CHECK-NEXT: pred.sdiv.if: 358; CHECK-NEXT: REPLICATE ir<%sd1> = sdiv ir<%psd>, ir<%lsd> (S->V) 359; CHECK-NEXT: Successor(s): pred.sdiv.continue 360; CHECK-EMPTY: 361; CHECK-NEXT: pred.sdiv.continue: 362; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PHI:%.+]]> = ir<%sd1> 363; CHECK-NEXT: No successors 364; CHECK-NEXT: } 365; CHECK-NEXT: Successor(s): if.then.0 366; CHECK-EMPTY: 367; CHECK-NEXT: if.then.0: 368; CHECK-NEXT: Successor(s): if.end 369; CHECK-EMPTY: 370; CHECK-NEXT: if.end: 371; CHECK-NEXT: EMIT vp<[[NOT2:%.+]]> = not ir<%cmp2> 372; CHECK-NEXT: EMIT vp<[[SEL2:%.+]]> = select vp<[[NOT1]]> vp<[[NOT2]]> ir<false> 373; CHECK-NEXT: BLEND %ysd.0 = vp<[[PHI]]>/vp<[[OR1]]> ir<%psd>/vp<[[SEL2]]> 374; CHECK-NEXT: WIDEN store ir<%isd>, ir<%ysd.0> 375; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 376; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 377; CHECK-NEXT: No successors 378; CHECK-NEXT:} 379; CHECK-NEXT:No successors 380; CHECK-NEXT:} 381; 382entry: 383 br label %loop 384 385loop: 386 %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ] 387 %isd = getelementptr inbounds i32, i32* %asd, i64 %iv 388 %lsd = load i32, i32* %isd, align 4 389 %psd = add nsw i32 %lsd, 23 390 %cmp1 = icmp slt i32 %lsd, 100 391 br i1 %cmp1, label %if.then, label %check, !dbg !7 392 393check: 394 %cmp2 = icmp sge i32 %lsd, 200 395 br i1 %cmp2, label %if.then, label %if.end, !dbg !8 396 397if.then: 398 %sd1 = sdiv i32 %psd, %lsd 399 br label %if.end 400 401if.end: 402 %ysd.0 = phi i32 [ %sd1, %if.then ], [ %psd, %check ] 403 store i32 %ysd.0, i32* %isd, align 4 404 %iv.next = add nuw nsw i64 %iv, 1 405 %exitcond = icmp eq i64 %iv.next, 128 406 br i1 %exitcond, label %exit, label %loop 407 408exit: 409 ret void 410} 411 412declare float @llvm.sqrt.f32(float) nounwind readnone 413declare float @llvm.fmuladd.f32(float, float, float) 414 415define void @print_expand_scev(i64 %y, i8* %ptr) { 416; CHECK-LABEL: Checking a loop in 'print_expand_scev' 417; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 418; CHECK-NEXT: Live-in vp<%0> = vector-trip-count 419; CHECK-EMPTY: 420; CHECK-NEXT: vector.ph: 421; CHECK-NEXT: EMIT vp<[[EXP_SCEV:%.+]]> = EXPAND SCEV (1 + (%y /u 492802768830814060))<nuw><nsw> 422; CHECK-NEXT: Successor(s): vector loop 423; CHECK-EMPTY: 424; CHECK-NEXT: <x1> vector loop: { 425; CHECK-NEXT: vector.body: 426; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 427; CHECK-NEXT: WIDEN-INDUCTION\l" + 428; CHECK-NEXT: " %iv = phi %iv.next, 0\l" + 429; CHECK-NEXT: " ir<%v2> 430; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, vp<[[EXP_SCEV]]> 431; CHECK-NEXT: WIDEN ir<%v3> = add ir<%v2>, ir<1> 432; CHECK-NEXT: REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]> 433; CHECK-NEXT: REPLICATE store ir<%v3>, ir<%gep> 434; CHECK-NEXT: EMIT vp<[[CAN_INC:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 435; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_INC]]> vp<%0> 436; CHECK-NEXT: No successors 437; CHECK-NEXT: } 438; CHECK-NEXT: No successors 439; CHECK-NEXT: } 440; 441entry: 442 %div = udiv i64 %y, 492802768830814060 443 %inc = add i64 %div, 1 444 br label %loop 445 446loop: ; preds = %loop, %entry 447 %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] 448 %v2 = trunc i64 %iv to i8 449 %v3 = add i8 %v2, 1 450 %gep = getelementptr inbounds i8, i8* %ptr, i64 %iv 451 store i8 %v3, i8* %gep 452 453 %cmp15 = icmp slt i8 %v3, 10000 454 %iv.next = add i64 %iv, %inc 455 br i1 %cmp15, label %loop, label %loop.exit 456 457loop.exit: 458 ret void 459} 460 461!llvm.dbg.cu = !{!0} 462!llvm.module.flags = !{!3, !4} 463 464!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !2) 465!1 = !DIFile(filename: "/tmp/s.c", directory: "/tmp") 466!2 = !{} 467!3 = !{i32 2, !"Debug Info Version", i32 3} 468!4 = !{i32 7, !"PIC Level", i32 2} 469!5 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 4, type: !6, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2) 470!6 = !DISubroutineType(types: !2) 471!7 = !DILocation(line: 5, column: 3, scope: !5) 472!8 = !DILocation(line: 5, column: 21, scope: !5) 473