1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -force-vector-width=4 -force-vector-interleave=1 -passes=loop-vectorize -S | FileCheck %s
3
4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
5
6define i8 @PR34687(i1 %c, i32 %x, i32 %n) {
7; CHECK-LABEL: @PR34687(
8; CHECK-NEXT:  entry:
9; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 4
10; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
11; CHECK:       vector.ph:
12; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 4
13; CHECK-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
14; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C:%.*]], i32 0
15; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer
16; CHECK-NEXT:    [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <4 x i32> poison, i32 [[X:%.*]], i32 0
17; CHECK-NEXT:    [[BROADCAST_SPLAT8:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT7]], <4 x i32> poison, <4 x i32> zeroinitializer
18; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
19; CHECK:       vector.body:
20; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_SDIV_CONTINUE6:%.*]] ]
21; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP16:%.*]], [[PRED_SDIV_CONTINUE6]] ]
22; CHECK-NEXT:    [[TMP0:%.*]] = extractelement <4 x i1> [[BROADCAST_SPLAT]], i32 0
23; CHECK-NEXT:    br i1 [[TMP0]], label [[PRED_SDIV_IF:%.*]], label [[PRED_SDIV_CONTINUE:%.*]]
24; CHECK:       pred.sdiv.if:
25; CHECK-NEXT:    [[TMP1:%.*]] = sdiv i32 undef, undef
26; CHECK-NEXT:    br label [[PRED_SDIV_CONTINUE]]
27; CHECK:       pred.sdiv.continue:
28; CHECK-NEXT:    [[TMP2:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP1]], [[PRED_SDIV_IF]] ]
29; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <4 x i1> [[BROADCAST_SPLAT]], i32 1
30; CHECK-NEXT:    br i1 [[TMP3]], label [[PRED_SDIV_IF1:%.*]], label [[PRED_SDIV_CONTINUE2:%.*]]
31; CHECK:       pred.sdiv.if1:
32; CHECK-NEXT:    [[TMP4:%.*]] = sdiv i32 undef, undef
33; CHECK-NEXT:    br label [[PRED_SDIV_CONTINUE2]]
34; CHECK:       pred.sdiv.continue2:
35; CHECK-NEXT:    [[TMP5:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP4]], [[PRED_SDIV_IF1]] ]
36; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <4 x i1> [[BROADCAST_SPLAT]], i32 2
37; CHECK-NEXT:    br i1 [[TMP6]], label [[PRED_SDIV_IF3:%.*]], label [[PRED_SDIV_CONTINUE4:%.*]]
38; CHECK:       pred.sdiv.if3:
39; CHECK-NEXT:    [[TMP7:%.*]] = sdiv i32 undef, undef
40; CHECK-NEXT:    br label [[PRED_SDIV_CONTINUE4]]
41; CHECK:       pred.sdiv.continue4:
42; CHECK-NEXT:    [[TMP8:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE2]] ], [ [[TMP7]], [[PRED_SDIV_IF3]] ]
43; CHECK-NEXT:    [[TMP9:%.*]] = extractelement <4 x i1> [[BROADCAST_SPLAT]], i32 3
44; CHECK-NEXT:    br i1 [[TMP9]], label [[PRED_SDIV_IF5:%.*]], label [[PRED_SDIV_CONTINUE6]]
45; CHECK:       pred.sdiv.if5:
46; CHECK-NEXT:    [[TMP10:%.*]] = sdiv i32 undef, undef
47; CHECK-NEXT:    br label [[PRED_SDIV_CONTINUE6]]
48; CHECK:       pred.sdiv.continue6:
49; CHECK-NEXT:    [[TMP11:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE4]] ], [ [[TMP10]], [[PRED_SDIV_IF5]] ]
50; CHECK-NEXT:    [[TMP12:%.*]] = and <4 x i32> [[VEC_PHI]], <i32 255, i32 255, i32 255, i32 255>
51; CHECK-NEXT:    [[TMP13:%.*]] = add <4 x i32> [[TMP12]], [[BROADCAST_SPLAT8]]
52; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
53; CHECK-NEXT:    [[TMP14:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
54; CHECK-NEXT:    [[TMP15:%.*]] = trunc <4 x i32> [[TMP13]] to <4 x i8>
55; CHECK-NEXT:    [[TMP16]] = zext <4 x i8> [[TMP15]] to <4 x i32>
56; CHECK-NEXT:    br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
57; CHECK:       middle.block:
58; CHECK-NEXT:    [[TMP17:%.*]] = trunc <4 x i32> [[TMP16]] to <4 x i8>
59; CHECK-NEXT:    [[TMP18:%.*]] = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> [[TMP17]])
60; CHECK-NEXT:    [[TMP19:%.*]] = zext i8 [[TMP18]] to i32
61; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
62; CHECK-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
63; CHECK:       scalar.ph:
64; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
65; CHECK-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP19]], [[MIDDLE_BLOCK]] ]
66; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
67; CHECK:       for.body:
68; CHECK-NEXT:    [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ]
69; CHECK-NEXT:    [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[R_NEXT:%.*]], [[IF_END]] ]
70; CHECK-NEXT:    br i1 [[C]], label [[IF_THEN:%.*]], label [[IF_END]]
71; CHECK:       if.then:
72; CHECK-NEXT:    [[T0:%.*]] = sdiv i32 undef, undef
73; CHECK-NEXT:    br label [[IF_END]]
74; CHECK:       if.end:
75; CHECK-NEXT:    [[T1:%.*]] = and i32 [[R]], 255
76; CHECK-NEXT:    [[I_NEXT]] = add nsw i32 [[I]], 1
77; CHECK-NEXT:    [[R_NEXT]] = add nuw nsw i32 [[T1]], [[X]]
78; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]]
79; CHECK-NEXT:    br i1 [[COND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
80; CHECK:       for.end:
81; CHECK-NEXT:    [[T2:%.*]] = phi i32 [ [[R_NEXT]], [[IF_END]] ], [ [[TMP19]], [[MIDDLE_BLOCK]] ]
82; CHECK-NEXT:    [[T3:%.*]] = trunc i32 [[T2]] to i8
83; CHECK-NEXT:    ret i8 [[T3]]
84;
85entry:
86  br label %for.body
87
88for.body:
89  %i = phi i32 [ 0, %entry ], [ %i.next, %if.end ]
90  %r = phi i32 [ 0, %entry ], [ %r.next, %if.end ]
91  br i1 %c, label %if.then, label %if.end
92
93if.then:
94  %t0 = sdiv i32 undef, undef
95  br label %if.end
96
97if.end:
98  %t1 = and i32 %r, 255
99  %i.next = add nsw i32 %i, 1
100  %r.next = add nuw nsw i32 %t1, %x
101  %cond = icmp eq i32 %i.next, %n
102  br i1 %cond, label %for.end, label %for.body
103
104for.end:
105  %t2 = phi i32 [ %r.next, %if.end ]
106  %t3 = trunc i32 %t2 to i8
107  ret i8 %t3
108}
109
110define i32 @PR35734(i32 %x, i32 %y) {
111; CHECK-LABEL: @PR35734(
112; CHECK-NEXT:  entry:
113; CHECK-NEXT:    [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 78)
114; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[SMAX]], 1
115; CHECK-NEXT:    [[TMP1:%.*]] = sub i32 [[TMP0]], [[X]]
116; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP1]], 4
117; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
118; CHECK:       vector.ph:
119; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[TMP1]], 4
120; CHECK-NEXT:    [[N_VEC:%.*]] = sub i32 [[TMP1]], [[N_MOD_VF]]
121; CHECK-NEXT:    [[IND_END:%.*]] = add i32 [[X]], [[N_VEC]]
122; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[Y:%.*]], i32 0
123; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
124; CHECK:       vector.body:
125; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
126; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ [[TMP2]], [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ]
127; CHECK-NEXT:    [[TMP3:%.*]] = and <4 x i32> [[VEC_PHI]], <i32 1, i32 1, i32 1, i32 1>
128; CHECK-NEXT:    [[TMP4:%.*]] = add <4 x i32> [[TMP3]], <i32 -1, i32 -1, i32 -1, i32 -1>
129; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
130; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
131; CHECK-NEXT:    [[TMP6:%.*]] = trunc <4 x i32> [[TMP4]] to <4 x i1>
132; CHECK-NEXT:    [[TMP7]] = sext <4 x i1> [[TMP6]] to <4 x i32>
133; CHECK-NEXT:    br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
134; CHECK:       middle.block:
135; CHECK-NEXT:    [[TMP8:%.*]] = trunc <4 x i32> [[TMP7]] to <4 x i1>
136; CHECK-NEXT:    [[TMP9:%.*]] = call i1 @llvm.vector.reduce.add.v4i1(<4 x i1> [[TMP8]])
137; CHECK-NEXT:    [[TMP10:%.*]] = sext i1 [[TMP9]] to i32
138; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[TMP1]], [[N_VEC]]
139; CHECK-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
140; CHECK:       scalar.ph:
141; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[X]], [[ENTRY:%.*]] ]
142; CHECK-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[Y]], [[ENTRY]] ], [ [[TMP10]], [[MIDDLE_BLOCK]] ]
143; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
144; CHECK:       for.body:
145; CHECK-NEXT:    [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[FOR_BODY]] ]
146; CHECK-NEXT:    [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[R_NEXT:%.*]], [[FOR_BODY]] ]
147; CHECK-NEXT:    [[T0:%.*]] = and i32 [[R]], 1
148; CHECK-NEXT:    [[R_NEXT]] = add i32 [[T0]], -1
149; CHECK-NEXT:    [[I_NEXT]] = add nsw i32 [[I]], 1
150; CHECK-NEXT:    [[COND:%.*]] = icmp sgt i32 [[I]], 77
151; CHECK-NEXT:    br i1 [[COND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
152; CHECK:       for.end:
153; CHECK-NEXT:    [[T1:%.*]] = phi i32 [ [[R_NEXT]], [[FOR_BODY]] ], [ [[TMP10]], [[MIDDLE_BLOCK]] ]
154; CHECK-NEXT:    ret i32 [[T1]]
155;
156entry:
157  br label %for.body
158
159for.body:
160  %i = phi i32 [ %x, %entry ], [ %i.next, %for.body ]
161  %r = phi i32 [ %y, %entry ], [ %r.next, %for.body ]
162  %t0 = and i32 %r, 1
163  %r.next = add i32 %t0, -1
164  %i.next = add nsw i32 %i, 1
165  %cond = icmp sgt i32 %i, 77
166  br i1 %cond, label %for.end, label %for.body
167
168for.end:
169  %t1 = phi i32 [ %r.next, %for.body ]
170  ret i32 %t1
171}
172
173define i32 @pr51794_signed_negative(i16 %iv.start, i32 %xor.start) {
174; CHECK-LABEL: @pr51794_signed_negative(
175; CHECK-NEXT:  entry:
176; CHECK-NEXT:    br label [[LOOP:%.*]]
177; CHECK:       loop:
178; CHECK-NEXT:    [[XOR_RED:%.*]] = phi i32 [ [[XOR_START:%.*]], [[ENTRY:%.*]] ], [ [[XOR:%.*]], [[LOOP]] ]
179; CHECK-NEXT:    [[IV:%.*]] = phi i16 [ [[IV_START:%.*]], [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
180; CHECK-NEXT:    [[IV_NEXT]] = add i16 [[IV]], -1
181; CHECK-NEXT:    [[AND:%.*]] = and i32 [[XOR_RED]], 1
182; CHECK-NEXT:    [[XOR]] = xor i32 [[AND]], -1
183; CHECK-NEXT:    [[TOBOOL_NOT:%.*]] = icmp eq i16 [[IV_NEXT]], 0
184; CHECK-NEXT:    br i1 [[TOBOOL_NOT]], label [[EXIT:%.*]], label [[LOOP]]
185; CHECK:       exit:
186; CHECK-NEXT:    [[XOR_LCSSA:%.*]] = phi i32 [ [[XOR]], [[LOOP]] ]
187; CHECK-NEXT:    ret i32 [[XOR_LCSSA]]
188;
189entry:
190  br label %loop
191
192loop:
193  %xor.red = phi i32 [ %xor.start, %entry ], [ %xor, %loop ]
194  %iv = phi i16 [ %iv.start, %entry ], [ %iv.next, %loop ]
195  %iv.next = add i16 %iv, -1
196  %and = and i32 %xor.red, 1
197  %xor = xor i32 %and, -1
198  %tobool.not = icmp eq i16 %iv.next, 0
199  br i1 %tobool.not, label %exit, label %loop
200
201exit:
202  %xor.lcssa = phi i32 [ %xor, %loop ]
203  ret i32 %xor.lcssa
204}
205
206define i32 @pr52485_signed_negative(i32 %xor.start) {
207; CHECK-LABEL: @pr52485_signed_negative(
208; CHECK-NEXT:  entry:
209; CHECK-NEXT:    br label [[LOOP:%.*]]
210; CHECK:       loop:
211; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ -23, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
212; CHECK-NEXT:    [[XOR_RED:%.*]] = phi i32 [ [[XOR_START:%.*]], [[ENTRY]] ], [ [[XOR:%.*]], [[LOOP]] ]
213; CHECK-NEXT:    [[AND:%.*]] = and i32 [[XOR_RED]], 255
214; CHECK-NEXT:    [[XOR]] = xor i32 [[AND]], -9
215; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 2
216; CHECK-NEXT:    [[CMP_NOT:%.*]] = icmp eq i32 [[IV_NEXT]], -15
217; CHECK-NEXT:    br i1 [[CMP_NOT]], label [[EXIT:%.*]], label [[LOOP]]
218; CHECK:       exit:
219; CHECK-NEXT:    [[XOR_LCSSA:%.*]] = phi i32 [ [[XOR]], [[LOOP]] ]
220; CHECK-NEXT:    ret i32 [[XOR_LCSSA]]
221;
222entry:
223  br label %loop
224
225loop:
226  %iv = phi i32 [ -23, %entry ], [ %iv.next, %loop ]
227  %xor.red = phi i32 [ %xor.start, %entry ], [ %xor, %loop ]
228  %and = and i32 %xor.red, 255
229  %xor = xor i32 %and, -9
230  %iv.next = add nuw nsw i32 %iv, 2
231  %cmp.not = icmp eq i32 %iv.next, -15
232  br i1 %cmp.not, label %exit, label %loop
233
234exit:
235  %xor.lcssa = phi i32 [ %xor, %loop ]
236  ret i32 %xor.lcssa
237}
238