1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s  -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -dce -instcombine -S | FileCheck %s
3
4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5
6define i32 @reduction_sum_single(i32* noalias nocapture %A) {
7; CHECK-LABEL: @reduction_sum_single(
8; CHECK-NEXT:  entry:
9; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
10; CHECK:       vector.ph:
11; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
12; CHECK:       vector.body:
13; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
14; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ]
15; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
16; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
17; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
18; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]])
19; CHECK-NEXT:    [[TMP3]] = add i32 [[TMP2]], [[VEC_PHI]]
20; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
21; CHECK-NEXT:    [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
22; CHECK-NEXT:    br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
23; CHECK:       middle.block:
24; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
25; CHECK:       scalar.ph:
26; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
27; CHECK:       .lr.ph:
28; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP2:![0-9]+]]
29; CHECK:       ._crit_edge:
30; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP3]], [[MIDDLE_BLOCK]] ]
31; CHECK-NEXT:    ret i32 [[SUM_0_LCSSA]]
32;
33entry:
34  br label %.lr.ph
35
36.lr.ph:                                           ; preds = %entry, %.lr.ph
37  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
38  %sum.02 = phi i32 [ %l7, %.lr.ph ], [ 0, %entry ]
39  %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
40  %l3 = load i32, i32* %l2, align 4
41  %l7 = add i32 %sum.02, %l3
42  %indvars.iv.next = add i64 %indvars.iv, 1
43  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
44  %exitcond = icmp eq i32 %lftr.wideiv, 256
45  br i1 %exitcond, label %._crit_edge, label %.lr.ph
46
47._crit_edge:                                      ; preds = %.lr.ph
48  %sum.0.lcssa = phi i32 [ %l7, %.lr.ph ]
49  ret i32 %sum.0.lcssa
50}
51
52define i32 @reduction_sum(i32* noalias nocapture %A, i32* noalias nocapture %B) {
53; CHECK-LABEL: @reduction_sum(
54; CHECK-NEXT:  entry:
55; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
56; CHECK:       vector.ph:
57; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
58; CHECK:       vector.body:
59; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
60; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ]
61; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
62; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
63; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
64; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
65; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]]
66; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
67; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
68; CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[VEC_IND]])
69; CHECK-NEXT:    [[TMP5:%.*]] = add i32 [[TMP4]], [[VEC_PHI]]
70; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]])
71; CHECK-NEXT:    [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP5]]
72; CHECK-NEXT:    [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD1]])
73; CHECK-NEXT:    [[TMP9]] = add i32 [[TMP8]], [[TMP7]]
74; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
75; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], <i32 4, i32 4, i32 4, i32 4>
76; CHECK-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
77; CHECK-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
78; CHECK:       middle.block:
79; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
80; CHECK:       scalar.ph:
81; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
82; CHECK:       .lr.ph:
83; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP5:![0-9]+]]
84; CHECK:       ._crit_edge:
85; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ]
86; CHECK-NEXT:    ret i32 [[SUM_0_LCSSA]]
87;
88entry:
89  br label %.lr.ph
90
91.lr.ph:                                           ; preds = %entry, %.lr.ph
92  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
93  %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ]
94  %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
95  %l3 = load i32, i32* %l2, align 4
96  %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
97  %l5 = load i32, i32* %l4, align 4
98  %l6 = trunc i64 %indvars.iv to i32
99  %l7 = add i32 %sum.02, %l6
100  %l8 = add i32 %l7, %l3
101  %l9 = add i32 %l8, %l5
102  %indvars.iv.next = add i64 %indvars.iv, 1
103  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
104  %exitcond = icmp eq i32 %lftr.wideiv, 256
105  br i1 %exitcond, label %._crit_edge, label %.lr.ph
106
107._crit_edge:                                      ; preds = %.lr.ph
108  %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ]
109  ret i32 %sum.0.lcssa
110}
111
112define i32 @reduction_sum_const(i32* noalias nocapture %A) {
113; CHECK-LABEL: @reduction_sum_const(
114; CHECK-NEXT:  entry:
115; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
116; CHECK:       vector.ph:
117; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
118; CHECK:       vector.body:
119; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
120; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ]
121; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
122; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
123; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
124; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]])
125; CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP2]], [[VEC_PHI]]
126; CHECK-NEXT:    [[TMP4]] = add i32 [[TMP3]], 12
127; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
128; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
129; CHECK-NEXT:    br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
130; CHECK:       middle.block:
131; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
132; CHECK:       scalar.ph:
133; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
134; CHECK:       .lr.ph:
135; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP7:![0-9]+]]
136; CHECK:       ._crit_edge:
137; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP4]], [[MIDDLE_BLOCK]] ]
138; CHECK-NEXT:    ret i32 [[SUM_0_LCSSA]]
139;
140entry:
141  br label %.lr.ph
142
143.lr.ph:                                           ; preds = %entry, %.lr.ph
144  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
145  %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ]
146  %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
147  %l3 = load i32, i32* %l2, align 4
148  %l7 = add i32 %sum.02, %l3
149  %l9 = add i32 %l7, 3
150  %indvars.iv.next = add i64 %indvars.iv, 1
151  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
152  %exitcond = icmp eq i32 %lftr.wideiv, 256
153  br i1 %exitcond, label %._crit_edge, label %.lr.ph
154
155._crit_edge:                                      ; preds = %.lr.ph
156  %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ]
157  ret i32 %sum.0.lcssa
158}
159
160define i32 @reduction_prod(i32* noalias nocapture %A, i32* noalias nocapture %B) {
161; CHECK-LABEL: @reduction_prod(
162; CHECK-NEXT:  entry:
163; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
164; CHECK:       vector.ph:
165; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
166; CHECK:       vector.body:
167; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
168; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 1, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ]
169; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
170; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
171; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
172; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
173; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]]
174; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
175; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
176; CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[VEC_IND]])
177; CHECK-NEXT:    [[TMP5:%.*]] = mul i32 [[TMP4]], [[VEC_PHI]]
178; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[WIDE_LOAD]])
179; CHECK-NEXT:    [[TMP7:%.*]] = mul i32 [[TMP6]], [[TMP5]]
180; CHECK-NEXT:    [[TMP8:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[WIDE_LOAD1]])
181; CHECK-NEXT:    [[TMP9]] = mul i32 [[TMP8]], [[TMP7]]
182; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
183; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], <i32 4, i32 4, i32 4, i32 4>
184; CHECK-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
185; CHECK-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
186; CHECK:       middle.block:
187; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
188; CHECK:       scalar.ph:
189; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
190; CHECK:       .lr.ph:
191; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP9:![0-9]+]]
192; CHECK:       ._crit_edge:
193; CHECK-NEXT:    [[PROD_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ]
194; CHECK-NEXT:    ret i32 [[PROD_0_LCSSA]]
195;
196entry:
197  br label %.lr.ph
198
199.lr.ph:                                           ; preds = %entry, %.lr.ph
200  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
201  %prod.02 = phi i32 [ %l9, %.lr.ph ], [ 1, %entry ]
202  %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
203  %l3 = load i32, i32* %l2, align 4
204  %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
205  %l5 = load i32, i32* %l4, align 4
206  %l6 = trunc i64 %indvars.iv to i32
207  %l7 = mul i32 %prod.02, %l6
208  %l8 = mul i32 %l7, %l3
209  %l9 = mul i32 %l8, %l5
210  %indvars.iv.next = add i64 %indvars.iv, 1
211  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
212  %exitcond = icmp eq i32 %lftr.wideiv, 256
213  br i1 %exitcond, label %._crit_edge, label %.lr.ph
214
215._crit_edge:                                      ; preds = %.lr.ph
216  %prod.0.lcssa = phi i32 [ %l9, %.lr.ph ]
217  ret i32 %prod.0.lcssa
218}
219
220define i32 @reduction_mix(i32* noalias nocapture %A, i32* noalias nocapture %B) {
221; CHECK-LABEL: @reduction_mix(
222; CHECK-NEXT:  entry:
223; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
224; CHECK:       vector.ph:
225; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
226; CHECK:       vector.body:
227; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
228; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ]
229; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
230; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
231; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
232; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
233; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]]
234; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
235; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
236; CHECK-NEXT:    [[TMP4:%.*]] = mul nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]]
237; CHECK-NEXT:    [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[VEC_IND]])
238; CHECK-NEXT:    [[TMP6:%.*]] = add i32 [[TMP5]], [[VEC_PHI]]
239; CHECK-NEXT:    [[TMP7:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]])
240; CHECK-NEXT:    [[TMP8]] = add i32 [[TMP7]], [[TMP6]]
241; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
242; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], <i32 4, i32 4, i32 4, i32 4>
243; CHECK-NEXT:    [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
244; CHECK-NEXT:    br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
245; CHECK:       middle.block:
246; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
247; CHECK:       scalar.ph:
248; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
249; CHECK:       .lr.ph:
250; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP11:![0-9]+]]
251; CHECK:       ._crit_edge:
252; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP8]], [[MIDDLE_BLOCK]] ]
253; CHECK-NEXT:    ret i32 [[SUM_0_LCSSA]]
254;
255entry:
256  br label %.lr.ph
257
258.lr.ph:                                           ; preds = %entry, %.lr.ph
259  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
260  %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ]
261  %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
262  %l3 = load i32, i32* %l2, align 4
263  %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
264  %l5 = load i32, i32* %l4, align 4
265  %l6 = mul nsw i32 %l5, %l3
266  %l7 = trunc i64 %indvars.iv to i32
267  %l8 = add i32 %sum.02, %l7
268  %l9 = add i32 %l8, %l6
269  %indvars.iv.next = add i64 %indvars.iv, 1
270  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
271  %exitcond = icmp eq i32 %lftr.wideiv, 256
272  br i1 %exitcond, label %._crit_edge, label %.lr.ph
273
274._crit_edge:                                      ; preds = %.lr.ph
275  %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ]
276  ret i32 %sum.0.lcssa
277}
278
279define i32 @reduction_mul(i32* noalias nocapture %A, i32* noalias nocapture %B) {
280; CHECK-LABEL: @reduction_mul(
281; CHECK-NEXT:  entry:
282; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
283; CHECK:       vector.ph:
284; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
285; CHECK:       vector.body:
286; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
287; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 19, [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ]
288; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
289; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
290; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
291; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]]
292; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
293; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
294; CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[WIDE_LOAD]])
295; CHECK-NEXT:    [[TMP5:%.*]] = mul i32 [[TMP4]], [[VEC_PHI]]
296; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[WIDE_LOAD1]])
297; CHECK-NEXT:    [[TMP7]] = mul i32 [[TMP6]], [[TMP5]]
298; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
299; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
300; CHECK-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
301; CHECK:       middle.block:
302; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
303; CHECK:       scalar.ph:
304; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
305; CHECK:       .lr.ph:
306; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP13:![0-9]+]]
307; CHECK:       ._crit_edge:
308; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP7]], [[MIDDLE_BLOCK]] ]
309; CHECK-NEXT:    ret i32 [[SUM_0_LCSSA]]
310;
311entry:
312  br label %.lr.ph
313
314.lr.ph:                                           ; preds = %entry, %.lr.ph
315  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
316  %sum.02 = phi i32 [ %l7, %.lr.ph ], [ 19, %entry ]
317  %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
318  %l3 = load i32, i32* %l2, align 4
319  %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
320  %l5 = load i32, i32* %l4, align 4
321  %l6 = mul i32 %sum.02, %l3
322  %l7 = mul i32 %l6, %l5
323  %indvars.iv.next = add i64 %indvars.iv, 1
324  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
325  %exitcond = icmp eq i32 %lftr.wideiv, 256
326  br i1 %exitcond, label %._crit_edge, label %.lr.ph
327
328._crit_edge:                                      ; preds = %.lr.ph
329  %sum.0.lcssa = phi i32 [ %l7, %.lr.ph ]
330  ret i32 %sum.0.lcssa
331}
332
333define i32 @start_at_non_zero(i32* nocapture %in, i32* nocapture %coeff, i32* nocapture %out) {
334; CHECK-LABEL: @start_at_non_zero(
335; CHECK-NEXT:  entry:
336; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
337; CHECK:       vector.ph:
338; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
339; CHECK:       vector.body:
340; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
341; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 120, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]
342; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[IN:%.*]], i64 [[INDEX]]
343; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
344; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
345; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[COEFF:%.*]], i64 [[INDEX]]
346; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
347; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
348; CHECK-NEXT:    [[TMP4:%.*]] = mul nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]]
349; CHECK-NEXT:    [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]])
350; CHECK-NEXT:    [[TMP6]] = add i32 [[TMP5]], [[VEC_PHI]]
351; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
352; CHECK-NEXT:    [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
353; CHECK-NEXT:    br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
354; CHECK:       middle.block:
355; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
356; CHECK:       scalar.ph:
357; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
358; CHECK:       for.body:
359; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
360; CHECK:       for.end:
361; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ]
362; CHECK-NEXT:    ret i32 [[SUM_0_LCSSA]]
363;
364entry:
365  br label %for.body
366
367for.body:                                         ; preds = %entry, %for.body
368  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
369  %sum.09 = phi i32 [ %add, %for.body ], [ 120, %entry ]
370  %arrayidx = getelementptr inbounds i32, i32* %in, i64 %indvars.iv
371  %l0 = load i32, i32* %arrayidx, align 4
372  %arrayidx2 = getelementptr inbounds i32, i32* %coeff, i64 %indvars.iv
373  %l1 = load i32, i32* %arrayidx2, align 4
374  %mul = mul nsw i32 %l1, %l0
375  %add = add nsw i32 %mul, %sum.09
376  %indvars.iv.next = add i64 %indvars.iv, 1
377  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
378  %exitcond = icmp eq i32 %lftr.wideiv, 256
379  br i1 %exitcond, label %for.end, label %for.body
380
381for.end:                                          ; preds = %for.body, %entry
382  %sum.0.lcssa = phi i32 [ %add, %for.body ]
383  ret i32 %sum.0.lcssa
384}
385
386define i32 @reduction_and(i32* nocapture %A, i32* nocapture %B) {
387; CHECK-LABEL: @reduction_and(
388; CHECK-NEXT:  entry:
389; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
390; CHECK:       vector.ph:
391; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
392; CHECK:       vector.body:
393; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
394; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ -1, [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ]
395; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
396; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
397; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
398; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]]
399; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
400; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
401; CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> [[WIDE_LOAD]])
402; CHECK-NEXT:    [[TMP5:%.*]] = and i32 [[TMP4]], [[VEC_PHI]]
403; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> [[WIDE_LOAD1]])
404; CHECK-NEXT:    [[TMP7]] = and i32 [[TMP6]], [[TMP5]]
405; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
406; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
407; CHECK-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
408; CHECK:       middle.block:
409; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
410; CHECK:       scalar.ph:
411; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
412; CHECK:       for.body:
413; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
414; CHECK:       for.end:
415; CHECK-NEXT:    [[RESULT_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP7]], [[MIDDLE_BLOCK]] ]
416; CHECK-NEXT:    ret i32 [[RESULT_0_LCSSA]]
417;
418entry:
419  br label %for.body
420
421for.body:                                         ; preds = %entry, %for.body
422  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
423  %result.08 = phi i32 [ %and, %for.body ], [ -1, %entry ]
424  %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
425  %l0 = load i32, i32* %arrayidx, align 4
426  %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
427  %l1 = load i32, i32* %arrayidx2, align 4
428  %add = and i32 %result.08, %l0
429  %and = and i32 %add, %l1
430  %indvars.iv.next = add i64 %indvars.iv, 1
431  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
432  %exitcond = icmp eq i32 %lftr.wideiv, 256
433  br i1 %exitcond, label %for.end, label %for.body
434
435for.end:                                          ; preds = %for.body, %entry
436  %result.0.lcssa = phi i32 [ %and, %for.body ]
437  ret i32 %result.0.lcssa
438}
439
440define i32 @reduction_or(i32* nocapture %A, i32* nocapture %B) {
441; CHECK-LABEL: @reduction_or(
442; CHECK-NEXT:  entry:
443; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
444; CHECK:       vector.ph:
445; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
446; CHECK:       vector.body:
447; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
448; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]
449; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
450; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
451; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
452; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]]
453; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
454; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
455; CHECK-NEXT:    [[TMP4:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]]
456; CHECK-NEXT:    [[TMP5:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP4]])
457; CHECK-NEXT:    [[TMP6]] = or i32 [[TMP5]], [[VEC_PHI]]
458; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
459; CHECK-NEXT:    [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
460; CHECK-NEXT:    br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
461; CHECK:       middle.block:
462; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
463; CHECK:       scalar.ph:
464; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
465; CHECK:       for.body:
466; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
467; CHECK:       for.end:
468; CHECK-NEXT:    [[RESULT_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ]
469; CHECK-NEXT:    ret i32 [[RESULT_0_LCSSA]]
470;
471entry:
472  br label %for.body
473
474for.body:                                         ; preds = %entry, %for.body
475  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
476  %result.08 = phi i32 [ %or, %for.body ], [ 0, %entry ]
477  %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
478  %l0 = load i32, i32* %arrayidx, align 4
479  %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
480  %l1 = load i32, i32* %arrayidx2, align 4
481  %add = add nsw i32 %l1, %l0
482  %or = or i32 %add, %result.08
483  %indvars.iv.next = add i64 %indvars.iv, 1
484  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
485  %exitcond = icmp eq i32 %lftr.wideiv, 256
486  br i1 %exitcond, label %for.end, label %for.body
487
488for.end:                                          ; preds = %for.body, %entry
489  %result.0.lcssa = phi i32 [ %or, %for.body ]
490  ret i32 %result.0.lcssa
491}
492
493define i32 @reduction_xor(i32* nocapture %A, i32* nocapture %B) {
494; CHECK-LABEL: @reduction_xor(
495; CHECK-NEXT:  entry:
496; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
497; CHECK:       vector.ph:
498; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
499; CHECK:       vector.body:
500; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
501; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]
502; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
503; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
504; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
505; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]]
506; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
507; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
508; CHECK-NEXT:    [[TMP4:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]]
509; CHECK-NEXT:    [[TMP5:%.*]] = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> [[TMP4]])
510; CHECK-NEXT:    [[TMP6]] = xor i32 [[TMP5]], [[VEC_PHI]]
511; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
512; CHECK-NEXT:    [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
513; CHECK-NEXT:    br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
514; CHECK:       middle.block:
515; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
516; CHECK:       scalar.ph:
517; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
518; CHECK:       for.body:
519; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
520; CHECK:       for.end:
521; CHECK-NEXT:    [[RESULT_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ]
522; CHECK-NEXT:    ret i32 [[RESULT_0_LCSSA]]
523;
524entry:
525  br label %for.body
526
527for.body:                                         ; preds = %entry, %for.body
528  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
529  %result.08 = phi i32 [ %xor, %for.body ], [ 0, %entry ]
530  %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
531  %l0 = load i32, i32* %arrayidx, align 4
532  %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
533  %l1 = load i32, i32* %arrayidx2, align 4
534  %add = add nsw i32 %l1, %l0
535  %xor = xor i32 %add, %result.08
536  %indvars.iv.next = add i64 %indvars.iv, 1
537  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
538  %exitcond = icmp eq i32 %lftr.wideiv, 256
539  br i1 %exitcond, label %for.end, label %for.body
540
541for.end:                                          ; preds = %for.body, %entry
542  %result.0.lcssa = phi i32 [ %xor, %for.body ]
543  ret i32 %result.0.lcssa
544}
545
546define float @reduction_fadd(float* nocapture %A, float* nocapture %B) {
547; CHECK-LABEL: @reduction_fadd(
548; CHECK-NEXT:  entry:
549; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
550; CHECK:       vector.ph:
551; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
552; CHECK:       vector.body:
553; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
554; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP5:%.*]], [[VECTOR_BODY]] ]
555; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]]
556; CHECK-NEXT:    [[TMP1:%.*]] = bitcast float* [[TMP0]] to <4 x float>*
557; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4
558; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]]
559; CHECK-NEXT:    [[TMP3:%.*]] = bitcast float* [[TMP2]] to <4 x float>*
560; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x float>, <4 x float>* [[TMP3]], align 4
561; CHECK-NEXT:    [[TMP4:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float [[VEC_PHI]], <4 x float> [[WIDE_LOAD]])
562; CHECK-NEXT:    [[TMP5]] = call fast float @llvm.vector.reduce.fadd.v4f32(float [[TMP4]], <4 x float> [[WIDE_LOAD1]])
563; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
564; CHECK-NEXT:    [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
565; CHECK-NEXT:    br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]
566; CHECK:       middle.block:
567; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
568; CHECK:       scalar.ph:
569; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
570; CHECK:       for.body:
571; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]
572; CHECK:       for.end:
573; CHECK-NEXT:    [[RESULT_0_LCSSA:%.*]] = phi float [ poison, [[FOR_BODY]] ], [ [[TMP5]], [[MIDDLE_BLOCK]] ]
574; CHECK-NEXT:    ret float [[RESULT_0_LCSSA]]
575;
576entry:
577  br label %for.body
578
579for.body:                                         ; preds = %entry, %for.body
580  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
581  %result.08 = phi float [ %fadd, %for.body ], [ 0.0, %entry ]
582  %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv
583  %l0 = load float, float* %arrayidx, align 4
584  %arrayidx2 = getelementptr inbounds float, float* %B, i64 %indvars.iv
585  %l1 = load float, float* %arrayidx2, align 4
586  %add = fadd fast float %result.08, %l0
587  %fadd = fadd fast float %add, %l1
588  %indvars.iv.next = add i64 %indvars.iv, 1
589  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
590  %exitcond = icmp eq i32 %lftr.wideiv, 256
591  br i1 %exitcond, label %for.end, label %for.body
592
593for.end:                                          ; preds = %for.body, %entry
594  %result.0.lcssa = phi float [ %fadd, %for.body ]
595  ret float %result.0.lcssa
596}
597
598define float @reduction_fmul(float* nocapture %A, float* nocapture %B) {
599; CHECK-LABEL: @reduction_fmul(
600; CHECK-NEXT:  entry:
601; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
602; CHECK:       vector.ph:
603; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
604; CHECK:       vector.body:
605; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
606; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ]
607; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]]
608; CHECK-NEXT:    [[TMP1:%.*]] = bitcast float* [[TMP0]] to <4 x float>*
609; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4
610; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]]
611; CHECK-NEXT:    [[TMP3:%.*]] = bitcast float* [[TMP2]] to <4 x float>*
612; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x float>, <4 x float>* [[TMP3]], align 4
613; CHECK-NEXT:    [[TMP4:%.*]] = call fast float @llvm.vector.reduce.fmul.v4f32(float 1.000000e+00, <4 x float> [[WIDE_LOAD]])
614; CHECK-NEXT:    [[TMP5:%.*]] = fmul fast float [[TMP4]], [[VEC_PHI]]
615; CHECK-NEXT:    [[TMP6:%.*]] = call fast float @llvm.vector.reduce.fmul.v4f32(float 1.000000e+00, <4 x float> [[WIDE_LOAD1]])
616; CHECK-NEXT:    [[TMP7]] = fmul fast float [[TMP6]], [[TMP5]]
617; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
618; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
619; CHECK-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
620; CHECK:       middle.block:
621; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
622; CHECK:       scalar.ph:
623; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
624; CHECK:       for.body:
625; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
626; CHECK:       for.end:
627; CHECK-NEXT:    [[RESULT_0_LCSSA:%.*]] = phi float [ poison, [[FOR_BODY]] ], [ [[TMP7]], [[MIDDLE_BLOCK]] ]
628; CHECK-NEXT:    ret float [[RESULT_0_LCSSA]]
629;
630entry:
631  br label %for.body
632
633for.body:                                         ; preds = %entry, %for.body
634  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
635  %result.08 = phi float [ %fmul, %for.body ], [ 0.0, %entry ]
636  %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv
637  %l0 = load float, float* %arrayidx, align 4
638  %arrayidx2 = getelementptr inbounds float, float* %B, i64 %indvars.iv
639  %l1 = load float, float* %arrayidx2, align 4
640  %add = fmul fast float %result.08, %l0
641  %fmul = fmul fast float %add, %l1
642  %indvars.iv.next = add i64 %indvars.iv, 1
643  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
644  %exitcond = icmp eq i32 %lftr.wideiv, 256
645  br i1 %exitcond, label %for.end, label %for.body
646
647for.end:                                          ; preds = %for.body, %entry
648  %result.0.lcssa = phi float [ %fmul, %for.body ]
649  ret float %result.0.lcssa
650}
651
652define i32 @reduction_min(i32* nocapture %A, i32* nocapture %B) {
653; CHECK-LABEL: @reduction_min(
654; CHECK-NEXT:  entry:
655; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
656; CHECK:       vector.ph:
657; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
658; CHECK:       vector.body:
659; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
660; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 1000, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ]
661; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
662; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
663; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
664; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> [[WIDE_LOAD]])
665; CHECK-NEXT:    [[TMP3]] = call i32 @llvm.smin.i32(i32 [[TMP2]], i32 [[VEC_PHI]])
666; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
667; CHECK-NEXT:    [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
668; CHECK-NEXT:    br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]
669; CHECK:       middle.block:
670; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
671; CHECK:       scalar.ph:
672; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
673; CHECK:       for.body:
674; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
675; CHECK:       for.end:
676; CHECK-NEXT:    [[RESULT_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP3]], [[MIDDLE_BLOCK]] ]
677; CHECK-NEXT:    ret i32 [[RESULT_0_LCSSA]]
678;
679entry:
680  br label %for.body
681
682for.body:                                         ; preds = %entry, %for.body
683  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
684  %result.08 = phi i32 [ %v0, %for.body ], [ 1000, %entry ]
685  %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
686  %l0 = load i32, i32* %arrayidx, align 4
687  %c0 = icmp slt i32 %result.08, %l0
688  %v0 = select i1 %c0, i32 %result.08, i32 %l0
689  %indvars.iv.next = add i64 %indvars.iv, 1
690  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
691  %exitcond = icmp eq i32 %lftr.wideiv, 256
692  br i1 %exitcond, label %for.end, label %for.body
693
694for.end:                                          ; preds = %for.body, %entry
695  %result.0.lcssa = phi i32 [ %v0, %for.body ]
696  ret i32 %result.0.lcssa
697}
698
699define i32 @reduction_max(i32* nocapture %A, i32* nocapture %B) {
700; CHECK-LABEL: @reduction_max(
701; CHECK-NEXT:  entry:
702; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
703; CHECK:       vector.ph:
704; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
705; CHECK:       vector.body:
706; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
707; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 1000, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ]
708; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
709; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
710; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
711; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> [[WIDE_LOAD]])
712; CHECK-NEXT:    [[TMP3]] = call i32 @llvm.umax.i32(i32 [[TMP2]], i32 [[VEC_PHI]])
713; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
714; CHECK-NEXT:    [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
715; CHECK-NEXT:    br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]
716; CHECK:       middle.block:
717; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
718; CHECK:       scalar.ph:
719; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
720; CHECK:       for.body:
721; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]]
722; CHECK:       for.end:
723; CHECK-NEXT:    [[RESULT_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP3]], [[MIDDLE_BLOCK]] ]
724; CHECK-NEXT:    ret i32 [[RESULT_0_LCSSA]]
725;
726entry:
727  br label %for.body
728
729for.body:                                         ; preds = %entry, %for.body
730  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
731  %result.08 = phi i32 [ %v0, %for.body ], [ 1000, %entry ]
732  %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
733  %l0 = load i32, i32* %arrayidx, align 4
734  %c0 = icmp ugt i32 %result.08, %l0
735  %v0 = select i1 %c0, i32 %result.08, i32 %l0
736  %indvars.iv.next = add i64 %indvars.iv, 1
737  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
738  %exitcond = icmp eq i32 %lftr.wideiv, 256
739  br i1 %exitcond, label %for.end, label %for.body
740
741for.end:                                          ; preds = %for.body, %entry
742  %result.0.lcssa = phi i32 [ %v0, %for.body ]
743  ret i32 %result.0.lcssa
744}
745
746; Sub we can create a reduction, but not inloop
747define i32 @reduction_sub_lhs(i32* noalias nocapture %A) {
748; CHECK-LABEL: @reduction_sub_lhs(
749; CHECK-NEXT:  entry:
750; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
751; CHECK:       vector.ph:
752; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
753; CHECK:       vector.body:
754; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
755; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP2:%.*]], [[VECTOR_BODY]] ]
756; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
757; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
758; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
759; CHECK-NEXT:    [[TMP2]] = sub <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]]
760; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
761; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
762; CHECK-NEXT:    br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
763; CHECK:       middle.block:
764; CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP2]])
765; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
766; CHECK:       scalar.ph:
767; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
768; CHECK:       for.body:
769; CHECK-NEXT:    br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]]
770; CHECK:       for.end:
771; CHECK-NEXT:    [[X_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP4]], [[MIDDLE_BLOCK]] ]
772; CHECK-NEXT:    ret i32 [[X_0_LCSSA]]
773;
774entry:
775  br label %for.body
776
777for.body:                                         ; preds = %entry, %for.body
778  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
779  %x.05 = phi i32 [ %sub, %for.body ], [ 0, %entry ]
780  %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
781  %l0 = load i32, i32* %arrayidx, align 4
782  %sub = sub nsw i32 %x.05, %l0
783  %indvars.iv.next = add i64 %indvars.iv, 1
784  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
785  %exitcond = icmp eq i32 %lftr.wideiv, 256
786  br i1 %exitcond, label %for.end, label %for.body
787
788for.end:                                          ; preds = %for.body, %entry
789  %x.0.lcssa = phi i32 [ %sub, %for.body ]
790  ret i32 %x.0.lcssa
791}
792
793; Conditional reductions with multi-input phis.
794define float @reduction_conditional(float* %A, float* %B, float* %C, float %S) {
795; CHECK-LABEL: @reduction_conditional(
796; CHECK-NEXT:  entry:
797; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
798; CHECK:       vector.ph:
799; CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x float> <float poison, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, float [[S:%.*]], i64 0
800; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
801; CHECK:       vector.body:
802; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
803; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x float> [ [[TMP0]], [[VECTOR_PH]] ], [ [[PREDPHI3:%.*]], [[VECTOR_BODY]] ]
804; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]]
805; CHECK-NEXT:    [[TMP2:%.*]] = bitcast float* [[TMP1]] to <4 x float>*
806; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP2]], align 4
807; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]]
808; CHECK-NEXT:    [[TMP4:%.*]] = bitcast float* [[TMP3]] to <4 x float>*
809; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x float>, <4 x float>* [[TMP4]], align 4
810; CHECK-NEXT:    [[TMP5:%.*]] = fcmp ogt <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD1]]
811; CHECK-NEXT:    [[TMP6:%.*]] = fcmp ule <4 x float> [[WIDE_LOAD1]], <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
812; CHECK-NEXT:    [[TMP7:%.*]] = fcmp ogt <4 x float> [[WIDE_LOAD]], <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>
813; CHECK-NEXT:    [[TMP8:%.*]] = and <4 x i1> [[TMP5]], [[TMP6]]
814; CHECK-NEXT:    [[TMP9:%.*]] = and <4 x i1> [[TMP8]], [[TMP7]]
815; CHECK-NEXT:    [[TMP10:%.*]] = xor <4 x i1> [[TMP7]], <i1 true, i1 true, i1 true, i1 true>
816; CHECK-NEXT:    [[TMP11:%.*]] = and <4 x i1> [[TMP8]], [[TMP10]]
817; CHECK-NEXT:    [[TMP12:%.*]] = xor <4 x i1> [[TMP5]], <i1 true, i1 true, i1 true, i1 true>
818; CHECK-NEXT:    [[PREDPHI_V:%.*]] = select <4 x i1> [[TMP9]], <4 x float> [[WIDE_LOAD1]], <4 x float> [[WIDE_LOAD]]
819; CHECK-NEXT:    [[TMP13:%.*]] = select <4 x i1> [[TMP12]], <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i1> [[TMP11]]
820; CHECK-NEXT:    [[PREDPHI2:%.*]] = select <4 x i1> [[TMP13]], <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, <4 x float> [[PREDPHI_V]]
821; CHECK-NEXT:    [[PREDPHI3]] = fadd fast <4 x float> [[VEC_PHI]], [[PREDPHI2]]
822; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
823; CHECK-NEXT:    [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128
824; CHECK-NEXT:    br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]
825; CHECK:       middle.block:
826; CHECK-NEXT:    [[TMP15:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[PREDPHI3]])
827; CHECK-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
828; CHECK:       scalar.ph:
829; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
830; CHECK:       for.body:
831; CHECK-NEXT:    br i1 poison, label [[IF_THEN:%.*]], label [[FOR_INC:%.*]]
832; CHECK:       if.then:
833; CHECK-NEXT:    br i1 poison, label [[IF_THEN8:%.*]], label [[IF_ELSE:%.*]]
834; CHECK:       if.then8:
835; CHECK-NEXT:    br label [[FOR_INC]]
836; CHECK:       if.else:
837; CHECK-NEXT:    br i1 poison, label [[IF_THEN16:%.*]], label [[FOR_INC]]
838; CHECK:       if.then16:
839; CHECK-NEXT:    br label [[FOR_INC]]
840; CHECK:       for.inc:
841; CHECK-NEXT:    br i1 poison, label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP33:![0-9]+]]
842; CHECK:       for.end:
843; CHECK-NEXT:    [[SUM_1_LCSSA:%.*]] = phi float [ poison, [[FOR_INC]] ], [ [[TMP15]], [[MIDDLE_BLOCK]] ]
844; CHECK-NEXT:    ret float [[SUM_1_LCSSA]]
845;
846entry:
847  br label %for.body
848
849for.body:
850  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]
851  %sum.033 = phi float [ %S, %entry ], [ %sum.1, %for.inc ]
852  %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv
853  %l0 = load float, float* %arrayidx, align 4
854  %arrayidx2 = getelementptr inbounds float, float* %B, i64 %indvars.iv
855  %l1 = load float, float* %arrayidx2, align 4
856  %cmp3 = fcmp ogt float %l0, %l1
857  br i1 %cmp3, label %if.then, label %for.inc
858
859if.then:
860  %cmp6 = fcmp ogt float %l1, 1.000000e+00
861  br i1 %cmp6, label %if.then8, label %if.else
862
863if.then8:
864  %add = fadd fast float %sum.033, %l0
865  br label %for.inc
866
867if.else:
868  %cmp14 = fcmp ogt float %l0, 2.000000e+00
869  br i1 %cmp14, label %if.then16, label %for.inc
870
871if.then16:
872  %add19 = fadd fast float %sum.033, %l1
873  br label %for.inc
874
875for.inc:
876  %sum.1 = phi float [ %add, %if.then8 ], [ %add19, %if.then16 ], [ %sum.033, %if.else ], [ %sum.033, %for.body ]
877  %indvars.iv.next = add i64 %indvars.iv, 1
878  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
879  %exitcond = icmp ne i32 %lftr.wideiv, 128
880  br i1 %exitcond, label %for.body, label %for.end
881
882for.end:
883  %sum.1.lcssa = phi float [ %sum.1, %for.inc ]
884  ret float %sum.1.lcssa
885}
886
887define i32 @reduction_sum_multiuse(i32* noalias nocapture %A, i32* noalias nocapture %B) {
888; CHECK-LABEL: @reduction_sum_multiuse(
889; CHECK-NEXT:  entry:
890; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
891; CHECK:       .lr.ph:
892; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[DOTLR_PH]] ], [ 0, [[ENTRY:%.*]] ]
893; CHECK-NEXT:    [[SUM_02:%.*]] = phi i32 [ [[L10:%.*]], [[DOTLR_PH]] ], [ 0, [[ENTRY]] ]
894; CHECK-NEXT:    [[L2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
895; CHECK-NEXT:    [[L3:%.*]] = load i32, i32* [[L2]], align 4
896; CHECK-NEXT:    [[L6:%.*]] = trunc i64 [[INDVARS_IV]] to i32
897; CHECK-NEXT:    [[L7:%.*]] = add i32 [[SUM_02]], [[L6]]
898; CHECK-NEXT:    [[L8:%.*]] = add i32 [[L7]], [[L3]]
899; CHECK-NEXT:    [[L10]] = add i32 [[L8]], [[SUM_02]]
900; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
901; CHECK-NEXT:    [[TMP0:%.*]] = and i64 [[INDVARS_IV_NEXT]], 4294967295
902; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[TMP0]], 256
903; CHECK-NEXT:    br i1 [[EXITCOND]], label [[END:%.*]], label [[DOTLR_PH]]
904; CHECK:       end:
905; CHECK-NEXT:    ret i32 [[L10]]
906;
907entry:
908  br label %.lr.ph
909
910.lr.ph:                                           ; preds = %entry, %.lr.ph
911  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
912  %sum.02 = phi i32 [ %l10, %.lr.ph ], [ 0, %entry ]
913  %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
914  %l3 = load i32, i32* %l2, align 4
915  %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
916  %l5 = load i32, i32* %l4, align 4
917  %l6 = trunc i64 %indvars.iv to i32
918  %l7 = add i32 %sum.02, %l6
919  %l8 = add i32 %l7, %l3
920  %l9 = add i32 %l8, %l5
921  %l10 = add i32 %l8, %sum.02
922  %indvars.iv.next = add i64 %indvars.iv, 1
923  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
924  %exitcond = icmp eq i32 %lftr.wideiv, 256
925  br i1 %exitcond, label %end, label %.lr.ph
926
927end:
928  %f1 = phi i32 [ %l10, %.lr.ph ]
929  ret i32 %f1
930}
931
932; Predicated loop, cannot (yet) use in-loop reductions.
933define i32 @reduction_predicated(i32* noalias nocapture %A, i32* noalias nocapture %B) {
934; CHECK-LABEL: @reduction_predicated(
935; CHECK-NEXT:  entry:
936; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
937; CHECK:       vector.ph:
938; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
939; CHECK:       vector.body:
940; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
941; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ]
942; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
943; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
944; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
945; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
946; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]]
947; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
948; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
949; CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[VEC_IND]])
950; CHECK-NEXT:    [[TMP5:%.*]] = add i32 [[TMP4]], [[VEC_PHI]]
951; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD]])
952; CHECK-NEXT:    [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP5]]
953; CHECK-NEXT:    [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_LOAD1]])
954; CHECK-NEXT:    [[TMP9]] = add i32 [[TMP8]], [[TMP7]]
955; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
956; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], <i32 4, i32 4, i32 4, i32 4>
957; CHECK-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
958; CHECK-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
959; CHECK:       middle.block:
960; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
961; CHECK:       scalar.ph:
962; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
963; CHECK:       .lr.ph:
964; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP35:![0-9]+]]
965; CHECK:       ._crit_edge:
966; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ]
967; CHECK-NEXT:    ret i32 [[SUM_0_LCSSA]]
968;
969entry:
970  br label %.lr.ph
971
972.lr.ph:                                           ; preds = %entry, %.lr.ph
973  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
974  %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ]
975  %l2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
976  %l3 = load i32, i32* %l2, align 4
977  %l4 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
978  %l5 = load i32, i32* %l4, align 4
979  %l6 = trunc i64 %indvars.iv to i32
980  %l7 = add i32 %sum.02, %l6
981  %l8 = add i32 %l7, %l3
982  %l9 = add i32 %l8, %l5
983  %indvars.iv.next = add i64 %indvars.iv, 1
984  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
985  %exitcond = icmp eq i32 %lftr.wideiv, 256
986  br i1 %exitcond, label %._crit_edge, label %.lr.ph, !llvm.loop !6
987
988._crit_edge:                                      ; preds = %.lr.ph
989  %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ]
990  ret i32 %sum.0.lcssa
991}
992
993define i8 @reduction_add_trunc(i8* noalias nocapture %A) {
994; CHECK-LABEL: @reduction_add_trunc(
995; CHECK-NEXT:  entry:
996; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
997; CHECK:       vector.ph:
998; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
999; CHECK:       vector.body:
1000; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
1001; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i8> [ <i8 -1, i8 0, i8 0, i8 0>, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ]
1002; CHECK-NEXT:    [[TMP0:%.*]] = sext i32 [[INDEX]] to i64
1003; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i64 [[TMP0]]
1004; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i8* [[TMP1]] to <4 x i8>*
1005; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i8>, <4 x i8>* [[TMP2]], align 4
1006; CHECK-NEXT:    [[TMP3]] = add <4 x i8> [[VEC_PHI]], [[WIDE_LOAD]]
1007; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
1008; CHECK-NEXT:    [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 256
1009; CHECK-NEXT:    br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
1010; CHECK:       middle.block:
1011; CHECK-NEXT:    [[TMP5:%.*]] = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> [[TMP3]])
1012; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
1013; CHECK:       scalar.ph:
1014; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
1015; CHECK:       .lr.ph:
1016; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP37:![0-9]+]]
1017; CHECK:       ._crit_edge:
1018; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i8 [ poison, [[DOTLR_PH]] ], [ [[TMP5]], [[MIDDLE_BLOCK]] ]
1019; CHECK-NEXT:    ret i8 [[SUM_0_LCSSA]]
1020;
1021entry:
1022  br label %.lr.ph
1023
1024.lr.ph:                                           ; preds = %entry, %.lr.ph
1025  %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
1026  %sum.02p = phi i32 [ %l9, %.lr.ph ], [ 255, %entry ]
1027  %sum.02 = and i32 %sum.02p, 255
1028  %l2 = getelementptr inbounds i8, i8* %A, i32 %indvars.iv
1029  %l3 = load i8, i8* %l2, align 4
1030  %l3e = zext i8 %l3 to i32
1031  %l9 = add i32 %sum.02, %l3e
1032  %indvars.iv.next = add i32 %indvars.iv, 1
1033  %exitcond = icmp eq i32 %indvars.iv.next, 256
1034  br i1 %exitcond, label %._crit_edge, label %.lr.ph
1035
1036._crit_edge:                                      ; preds = %.lr.ph
1037  %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ]
1038  %ret = trunc i32 %sum.0.lcssa to i8
1039  ret i8 %ret
1040}
1041
1042
1043define i8 @reduction_and_trunc(i8* noalias nocapture %A) {
1044; CHECK-LABEL: @reduction_and_trunc(
1045; CHECK-NEXT:  entry:
1046; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
1047; CHECK:       vector.ph:
1048; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
1049; CHECK:       vector.body:
1050; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
1051; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i8> [ <i8 -1, i8 -1, i8 -1, i8 -1>, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ]
1052; CHECK-NEXT:    [[TMP0:%.*]] = sext i32 [[INDEX]] to i64
1053; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i64 [[TMP0]]
1054; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i8* [[TMP1]] to <4 x i8>*
1055; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i8>, <4 x i8>* [[TMP2]], align 4
1056; CHECK-NEXT:    [[TMP3]] = and <4 x i8> [[VEC_PHI]], [[WIDE_LOAD]]
1057; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
1058; CHECK-NEXT:    [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 256
1059; CHECK-NEXT:    br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP38:![0-9]+]]
1060; CHECK:       middle.block:
1061; CHECK-NEXT:    [[TMP5:%.*]] = call i8 @llvm.vector.reduce.and.v4i8(<4 x i8> [[TMP3]])
1062; CHECK-NEXT:    br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
1063; CHECK:       scalar.ph:
1064; CHECK-NEXT:    br label [[DOTLR_PH:%.*]]
1065; CHECK:       .lr.ph:
1066; CHECK-NEXT:    br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP39:![0-9]+]]
1067; CHECK:       ._crit_edge:
1068; CHECK-NEXT:    [[SUM_0_LCSSA:%.*]] = phi i8 [ poison, [[DOTLR_PH]] ], [ [[TMP5]], [[MIDDLE_BLOCK]] ]
1069; CHECK-NEXT:    ret i8 [[SUM_0_LCSSA]]
1070;
1071entry:
1072  br label %.lr.ph
1073
1074.lr.ph:                                           ; preds = %entry, %.lr.ph
1075  %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ]
1076  %sum.02p = phi i32 [ %l9, %.lr.ph ], [ 255, %entry ]
1077  %sum.02 = and i32 %sum.02p, 255
1078  %l2 = getelementptr inbounds i8, i8* %A, i32 %indvars.iv
1079  %l3 = load i8, i8* %l2, align 4
1080  %l3e = zext i8 %l3 to i32
1081  %l9 = and i32 %sum.02, %l3e
1082  %indvars.iv.next = add i32 %indvars.iv, 1
1083  %exitcond = icmp eq i32 %indvars.iv.next, 256
1084  br i1 %exitcond, label %._crit_edge, label %.lr.ph
1085
1086._crit_edge:                                      ; preds = %.lr.ph
1087  %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ]
1088  %ret = trunc i32 %sum.0.lcssa to i8
1089  ret i8 %ret
1090}
1091
1092; Test case when loop has a call to the llvm.fmuladd intrinsic.
1093define float @reduction_fmuladd(float* %a, float* %b, i64 %n) {
1094; CHECK-LABEL: @reduction_fmuladd(
1095; CHECK-NEXT:  entry:
1096; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
1097; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
1098; CHECK:       vector.ph:
1099; CHECK-NEXT:    [[N_VEC:%.*]] = and i64 [[N]], -4
1100; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
1101; CHECK:       vector.body:
1102; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
1103; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]
1104; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]]
1105; CHECK-NEXT:    [[TMP1:%.*]] = bitcast float* [[TMP0]] to <4 x float>*
1106; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4
1107; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]]
1108; CHECK-NEXT:    [[TMP3:%.*]] = bitcast float* [[TMP2]] to <4 x float>*
1109; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x float>, <4 x float>* [[TMP3]], align 4
1110; CHECK-NEXT:    [[TMP4:%.*]] = fmul <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD1]]
1111; CHECK-NEXT:    [[TMP5:%.*]] = call float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[TMP4]])
1112; CHECK-NEXT:    [[TMP6]] = fadd float [[TMP5]], [[VEC_PHI]]
1113; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
1114; CHECK-NEXT:    [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
1115; CHECK-NEXT:    br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP40:![0-9]+]]
1116; CHECK:       middle.block:
1117; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]]
1118; CHECK-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
1119; CHECK:       scalar.ph:
1120; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
1121; CHECK-NEXT:    [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP6]], [[MIDDLE_BLOCK]] ], [ 0.000000e+00, [[ENTRY]] ]
1122; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
1123; CHECK:       for.body:
1124; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]
1125; CHECK-NEXT:    [[SUM_07:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[MULADD:%.*]], [[FOR_BODY]] ]
1126; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[IV]]
1127; CHECK-NEXT:    [[TMP8:%.*]] = load float, float* [[ARRAYIDX]], align 4
1128; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[IV]]
1129; CHECK-NEXT:    [[TMP9:%.*]] = load float, float* [[ARRAYIDX2]], align 4
1130; CHECK-NEXT:    [[MULADD]] = tail call float @llvm.fmuladd.f32(float [[TMP8]], float [[TMP9]], float [[SUM_07]])
1131; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
1132; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
1133; CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP41:![0-9]+]]
1134; CHECK:       for.end:
1135; CHECK-NEXT:    [[MULADD_LCSSA:%.*]] = phi float [ [[MULADD]], [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ]
1136; CHECK-NEXT:    ret float [[MULADD_LCSSA]]
1137;
1138
1139entry:
1140  br label %for.body
1141
1142for.body:
1143  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
1144  %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ]
1145  %arrayidx = getelementptr inbounds float, float* %a, i64 %iv
1146  %0 = load float, float* %arrayidx, align 4
1147  %arrayidx2 = getelementptr inbounds float, float* %b, i64 %iv
1148  %1 = load float, float* %arrayidx2, align 4
1149  %muladd = tail call float @llvm.fmuladd.f32(float %0, float %1, float %sum.07)
1150  %iv.next = add nuw nsw i64 %iv, 1
1151  %exitcond.not = icmp eq i64 %iv.next, %n
1152  br i1 %exitcond.not, label %for.end, label %for.body
1153
1154for.end:
1155  ret float %muladd
1156}
1157
1158declare float @llvm.fmuladd.f32(float, float, float)
1159
1160!6 = distinct !{!6, !7, !8}
1161!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
1162!8 = !{!"llvm.loop.vectorize.enable", i1 true}
1163