1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -S | FileCheck %s 3 4; Test case for PR44488. Checks that the correct predicates are created for 5; branches where true and false successors are equal. See the checks involving 6; CMP1 and CMP2. 7 8@v_38 = global i16 12061, align 1 9@v_39 = global i16 11333, align 1 10 11define i16 @test_true_and_false_branch_equal() { 12; CHECK-LABEL: @test_true_and_false_branch_equal( 13; CHECK-NEXT: entry: 14; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 15; CHECK: vector.ph: 16; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 17; CHECK: vector.body: 18; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_SREM_CONTINUE4:%.*]] ] 19; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[INDEX]] to i16 20; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i16 99, [[TMP0]] 21; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[OFFSET_IDX]], 0 22; CHECK-NEXT: [[TMP2:%.*]] = load i16, i16* @v_38, align 1 23; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i16> poison, i16 [[TMP2]], i32 0 24; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x i16> [[BROADCAST_SPLATINSERT1]], <2 x i16> poison, <2 x i32> zeroinitializer 25; CHECK-NEXT: [[TMP3:%.*]] = icmp eq <2 x i16> [[BROADCAST_SPLAT2]], <i16 32767, i16 32767> 26; CHECK-NEXT: [[TMP4:%.*]] = icmp eq <2 x i16> [[BROADCAST_SPLAT2]], zeroinitializer 27; CHECK-NEXT: [[TMP5:%.*]] = xor <2 x i1> [[TMP4]], <i1 true, i1 true> 28; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i1> [[TMP5]], i32 0 29; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_SREM_IF:%.*]], label [[PRED_SREM_CONTINUE:%.*]] 30; CHECK: pred.srem.if: 31; CHECK-NEXT: [[TMP7:%.*]] = srem i16 5786, [[TMP2]] 32; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i16> poison, i16 [[TMP7]], i32 0 33; CHECK-NEXT: br label [[PRED_SREM_CONTINUE]] 34; CHECK: pred.srem.continue: 35; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i16> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_SREM_IF]] ] 36; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP5]], i32 1 37; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_SREM_IF3:%.*]], label [[PRED_SREM_CONTINUE4]] 38; CHECK: pred.srem.if1: 39; CHECK-NEXT: [[TMP11:%.*]] = srem i16 5786, [[TMP2]] 40; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i16> [[TMP9]], i16 [[TMP11]], i32 1 41; CHECK-NEXT: br label [[PRED_SREM_CONTINUE4]] 42; CHECK: pred.srem.continue2: 43; CHECK-NEXT: [[TMP13:%.*]] = phi <2 x i16> [ [[TMP9]], [[PRED_SREM_CONTINUE]] ], [ [[TMP12]], [[PRED_SREM_IF3]] ] 44; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP4]], <2 x i16> <i16 5786, i16 5786>, <2 x i16> [[TMP13]] 45; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x i16> [[PREDPHI]], i32 0 46; CHECK-NEXT: store i16 [[TMP14]], i16* @v_39, align 1 47; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x i16> [[PREDPHI]], i32 1 48; CHECK-NEXT: store i16 [[TMP15]], i16* @v_39, align 1 49; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 50; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[INDEX_NEXT]], 12 51; CHECK-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] 52; CHECK: middle.block: 53; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 12, 12 54; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 55; CHECK: scalar.ph: 56; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i16 [ 111, [[MIDDLE_BLOCK]] ], [ 99, [[ENTRY:%.*]] ] 57; CHECK-NEXT: br label [[FOR_BODY:%.*]] 58; CHECK: for.body: 59; CHECK-NEXT: [[I_07:%.*]] = phi i16 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INC7:%.*]], [[FOR_LATCH:%.*]] ] 60; CHECK-NEXT: [[LV:%.*]] = load i16, i16* @v_38, align 1 61; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i16 [[LV]], 32767 62; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END:%.*]], label [[COND_END]] 63; CHECK: cond.end: 64; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i16 [[LV]], 0 65; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_LATCH]], label [[COND_FALSE4:%.*]] 66; CHECK: cond.false4: 67; CHECK-NEXT: [[REM:%.*]] = srem i16 5786, [[LV]] 68; CHECK-NEXT: br label [[FOR_LATCH]] 69; CHECK: for.latch: 70; CHECK-NEXT: [[COND6:%.*]] = phi i16 [ [[REM]], [[COND_FALSE4]] ], [ 5786, [[COND_END]] ] 71; CHECK-NEXT: store i16 [[COND6]], i16* @v_39, align 1 72; CHECK-NEXT: [[INC7]] = add nsw i16 [[I_07]], 1 73; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[INC7]], 111 74; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[EXIT]], [[LOOP2:!llvm.loop !.*]] 75; CHECK: exit: 76; CHECK-NEXT: [[RV:%.*]] = load i16, i16* @v_39, align 1 77; CHECK-NEXT: ret i16 [[RV]] 78; 79entry: 80 br label %for.body 81 82for.body: ; preds = %entry, %for.latch 83 %i.07 = phi i16 [ 99, %entry ], [ %inc7, %for.latch ] 84 %lv = load i16, i16* @v_38, align 1 85 %cmp1 = icmp eq i16 %lv, 32767 86 br i1 %cmp1, label %cond.end, label %cond.end 87 88cond.end: ; preds = %for.body, %for.body 89 %cmp2 = icmp eq i16 %lv, 0 90 br i1 %cmp2, label %for.latch, label %cond.false4 91 92cond.false4: ; preds = %cond.end 93 %rem = srem i16 5786, %lv 94 br label %for.latch 95 96for.latch: ; preds = %cond.end, %cond.false4 97 %cond6 = phi i16 [ %rem, %cond.false4 ], [ 5786, %cond.end ] 98 store i16 %cond6, i16* @v_39, align 1 99 %inc7 = add nsw i16 %i.07, 1 100 %cmp = icmp slt i16 %inc7, 111 101 br i1 %cmp, label %for.body, label %exit 102 103exit: ; preds = %for.latch 104 %rv = load i16, i16* @v_39, align 1 105 ret i16 %rv 106} 107