1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -loop-vectorize -instcombine -force-vector-width=2 -force-vector-interleave=1 -enable-interleaved-mem-accesses < %s | FileCheck %s 3; RUN: opt -S -loop-vectorize -instcombine -force-vector-width=2 -force-vector-interleave=1 -enable-interleaved-mem-accesses -enable-masked-interleaved-mem-accesses < %s | FileCheck %s 4 5target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" 6%pair = type { i64, i64 } 7 8; Ensure that we vectorize the interleaved load group even though the loop 9; contains a conditional store. The store group contains gaps and is not 10; vectorized. 11; 12; 13; 14; 15; 16 17define void @interleaved_with_cond_store_0(%pair *%p, i64 %x, i64 %n) { 18; CHECK-LABEL: @interleaved_with_cond_store_0( 19; CHECK-NEXT: entry: 20; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1) 21; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 3 22; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 23; CHECK: vector.ph: 24; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 1 25; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 26; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 2, i64 [[N_MOD_VF]] 27; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]] 28; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0 29; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer 30; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 31; CHECK: vector.body: 32; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ] 33; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[PAIR:%.*]], %pair* [[P:%.*]], i64 [[INDEX]], i32 1 34; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to <4 x i64>* 35; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, <4 x i64>* [[TMP3]], align 8 36; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2> 37; CHECK-NEXT: [[TMP4:%.*]] = icmp eq <2 x i64> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] 38; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i64 0 39; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 40; CHECK: pred.store.if: 41; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 0 42; CHECK-NEXT: store i64 [[TMP6]], i64* [[TMP2]], align 8 43; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 44; CHECK: pred.store.continue: 45; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i1> [[TMP4]], i64 1 46; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]] 47; CHECK: pred.store.if1: 48; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[INDEX]], 1 49; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[TMP8]], i32 1 50; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 2 51; CHECK-NEXT: store i64 [[TMP10]], i64* [[TMP9]], align 8 52; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] 53; CHECK: pred.store.continue2: 54; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 55; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 56; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 57; CHECK: middle.block: 58; CHECK-NEXT: br label [[SCALAR_PH]] 59; CHECK: scalar.ph: 60; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 61; CHECK-NEXT: br label [[FOR_BODY:%.*]] 62; CHECK: for.body: 63; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[IF_MERGE:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 64; CHECK-NEXT: [[P_1:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[I]], i32 1 65; CHECK-NEXT: [[TMP12:%.*]] = load i64, i64* [[P_1]], align 8 66; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[TMP12]], [[X]] 67; CHECK-NEXT: br i1 [[TMP13]], label [[IF_THEN:%.*]], label [[IF_MERGE]] 68; CHECK: if.then: 69; CHECK-NEXT: store i64 [[TMP12]], i64* [[P_1]], align 8 70; CHECK-NEXT: br label [[IF_MERGE]] 71; CHECK: if.merge: 72; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 73; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 74; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END:%.*]], !llvm.loop [[LOOP2:![0-9]+]] 75; CHECK: for.end: 76; CHECK-NEXT: ret void 77; 78entry: 79 br label %for.body 80 81for.body: 82 %i = phi i64 [ %i.next, %if.merge ], [ 0, %entry ] 83 %p.1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1 84 %0 = load i64, i64* %p.1, align 8 85 %1 = icmp eq i64 %0, %x 86 br i1 %1, label %if.then, label %if.merge 87 88if.then: 89 store i64 %0, i64* %p.1, align 8 90 br label %if.merge 91 92if.merge: 93 %i.next = add nuw nsw i64 %i, 1 94 %cond = icmp slt i64 %i.next, %n 95 br i1 %cond, label %for.body, label %for.end 96 97for.end: 98 ret void 99} 100 101; Ensure that we don't form a single interleaved group for the two loads. The 102; conditional store prevents the second load from being hoisted. The two load 103; groups are separately vectorized. The store group contains gaps and is not 104; vectorized. 105; 106; 107; 108; 109; 110; 111 112define void @interleaved_with_cond_store_1(%pair *%p, i64 %x, i64 %n) { 113; CHECK-LABEL: @interleaved_with_cond_store_1( 114; CHECK-NEXT: entry: 115; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1) 116; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 3 117; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 118; CHECK: vector.ph: 119; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 1 120; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 121; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 2, i64 [[N_MOD_VF]] 122; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]] 123; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0 124; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer 125; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 126; CHECK: vector.body: 127; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ] 128; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[INDEX]], 1 129; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[PAIR:%.*]], %pair* [[P:%.*]], i64 [[INDEX]], i32 0 130; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[INDEX]], i32 1 131; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[TMP2]], i32 1 132; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64* [[TMP4]] to <4 x i64>* 133; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, <4 x i64>* [[TMP6]], align 8 134; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2> 135; CHECK-NEXT: [[TMP7:%.*]] = icmp eq <2 x i64> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] 136; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 137; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 138; CHECK: pred.store.if: 139; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 0 140; CHECK-NEXT: store i64 [[TMP9]], i64* [[TMP3]], align 8 141; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 142; CHECK: pred.store.continue: 143; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 144; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]] 145; CHECK: pred.store.if1: 146; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[TMP2]], i32 0 147; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 2 148; CHECK-NEXT: store i64 [[TMP12]], i64* [[TMP11]], align 8 149; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] 150; CHECK: pred.store.continue2: 151; CHECK-NEXT: [[TMP13:%.*]] = bitcast i64* [[TMP3]] to <4 x i64>* 152; CHECK-NEXT: [[WIDE_VEC3:%.*]] = load <4 x i64>, <4 x i64>* [[TMP13]], align 8 153; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i64> [[WIDE_VEC3]], i64 0 154; CHECK-NEXT: store i64 [[TMP14]], i64* [[TMP4]], align 8 155; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i64> [[WIDE_VEC3]], i64 2 156; CHECK-NEXT: store i64 [[TMP15]], i64* [[TMP5]], align 8 157; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 158; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 159; CHECK-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 160; CHECK: middle.block: 161; CHECK-NEXT: br label [[SCALAR_PH]] 162; CHECK: scalar.ph: 163; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 164; CHECK-NEXT: br label [[FOR_BODY:%.*]] 165; CHECK: for.body: 166; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[IF_MERGE:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 167; CHECK-NEXT: [[P_0:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[I]], i32 0 168; CHECK-NEXT: [[P_1:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[I]], i32 1 169; CHECK-NEXT: [[TMP17:%.*]] = load i64, i64* [[P_1]], align 8 170; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i64 [[TMP17]], [[X]] 171; CHECK-NEXT: br i1 [[TMP18]], label [[IF_THEN:%.*]], label [[IF_MERGE]] 172; CHECK: if.then: 173; CHECK-NEXT: store i64 [[TMP17]], i64* [[P_0]], align 8 174; CHECK-NEXT: br label [[IF_MERGE]] 175; CHECK: if.merge: 176; CHECK-NEXT: [[TMP19:%.*]] = load i64, i64* [[P_0]], align 8 177; CHECK-NEXT: store i64 [[TMP19]], i64* [[P_1]], align 8 178; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 179; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 180; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END:%.*]], !llvm.loop [[LOOP5:![0-9]+]] 181; CHECK: for.end: 182; CHECK-NEXT: ret void 183; 184entry: 185 br label %for.body 186 187for.body: 188 %i = phi i64 [ %i.next, %if.merge ], [ 0, %entry ] 189 %p.0 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0 190 %p.1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1 191 %0 = load i64, i64* %p.1, align 8 192 %1 = icmp eq i64 %0, %x 193 br i1 %1, label %if.then, label %if.merge 194 195if.then: 196 store i64 %0, i64* %p.0, align 8 197 br label %if.merge 198 199if.merge: 200 %2 = load i64, i64* %p.0, align 8 201 store i64 %2, i64 *%p.1, align 8 202 %i.next = add nuw nsw i64 %i, 1 203 %cond = icmp slt i64 %i.next, %n 204 br i1 %cond, label %for.body, label %for.end 205 206for.end: 207 ret void 208} 209 210; Ensure that we don't create a single interleaved group for the two stores. 211; The second store is conditional and we can't sink the first store inside the 212; predicated block. The load group is vectorized, and the store groups contain 213; gaps and are not vectorized. 214; 215; 216; 217; 218; 219 220define void @interleaved_with_cond_store_2(%pair *%p, i64 %x, i64 %n) { 221; CHECK-LABEL: @interleaved_with_cond_store_2( 222; CHECK-NEXT: entry: 223; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1) 224; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 3 225; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 226; CHECK: vector.ph: 227; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 1 228; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 229; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 2, i64 [[N_MOD_VF]] 230; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]] 231; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0 232; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer 233; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 234; CHECK: vector.body: 235; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ] 236; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[INDEX]], 1 237; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[PAIR:%.*]], %pair* [[P:%.*]], i64 [[INDEX]], i32 0 238; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[TMP2]], i32 0 239; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[INDEX]], i32 1 240; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64* [[TMP5]] to <4 x i64>* 241; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, <4 x i64>* [[TMP6]], align 8 242; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> <i32 0, i32 2> 243; CHECK-NEXT: store i64 [[X]], i64* [[TMP3]], align 8 244; CHECK-NEXT: store i64 [[X]], i64* [[TMP4]], align 8 245; CHECK-NEXT: [[TMP7:%.*]] = icmp eq <2 x i64> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] 246; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 247; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 248; CHECK: pred.store.if: 249; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 0 250; CHECK-NEXT: store i64 [[TMP9]], i64* [[TMP5]], align 8 251; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 252; CHECK: pred.store.continue: 253; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 254; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]] 255; CHECK: pred.store.if1: 256; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[TMP2]], i32 1 257; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 2 258; CHECK-NEXT: store i64 [[TMP12]], i64* [[TMP11]], align 8 259; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] 260; CHECK: pred.store.continue2: 261; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 262; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 263; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 264; CHECK: middle.block: 265; CHECK-NEXT: br label [[SCALAR_PH]] 266; CHECK: scalar.ph: 267; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 268; CHECK-NEXT: br label [[FOR_BODY:%.*]] 269; CHECK: for.body: 270; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[IF_MERGE:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 271; CHECK-NEXT: [[P_0:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[I]], i32 0 272; CHECK-NEXT: [[P_1:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[I]], i32 1 273; CHECK-NEXT: [[TMP14:%.*]] = load i64, i64* [[P_1]], align 8 274; CHECK-NEXT: store i64 [[X]], i64* [[P_0]], align 8 275; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[TMP14]], [[X]] 276; CHECK-NEXT: br i1 [[TMP15]], label [[IF_THEN:%.*]], label [[IF_MERGE]] 277; CHECK: if.then: 278; CHECK-NEXT: store i64 [[TMP14]], i64* [[P_1]], align 8 279; CHECK-NEXT: br label [[IF_MERGE]] 280; CHECK: if.merge: 281; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 282; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 283; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END:%.*]], !llvm.loop [[LOOP7:![0-9]+]] 284; CHECK: for.end: 285; CHECK-NEXT: ret void 286; 287entry: 288 br label %for.body 289 290for.body: 291 %i = phi i64 [ %i.next, %if.merge ], [ 0, %entry ] 292 %p.0 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0 293 %p.1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1 294 %0 = load i64, i64* %p.1, align 8 295 store i64 %x, i64* %p.0, align 8 296 %1 = icmp eq i64 %0, %x 297 br i1 %1, label %if.then, label %if.merge 298 299if.then: 300 store i64 %0, i64* %p.1, align 8 301 br label %if.merge 302 303if.merge: 304 %i.next = add nuw nsw i64 %i, 1 305 %cond = icmp slt i64 %i.next, %n 306 br i1 %cond, label %for.body, label %for.end 307 308for.end: 309 ret void 310} 311