1; RUN: opt -S -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -verify-loop-info -simplifycfg < %s | FileCheck %s 2 3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 4 5; Test predication of non-void instructions, specifically (i) that these 6; instructions permit vectorization and (ii) the creation of an insertelement 7; and a Phi node. We check the full 2-element sequence for the first 8; instruction; For the rest we'll just make sure they get predicated based 9; on the code generated for the first element. 10define void @test(i32* nocapture %asd, i32* nocapture %aud, 11 i32* nocapture %asr, i32* nocapture %aur) { 12entry: 13 br label %for.body 14 15for.cond.cleanup: ; preds = %if.end 16 ret void 17 18; CHECK-LABEL: test 19; CHECK: vector.body: 20; CHECK: %[[SDEE:[a-zA-Z0-9]+]] = extractelement <2 x i1> %{{.*}}, i32 0 21; CHECK: %[[SDCC:[a-zA-Z0-9]+]] = icmp eq i1 %[[SDEE]], true 22; CHECK: br i1 %[[SDCC]], label %[[CSD:[a-zA-Z0-9.]+]], label %[[ESD:[a-zA-Z0-9.]+]] 23; CHECK: [[CSD]]: 24; CHECK: %[[SDA0:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 0 25; CHECK: %[[SDA1:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 0 26; CHECK: %[[SD0:[a-zA-Z0-9]+]] = sdiv i32 %[[SDA0]], %[[SDA1]] 27; CHECK: %[[SD1:[a-zA-Z0-9]+]] = insertelement <2 x i32> undef, i32 %[[SD0]], i32 0 28; CHECK: br label %[[ESD]] 29; CHECK: [[ESD]]: 30; CHECK: %[[SDR:[a-zA-Z0-9]+]] = phi <2 x i32> [ undef, %vector.body ], [ %[[SD1]], %[[CSD]] ] 31; CHECK: %[[SDEEH:[a-zA-Z0-9]+]] = extractelement <2 x i1> %{{.*}}, i32 1 32; CHECK: %[[SDCCH:[a-zA-Z0-9]+]] = icmp eq i1 %[[SDEEH]], true 33; CHECK: br i1 %[[SDCCH]], label %[[CSDH:[a-zA-Z0-9.]+]], label %[[ESDH:[a-zA-Z0-9.]+]] 34; CHECK: [[CSDH]]: 35; CHECK: %[[SDA0H:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 1 36; CHECK: %[[SDA1H:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 1 37; CHECK: %[[SD0H:[a-zA-Z0-9]+]] = sdiv i32 %[[SDA0H]], %[[SDA1H]] 38; CHECK: %[[SD1H:[a-zA-Z0-9]+]] = insertelement <2 x i32> %[[SDR]], i32 %[[SD0H]], i32 1 39; CHECK: br label %[[ESDH]] 40; CHECK: [[ESDH]]: 41; CHECK: %{{.*}} = phi <2 x i32> [ %[[SDR]], %[[ESD]] ], [ %[[SD1H]], %[[CSDH]] ] 42 43; CHECK: %[[UDEE:[a-zA-Z0-9]+]] = extractelement <2 x i1> %{{.*}}, i32 0 44; CHECK: %[[UDCC:[a-zA-Z0-9]+]] = icmp eq i1 %[[UDEE]], true 45; CHECK: br i1 %[[UDCC]], label %[[CUD:[a-zA-Z0-9.]+]], label %[[EUD:[a-zA-Z0-9.]+]] 46; CHECK: [[CUD]]: 47; CHECK: %[[UDA0:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 0 48; CHECK: %[[UDA1:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 0 49; CHECK: %[[UD0:[a-zA-Z0-9]+]] = udiv i32 %[[UDA0]], %[[UDA1]] 50; CHECK: %[[UD1:[a-zA-Z0-9]+]] = insertelement <2 x i32> undef, i32 %[[UD0]], i32 0 51; CHECK: br label %[[EUD]] 52; CHECK: [[EUD]]: 53; CHECK: %{{.*}} = phi <2 x i32> [ undef, %{{.*}} ], [ %[[UD1]], %[[CUD]] ] 54 55; CHECK: %[[SREE:[a-zA-Z0-9]+]] = extractelement <2 x i1> %{{.*}}, i32 0 56; CHECK: %[[SRCC:[a-zA-Z0-9]+]] = icmp eq i1 %[[SREE]], true 57; CHECK: br i1 %[[SRCC]], label %[[CSR:[a-zA-Z0-9.]+]], label %[[ESR:[a-zA-Z0-9.]+]] 58; CHECK: [[CSR]]: 59; CHECK: %[[SRA0:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 0 60; CHECK: %[[SRA1:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 0 61; CHECK: %[[SR0:[a-zA-Z0-9]+]] = srem i32 %[[SRA0]], %[[SRA1]] 62; CHECK: %[[SR1:[a-zA-Z0-9]+]] = insertelement <2 x i32> undef, i32 %[[SR0]], i32 0 63; CHECK: br label %[[ESR]] 64; CHECK: [[ESR]]: 65; CHECK: %{{.*}} = phi <2 x i32> [ undef, %{{.*}} ], [ %[[SR1]], %[[CSR]] ] 66 67; CHECK: %[[UREE:[a-zA-Z0-9]+]] = extractelement <2 x i1> %{{.*}}, i32 0 68; CHECK: %[[URCC:[a-zA-Z0-9]+]] = icmp eq i1 %[[UREE]], true 69; CHECK: br i1 %[[URCC]], label %[[CUR:[a-zA-Z0-9.]+]], label %[[EUR:[a-zA-Z0-9.]+]] 70; CHECK: [[CUR]]: 71; CHECK: %[[URA0:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 0 72; CHECK: %[[URA1:[a-zA-Z0-9]+]] = extractelement <2 x i32> %{{.*}}, i32 0 73; CHECK: %[[UR0:[a-zA-Z0-9]+]] = urem i32 %[[URA0]], %[[URA1]] 74; CHECK: %[[UR1:[a-zA-Z0-9]+]] = insertelement <2 x i32> undef, i32 %[[UR0]], i32 0 75; CHECK: br label %[[EUR]] 76; CHECK: [[EUR]]: 77; CHECK: %{{.*}} = phi <2 x i32> [ undef, %{{.*}} ], [ %[[UR1]], %[[CUR]] ] 78 79for.body: ; preds = %if.end, %entry 80 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end ] 81 %isd = getelementptr inbounds i32, i32* %asd, i64 %indvars.iv 82 %iud = getelementptr inbounds i32, i32* %aud, i64 %indvars.iv 83 %isr = getelementptr inbounds i32, i32* %asr, i64 %indvars.iv 84 %iur = getelementptr inbounds i32, i32* %aur, i64 %indvars.iv 85 %lsd = load i32, i32* %isd, align 4 86 %lud = load i32, i32* %iud, align 4 87 %lsr = load i32, i32* %isr, align 4 88 %lur = load i32, i32* %iur, align 4 89 %psd = add nsw i32 %lsd, 23 90 %pud = add nsw i32 %lud, 24 91 %psr = add nsw i32 %lsr, 25 92 %pur = add nsw i32 %lur, 26 93 %cmp1 = icmp slt i32 %lsd, 100 94 br i1 %cmp1, label %if.then, label %if.end 95 96if.then: ; preds = %for.body 97 %rsd = sdiv i32 %psd, %lsd 98 %rud = udiv i32 %pud, %lud 99 %rsr = srem i32 %psr, %lsr 100 %rur = urem i32 %pur, %lur 101 br label %if.end 102 103if.end: ; preds = %if.then, %for.body 104 %ysd.0 = phi i32 [ %rsd, %if.then ], [ %psd, %for.body ] 105 %yud.0 = phi i32 [ %rud, %if.then ], [ %pud, %for.body ] 106 %ysr.0 = phi i32 [ %rsr, %if.then ], [ %psr, %for.body ] 107 %yur.0 = phi i32 [ %rur, %if.then ], [ %pur, %for.body ] 108 store i32 %ysd.0, i32* %isd, align 4 109 store i32 %yud.0, i32* %iud, align 4 110 store i32 %ysr.0, i32* %isr, align 4 111 store i32 %yur.0, i32* %iur, align 4 112 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 113 %exitcond = icmp eq i64 %indvars.iv.next, 128 114 br i1 %exitcond, label %for.cond.cleanup, label %for.body 115} 116 117define void @test_scalar2scalar(i32* nocapture %asd, i32* nocapture %bsd) { 118entry: 119 br label %for.body 120 121for.cond.cleanup: ; preds = %if.end 122 ret void 123 124; CHECK-LABEL: test_scalar2scalar 125; CHECK: vector.body: 126; CHECK: br i1 %{{.*}}, label %[[THEN:[a-zA-Z0-9.]+]], label %[[FI:[a-zA-Z0-9.]+]] 127; CHECK: [[THEN]]: 128; CHECK: %[[PD:[a-zA-Z0-9]+]] = sdiv i32 %{{.*}}, %{{.*}} 129; CHECK: br label %[[FI]] 130; CHECK: [[FI]]: 131; CHECK: %{{.*}} = phi i32 [ undef, %vector.body ], [ %[[PD]], %[[THEN]] ] 132 133for.body: ; preds = %if.end, %entry 134 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end ] 135 %isd = getelementptr inbounds i32, i32* %asd, i64 %indvars.iv 136 %lsd = load i32, i32* %isd, align 4 137 %isd.b = getelementptr inbounds i32, i32* %bsd, i64 %indvars.iv 138 %lsd.b = load i32, i32* %isd.b, align 4 139 %psd = add nsw i32 %lsd, 23 140 %cmp1 = icmp slt i32 %lsd, 100 141 br i1 %cmp1, label %if.then, label %if.end 142 143if.then: ; preds = %for.body 144 %sd1 = sdiv i32 %psd, %lsd 145 %rsd = sdiv i32 %lsd.b, %sd1 146 br label %if.end 147 148if.end: ; preds = %if.then, %for.body 149 %ysd.0 = phi i32 [ %rsd, %if.then ], [ %psd, %for.body ] 150 store i32 %ysd.0, i32* %isd, align 4 151 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 152 %exitcond = icmp eq i64 %indvars.iv.next, 128 153 br i1 %exitcond, label %for.cond.cleanup, label %for.body 154} 155 156define void @pr30172(i32* nocapture %asd, i32* nocapture %bsd) { 157entry: 158 br label %for.body 159 160for.cond.cleanup: ; preds = %if.end 161 ret void 162 163; CHECK-LABEL: pr30172 164; CHECK: vector.body: 165; CHECK: %[[CMP1:.+]] = icmp slt <2 x i32> %[[VAL:.+]], <i32 100, i32 100> 166; CHECK: %[[CMP2:.+]] = icmp sge <2 x i32> %[[VAL]], <i32 200, i32 200> 167; CHECK: %[[XOR:.+]] = xor <2 x i1> %[[CMP1]], <i1 true, i1 true> 168; CHECK: %[[AND1:.+]] = and <2 x i1> %[[XOR]], <i1 true, i1 true> 169; CHECK: %[[OR1:.+]] = or <2 x i1> zeroinitializer, %[[AND1]] 170; CHECK: %[[AND2:.+]] = and <2 x i1> %[[CMP2]], %[[OR1]] 171; CHECK: %[[OR2:.+]] = or <2 x i1> zeroinitializer, %[[AND2]] 172; CHECK: %[[AND3:.+]] = and <2 x i1> %[[CMP1]], <i1 true, i1 true> 173; CHECK: %[[OR3:.+]] = or <2 x i1> %[[OR2]], %[[AND3]] 174; CHECK: %[[EXTRACT:.+]] = extractelement <2 x i1> %[[OR3]], i32 0 175; CHECK: %[[MASK:.+]] = icmp eq i1 %[[EXTRACT]], true 176; CHECK: br i1 %[[MASK]], label %[[THEN:[a-zA-Z0-9.]+]], label %[[FI:[a-zA-Z0-9.]+]] 177; CHECK: [[THEN]]: 178; CHECK: %[[PD:[a-zA-Z0-9]+]] = sdiv i32 %{{.*}}, %{{.*}} 179; CHECK: br label %[[FI]] 180; CHECK: [[FI]]: 181; CHECK: %{{.*}} = phi i32 [ undef, %vector.body ], [ %[[PD]], %[[THEN]] ] 182 183 184for.body: ; preds = %if.end, %entry 185 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end ] 186 %isd = getelementptr inbounds i32, i32* %asd, i64 %indvars.iv 187 %lsd = load i32, i32* %isd, align 4 188 %isd.b = getelementptr inbounds i32, i32* %bsd, i64 %indvars.iv 189 %lsd.b = load i32, i32* %isd.b, align 4 190 %psd = add nsw i32 %lsd, 23 191 %cmp1 = icmp slt i32 %lsd, 100 192 br i1 %cmp1, label %if.then, label %check 193 194check: ; preds = %for.body 195 %cmp2 = icmp sge i32 %lsd, 200 196 br i1 %cmp2, label %if.then, label %if.end 197 198if.then: ; preds = %check, %for.body 199 %sd1 = sdiv i32 %psd, %lsd 200 %rsd = sdiv i32 %lsd.b, %sd1 201 br label %if.end 202 203if.end: ; preds = %if.then, %check 204 %ysd.0 = phi i32 [ %rsd, %if.then ], [ %psd, %check ] 205 store i32 %ysd.0, i32* %isd, align 4 206 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 207 %exitcond = icmp eq i64 %indvars.iv.next, 128 208 br i1 %exitcond, label %for.cond.cleanup, label %for.body 209} 210 211 212define i32 @predicated_udiv_scalarized_operand(i32* %a, i1 %c, i32 %x, i64 %n) { 213entry: 214 br label %for.body 215 216; CHECK-LABEL: predicated_udiv_scalarized_operand 217; CHECK: vector.body: 218; CHECK: %wide.load = load <2 x i32>, <2 x i32>* {{.*}}, align 4 219; CHECK: br i1 {{.*}}, label %[[IF0:.+]], label %[[CONT0:.+]] 220; CHECK: [[IF0]]: 221; CHECK: %[[T00:.+]] = extractelement <2 x i32> %wide.load, i32 0 222; CHECK: %[[T01:.+]] = extractelement <2 x i32> %wide.load, i32 0 223; CHECK: %[[T02:.+]] = add nsw i32 %[[T01]], %x 224; CHECK: %[[T03:.+]] = udiv i32 %[[T00]], %[[T02]] 225; CHECK: %[[T04:.+]] = insertelement <2 x i32> undef, i32 %[[T03]], i32 0 226; CHECK: br label %[[CONT0]] 227; CHECK: [[CONT0]]: 228; CHECK: %[[T05:.+]] = phi <2 x i32> [ undef, %vector.body ], [ %[[T04]], %[[IF0]] ] 229; CHECK: br i1 {{.*}}, label %[[IF1:.+]], label %[[CONT1:.+]] 230; CHECK: [[IF1]]: 231; CHECK: %[[T06:.+]] = extractelement <2 x i32> %wide.load, i32 1 232; CHECK: %[[T07:.+]] = extractelement <2 x i32> %wide.load, i32 1 233; CHECK: %[[T08:.+]] = add nsw i32 %[[T07]], %x 234; CHECK: %[[T09:.+]] = udiv i32 %[[T06]], %[[T08]] 235; CHECK: %[[T10:.+]] = insertelement <2 x i32> %[[T05]], i32 %[[T09]], i32 1 236; CHECK: br label %[[CONT1]] 237; CHECK: [[CONT1]]: 238; CHECK: phi <2 x i32> [ %[[T05]], %[[CONT0]] ], [ %[[T10]], %[[IF1]] ] 239; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body 240 241for.body: 242 %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ] 243 %r = phi i32 [ 0, %entry ], [ %tmp6, %for.inc ] 244 %tmp0 = getelementptr inbounds i32, i32* %a, i64 %i 245 %tmp2 = load i32, i32* %tmp0, align 4 246 br i1 %c, label %if.then, label %for.inc 247 248if.then: 249 %tmp3 = add nsw i32 %tmp2, %x 250 %tmp4 = udiv i32 %tmp2, %tmp3 251 br label %for.inc 252 253for.inc: 254 %tmp5 = phi i32 [ %tmp2, %for.body ], [ %tmp4, %if.then] 255 %tmp6 = add i32 %r, %tmp5 256 %i.next = add nuw nsw i64 %i, 1 257 %cond = icmp slt i64 %i.next, %n 258 br i1 %cond, label %for.body, label %for.end 259 260for.end: 261 %tmp7 = phi i32 [ %tmp6, %for.inc ] 262 ret i32 %tmp7 263} 264