1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -verify-loop-info -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s 3; RUN: opt -S -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL-NO-VF 4 5target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 6 7; Test predication of non-void instructions, specifically (i) that these 8; instructions permit vectorization and (ii) the creation of an insertelement 9; and a Phi node. We check the full 2-element sequence for all predicate instructions. 10define void @test(i32* nocapture %asd, i32* nocapture %aud, 11; CHECK-LABEL: @test( 12; CHECK-NEXT: entry: 13; CHECK-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8* 14; CHECK-NEXT: [[AUD3:%.*]] = bitcast i32* [[AUD:%.*]] to i8* 15; CHECK-NEXT: [[ASR6:%.*]] = bitcast i32* [[ASR:%.*]] to i8* 16; CHECK-NEXT: [[AUR9:%.*]] = bitcast i32* [[AUR:%.*]] to i8* 17; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128 18; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8* 19; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[AUD]], i64 128 20; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8* 21; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr i32, i32* [[ASR]], i64 128 22; CHECK-NEXT: [[SCEVGEP78:%.*]] = bitcast i32* [[SCEVGEP7]] to i8* 23; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr i32, i32* [[AUR]], i64 128 24; CHECK-NEXT: [[SCEVGEP1011:%.*]] = bitcast i32* [[SCEVGEP10]] to i8* 25; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]] 26; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP2]] 27; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 28; CHECK-NEXT: [[BOUND012:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP78]] 29; CHECK-NEXT: [[BOUND113:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP2]] 30; CHECK-NEXT: [[FOUND_CONFLICT14:%.*]] = and i1 [[BOUND012]], [[BOUND113]] 31; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT14]] 32; CHECK-NEXT: [[BOUND015:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP1011]] 33; CHECK-NEXT: [[BOUND116:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP2]] 34; CHECK-NEXT: [[FOUND_CONFLICT17:%.*]] = and i1 [[BOUND015]], [[BOUND116]] 35; CHECK-NEXT: [[CONFLICT_RDX18:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT17]] 36; CHECK-NEXT: [[BOUND019:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP78]] 37; CHECK-NEXT: [[BOUND120:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP45]] 38; CHECK-NEXT: [[FOUND_CONFLICT21:%.*]] = and i1 [[BOUND019]], [[BOUND120]] 39; CHECK-NEXT: [[CONFLICT_RDX22:%.*]] = or i1 [[CONFLICT_RDX18]], [[FOUND_CONFLICT21]] 40; CHECK-NEXT: [[BOUND023:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP1011]] 41; CHECK-NEXT: [[BOUND124:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP45]] 42; CHECK-NEXT: [[FOUND_CONFLICT25:%.*]] = and i1 [[BOUND023]], [[BOUND124]] 43; CHECK-NEXT: [[CONFLICT_RDX26:%.*]] = or i1 [[CONFLICT_RDX22]], [[FOUND_CONFLICT25]] 44; CHECK-NEXT: [[BOUND027:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP1011]] 45; CHECK-NEXT: [[BOUND128:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP78]] 46; CHECK-NEXT: [[FOUND_CONFLICT29:%.*]] = and i1 [[BOUND027]], [[BOUND128]] 47; CHECK-NEXT: [[CONFLICT_RDX30:%.*]] = or i1 [[CONFLICT_RDX26]], [[FOUND_CONFLICT29]] 48; CHECK-NEXT: br i1 [[CONFLICT_RDX30]], label [[SCALAR_PH:%.*]], label [[VECTOR_BODY:%.*]] 49; CHECK: vector.body: 50; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[PRED_UREM_CONTINUE35:%.*]] ], [ 0, [[ENTRY:%.*]] ] 51; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 52; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[TMP0]] 53; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[AUD]], i64 [[TMP0]] 54; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[ASR]], i64 [[TMP0]] 55; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[AUR]], i64 [[TMP0]] 56; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 57; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[TMP5]] to <2 x i32>* 58; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP6]], align 4, !alias.scope !5, !noalias !8 59; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 0 60; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP7]] to <2 x i32>* 61; CHECK-NEXT: [[WIDE_LOAD31:%.*]] = load <2 x i32>, <2 x i32>* [[TMP8]], align 4, !alias.scope !12, !noalias !13 62; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 0 63; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32* [[TMP9]] to <2 x i32>* 64; CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <2 x i32>, <2 x i32>* [[TMP10]], align 4, !alias.scope !14, !noalias !15 65; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 0 66; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32* [[TMP11]] to <2 x i32>* 67; CHECK-NEXT: [[WIDE_LOAD33:%.*]] = load <2 x i32>, <2 x i32>* [[TMP12]], align 4, !alias.scope !15 68; CHECK-NEXT: [[TMP13:%.*]] = add nsw <2 x i32> [[WIDE_LOAD]], <i32 23, i32 23> 69; CHECK-NEXT: [[TMP14:%.*]] = add nsw <2 x i32> [[WIDE_LOAD31]], <i32 24, i32 24> 70; CHECK-NEXT: [[TMP15:%.*]] = add nsw <2 x i32> [[WIDE_LOAD32]], <i32 25, i32 25> 71; CHECK-NEXT: [[TMP16:%.*]] = add nsw <2 x i32> [[WIDE_LOAD33]], <i32 26, i32 26> 72; CHECK-NEXT: [[TMP17:%.*]] = icmp slt <2 x i32> [[WIDE_LOAD]], <i32 100, i32 100> 73; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x i1> [[TMP17]], i32 0 74; CHECK-NEXT: br i1 [[TMP18]], label [[PRED_UREM_IF:%.*]], label [[PRED_UREM_CONTINUE:%.*]] 75; CHECK: pred.urem.if: 76; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x i32> [[TMP13]], i32 0 77; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0 78; CHECK-NEXT: [[TMP21:%.*]] = sdiv i32 [[TMP19]], [[TMP20]] 79; CHECK-NEXT: [[TMP22:%.*]] = insertelement <2 x i32> poison, i32 [[TMP21]], i32 0 80; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x i32> [[TMP14]], i32 0 81; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x i32> [[WIDE_LOAD31]], i32 0 82; CHECK-NEXT: [[TMP25:%.*]] = udiv i32 [[TMP23]], [[TMP24]] 83; CHECK-NEXT: [[TMP26:%.*]] = insertelement <2 x i32> poison, i32 [[TMP25]], i32 0 84; CHECK-NEXT: [[TMP27:%.*]] = extractelement <2 x i32> [[TMP15]], i32 0 85; CHECK-NEXT: [[TMP28:%.*]] = extractelement <2 x i32> [[WIDE_LOAD32]], i32 0 86; CHECK-NEXT: [[TMP29:%.*]] = srem i32 [[TMP27]], [[TMP28]] 87; CHECK-NEXT: [[TMP30:%.*]] = insertelement <2 x i32> poison, i32 [[TMP29]], i32 0 88; CHECK-NEXT: [[TMP31:%.*]] = extractelement <2 x i32> [[TMP16]], i32 0 89; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x i32> [[WIDE_LOAD33]], i32 0 90; CHECK-NEXT: [[TMP33:%.*]] = urem i32 [[TMP31]], [[TMP32]] 91; CHECK-NEXT: [[TMP34:%.*]] = insertelement <2 x i32> poison, i32 [[TMP33]], i32 0 92; CHECK-NEXT: br label [[PRED_UREM_CONTINUE]] 93; CHECK: pred.urem.continue: 94; CHECK-NEXT: [[TMP35:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP22]], [[PRED_UREM_IF]] ] 95; CHECK-NEXT: [[TMP36:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP26]], [[PRED_UREM_IF]] ] 96; CHECK-NEXT: [[TMP37:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP30]], [[PRED_UREM_IF]] ] 97; CHECK-NEXT: [[TMP38:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP34]], [[PRED_UREM_IF]] ] 98; CHECK-NEXT: [[TMP39:%.*]] = extractelement <2 x i1> [[TMP17]], i32 1 99; CHECK-NEXT: br i1 [[TMP39]], label [[PRED_UREM_IF34:%.*]], label [[PRED_UREM_CONTINUE35]] 100; CHECK: pred.urem.if34: 101; CHECK-NEXT: [[TMP40:%.*]] = extractelement <2 x i32> [[TMP13]], i32 1 102; CHECK-NEXT: [[TMP41:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1 103; CHECK-NEXT: [[TMP42:%.*]] = sdiv i32 [[TMP40]], [[TMP41]] 104; CHECK-NEXT: [[TMP43:%.*]] = insertelement <2 x i32> [[TMP35]], i32 [[TMP42]], i32 1 105; CHECK-NEXT: [[TMP44:%.*]] = extractelement <2 x i32> [[TMP14]], i32 1 106; CHECK-NEXT: [[TMP45:%.*]] = extractelement <2 x i32> [[WIDE_LOAD31]], i32 1 107; CHECK-NEXT: [[TMP46:%.*]] = udiv i32 [[TMP44]], [[TMP45]] 108; CHECK-NEXT: [[TMP47:%.*]] = insertelement <2 x i32> [[TMP36]], i32 [[TMP46]], i32 1 109; CHECK-NEXT: [[TMP48:%.*]] = extractelement <2 x i32> [[TMP15]], i32 1 110; CHECK-NEXT: [[TMP49:%.*]] = extractelement <2 x i32> [[WIDE_LOAD32]], i32 1 111; CHECK-NEXT: [[TMP50:%.*]] = srem i32 [[TMP48]], [[TMP49]] 112; CHECK-NEXT: [[TMP51:%.*]] = insertelement <2 x i32> [[TMP37]], i32 [[TMP50]], i32 1 113; CHECK-NEXT: [[TMP52:%.*]] = extractelement <2 x i32> [[TMP16]], i32 1 114; CHECK-NEXT: [[TMP53:%.*]] = extractelement <2 x i32> [[WIDE_LOAD33]], i32 1 115; CHECK-NEXT: [[TMP54:%.*]] = urem i32 [[TMP52]], [[TMP53]] 116; CHECK-NEXT: [[TMP55:%.*]] = insertelement <2 x i32> [[TMP38]], i32 [[TMP54]], i32 1 117; CHECK-NEXT: br label [[PRED_UREM_CONTINUE35]] 118; CHECK: pred.urem.continue35: 119; CHECK-NEXT: [[TMP56:%.*]] = phi <2 x i32> [ [[TMP35]], [[PRED_UREM_CONTINUE]] ], [ [[TMP43]], [[PRED_UREM_IF34]] ] 120; CHECK-NEXT: [[TMP57:%.*]] = phi <2 x i32> [ [[TMP36]], [[PRED_UREM_CONTINUE]] ], [ [[TMP47]], [[PRED_UREM_IF34]] ] 121; CHECK-NEXT: [[TMP58:%.*]] = phi <2 x i32> [ [[TMP37]], [[PRED_UREM_CONTINUE]] ], [ [[TMP51]], [[PRED_UREM_IF34]] ] 122; CHECK-NEXT: [[TMP59:%.*]] = phi <2 x i32> [ [[TMP38]], [[PRED_UREM_CONTINUE]] ], [ [[TMP55]], [[PRED_UREM_IF34]] ] 123; CHECK-NEXT: [[TMP60:%.*]] = xor <2 x i1> [[TMP17]], <i1 true, i1 true> 124; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP60]], <2 x i32> [[TMP13]], <2 x i32> [[TMP56]] 125; CHECK-NEXT: [[PREDPHI36:%.*]] = select <2 x i1> [[TMP60]], <2 x i32> [[TMP14]], <2 x i32> [[TMP57]] 126; CHECK-NEXT: [[PREDPHI37:%.*]] = select <2 x i1> [[TMP60]], <2 x i32> [[TMP15]], <2 x i32> [[TMP58]] 127; CHECK-NEXT: [[PREDPHI38:%.*]] = select <2 x i1> [[TMP60]], <2 x i32> [[TMP16]], <2 x i32> [[TMP59]] 128; CHECK-NEXT: [[TMP61:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 129; CHECK-NEXT: [[TMP62:%.*]] = bitcast i32* [[TMP61]] to <2 x i32>* 130; CHECK-NEXT: store <2 x i32> [[PREDPHI]], <2 x i32>* [[TMP62]], align 4, !alias.scope !5, !noalias !8 131; CHECK-NEXT: [[TMP63:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 0 132; CHECK-NEXT: [[TMP64:%.*]] = bitcast i32* [[TMP63]] to <2 x i32>* 133; CHECK-NEXT: store <2 x i32> [[PREDPHI36]], <2 x i32>* [[TMP64]], align 4, !alias.scope !12, !noalias !13 134; CHECK-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 0 135; CHECK-NEXT: [[TMP66:%.*]] = bitcast i32* [[TMP65]] to <2 x i32>* 136; CHECK-NEXT: store <2 x i32> [[PREDPHI37]], <2 x i32>* [[TMP66]], align 4, !alias.scope !14, !noalias !15 137; CHECK-NEXT: [[TMP67:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 0 138; CHECK-NEXT: [[TMP68:%.*]] = bitcast i32* [[TMP67]] to <2 x i32>* 139; CHECK-NEXT: store <2 x i32> [[PREDPHI38]], <2 x i32>* [[TMP68]], align 4, !alias.scope !15 140; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 141; CHECK-NEXT: [[TMP69:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 142; CHECK-NEXT: br i1 [[TMP69]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]] 143; CHECK: middle.block: 144; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128 145; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 146; CHECK: scalar.ph: 147; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 148; CHECK-NEXT: br label [[FOR_BODY:%.*]] 149; CHECK: for.cond.cleanup: 150; CHECK-NEXT: ret void 151; CHECK: for.body: 152; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[IF_END:%.*]] ] 153; CHECK-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]] 154; CHECK-NEXT: [[IUD:%.*]] = getelementptr inbounds i32, i32* [[AUD]], i64 [[INDVARS_IV]] 155; CHECK-NEXT: [[ISR:%.*]] = getelementptr inbounds i32, i32* [[ASR]], i64 [[INDVARS_IV]] 156; CHECK-NEXT: [[IUR:%.*]] = getelementptr inbounds i32, i32* [[AUR]], i64 [[INDVARS_IV]] 157; CHECK-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4 158; CHECK-NEXT: [[LUD:%.*]] = load i32, i32* [[IUD]], align 4 159; CHECK-NEXT: [[LSR:%.*]] = load i32, i32* [[ISR]], align 4 160; CHECK-NEXT: [[LUR:%.*]] = load i32, i32* [[IUR]], align 4 161; CHECK-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23 162; CHECK-NEXT: [[PUD:%.*]] = add nsw i32 [[LUD]], 24 163; CHECK-NEXT: [[PSR:%.*]] = add nsw i32 [[LSR]], 25 164; CHECK-NEXT: [[PUR:%.*]] = add nsw i32 [[LUR]], 26 165; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100 166; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_END]] 167; CHECK: if.then: 168; CHECK-NEXT: [[RSD:%.*]] = sdiv i32 [[PSD]], [[LSD]] 169; CHECK-NEXT: [[RUD:%.*]] = udiv i32 [[PUD]], [[LUD]] 170; CHECK-NEXT: [[RSR:%.*]] = srem i32 [[PSR]], [[LSR]] 171; CHECK-NEXT: [[RUR:%.*]] = urem i32 [[PUR]], [[LUR]] 172; CHECK-NEXT: br label [[IF_END]] 173; CHECK: if.end: 174; CHECK-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[FOR_BODY]] ] 175; CHECK-NEXT: [[YUD_0:%.*]] = phi i32 [ [[RUD]], [[IF_THEN]] ], [ [[PUD]], [[FOR_BODY]] ] 176; CHECK-NEXT: [[YSR_0:%.*]] = phi i32 [ [[RSR]], [[IF_THEN]] ], [ [[PSR]], [[FOR_BODY]] ] 177; CHECK-NEXT: [[YUR_0:%.*]] = phi i32 [ [[RUR]], [[IF_THEN]] ], [ [[PUR]], [[FOR_BODY]] ] 178; CHECK-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4 179; CHECK-NEXT: store i32 [[YUD_0]], i32* [[IUD]], align 4 180; CHECK-NEXT: store i32 [[YSR_0]], i32* [[ISR]], align 4 181; CHECK-NEXT: store i32 [[YUR_0]], i32* [[IUR]], align 4 182; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 183; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128 184; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]] 185; 186; UNROLL-NO-VF-LABEL: @test( 187; UNROLL-NO-VF-NEXT: entry: 188; UNROLL-NO-VF-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8* 189; UNROLL-NO-VF-NEXT: [[AUD3:%.*]] = bitcast i32* [[AUD:%.*]] to i8* 190; UNROLL-NO-VF-NEXT: [[ASR6:%.*]] = bitcast i32* [[ASR:%.*]] to i8* 191; UNROLL-NO-VF-NEXT: [[AUR9:%.*]] = bitcast i32* [[AUR:%.*]] to i8* 192; UNROLL-NO-VF-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 193; UNROLL-NO-VF: vector.memcheck: 194; UNROLL-NO-VF-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128 195; UNROLL-NO-VF-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8* 196; UNROLL-NO-VF-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[AUD]], i64 128 197; UNROLL-NO-VF-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8* 198; UNROLL-NO-VF-NEXT: [[SCEVGEP7:%.*]] = getelementptr i32, i32* [[ASR]], i64 128 199; UNROLL-NO-VF-NEXT: [[SCEVGEP78:%.*]] = bitcast i32* [[SCEVGEP7]] to i8* 200; UNROLL-NO-VF-NEXT: [[SCEVGEP10:%.*]] = getelementptr i32, i32* [[AUR]], i64 128 201; UNROLL-NO-VF-NEXT: [[SCEVGEP1011:%.*]] = bitcast i32* [[SCEVGEP10]] to i8* 202; UNROLL-NO-VF-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]] 203; UNROLL-NO-VF-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP2]] 204; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 205; UNROLL-NO-VF-NEXT: [[BOUND012:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP78]] 206; UNROLL-NO-VF-NEXT: [[BOUND113:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP2]] 207; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT14:%.*]] = and i1 [[BOUND012]], [[BOUND113]] 208; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT14]] 209; UNROLL-NO-VF-NEXT: [[BOUND015:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP1011]] 210; UNROLL-NO-VF-NEXT: [[BOUND116:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP2]] 211; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT17:%.*]] = and i1 [[BOUND015]], [[BOUND116]] 212; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX18:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT17]] 213; UNROLL-NO-VF-NEXT: [[BOUND019:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP78]] 214; UNROLL-NO-VF-NEXT: [[BOUND120:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP45]] 215; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT21:%.*]] = and i1 [[BOUND019]], [[BOUND120]] 216; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX22:%.*]] = or i1 [[CONFLICT_RDX18]], [[FOUND_CONFLICT21]] 217; UNROLL-NO-VF-NEXT: [[BOUND023:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP1011]] 218; UNROLL-NO-VF-NEXT: [[BOUND124:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP45]] 219; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT25:%.*]] = and i1 [[BOUND023]], [[BOUND124]] 220; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX26:%.*]] = or i1 [[CONFLICT_RDX22]], [[FOUND_CONFLICT25]] 221; UNROLL-NO-VF-NEXT: [[BOUND027:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP1011]] 222; UNROLL-NO-VF-NEXT: [[BOUND128:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP78]] 223; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT29:%.*]] = and i1 [[BOUND027]], [[BOUND128]] 224; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX30:%.*]] = or i1 [[CONFLICT_RDX26]], [[FOUND_CONFLICT29]] 225; UNROLL-NO-VF-NEXT: br i1 [[CONFLICT_RDX30]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 226; UNROLL-NO-VF: vector.ph: 227; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]] 228; UNROLL-NO-VF: vector.body: 229; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UREM_CONTINUE33:%.*]] ] 230; UNROLL-NO-VF-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0 231; UNROLL-NO-VF-NEXT: [[INDUCTION31:%.*]] = add i64 [[INDEX]], 1 232; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION]] 233; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION31]] 234; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[AUD]], i64 [[INDUCTION]] 235; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[AUD]], i64 [[INDUCTION31]] 236; UNROLL-NO-VF-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[ASR]], i64 [[INDUCTION]] 237; UNROLL-NO-VF-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ASR]], i64 [[INDUCTION31]] 238; UNROLL-NO-VF-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[AUR]], i64 [[INDUCTION]] 239; UNROLL-NO-VF-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[AUR]], i64 [[INDUCTION31]] 240; UNROLL-NO-VF-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP0]], align 4, !alias.scope !5, !noalias !8 241; UNROLL-NO-VF-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !5, !noalias !8 242; UNROLL-NO-VF-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP2]], align 4, !alias.scope !12, !noalias !13 243; UNROLL-NO-VF-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP3]], align 4, !alias.scope !12, !noalias !13 244; UNROLL-NO-VF-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP4]], align 4, !alias.scope !14, !noalias !15 245; UNROLL-NO-VF-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP5]], align 4, !alias.scope !14, !noalias !15 246; UNROLL-NO-VF-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP6]], align 4, !alias.scope !15 247; UNROLL-NO-VF-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP7]], align 4, !alias.scope !15 248; UNROLL-NO-VF-NEXT: [[TMP16:%.*]] = add nsw i32 [[TMP8]], 23 249; UNROLL-NO-VF-NEXT: [[TMP17:%.*]] = add nsw i32 [[TMP9]], 23 250; UNROLL-NO-VF-NEXT: [[TMP18:%.*]] = add nsw i32 [[TMP10]], 24 251; UNROLL-NO-VF-NEXT: [[TMP19:%.*]] = add nsw i32 [[TMP11]], 24 252; UNROLL-NO-VF-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP12]], 25 253; UNROLL-NO-VF-NEXT: [[TMP21:%.*]] = add nsw i32 [[TMP13]], 25 254; UNROLL-NO-VF-NEXT: [[TMP22:%.*]] = add nsw i32 [[TMP14]], 26 255; UNROLL-NO-VF-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP15]], 26 256; UNROLL-NO-VF-NEXT: [[TMP24:%.*]] = icmp slt i32 [[TMP8]], 100 257; UNROLL-NO-VF-NEXT: [[TMP25:%.*]] = icmp slt i32 [[TMP9]], 100 258; UNROLL-NO-VF-NEXT: br i1 [[TMP24]], label [[PRED_UREM_IF:%.*]], label [[PRED_UREM_CONTINUE:%.*]] 259; UNROLL-NO-VF: pred.urem.if: 260; UNROLL-NO-VF-NEXT: [[TMP26:%.*]] = sdiv i32 [[TMP16]], [[TMP8]] 261; UNROLL-NO-VF-NEXT: [[TMP27:%.*]] = udiv i32 [[TMP18]], [[TMP10]] 262; UNROLL-NO-VF-NEXT: [[TMP28:%.*]] = srem i32 [[TMP20]], [[TMP12]] 263; UNROLL-NO-VF-NEXT: [[TMP29:%.*]] = urem i32 [[TMP22]], [[TMP14]] 264; UNROLL-NO-VF-NEXT: br label [[PRED_UREM_CONTINUE]] 265; UNROLL-NO-VF: pred.urem.continue: 266; UNROLL-NO-VF-NEXT: [[TMP30:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP26]], [[PRED_UREM_IF]] ] 267; UNROLL-NO-VF-NEXT: [[TMP31:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP27]], [[PRED_UREM_IF]] ] 268; UNROLL-NO-VF-NEXT: [[TMP32:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP28]], [[PRED_UREM_IF]] ] 269; UNROLL-NO-VF-NEXT: [[TMP33:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP29]], [[PRED_UREM_IF]] ] 270; UNROLL-NO-VF-NEXT: br i1 [[TMP25]], label [[PRED_UREM_IF32:%.*]], label [[PRED_UREM_CONTINUE33]] 271; UNROLL-NO-VF: pred.urem.if32: 272; UNROLL-NO-VF-NEXT: [[TMP34:%.*]] = sdiv i32 [[TMP17]], [[TMP9]] 273; UNROLL-NO-VF-NEXT: [[TMP35:%.*]] = udiv i32 [[TMP19]], [[TMP11]] 274; UNROLL-NO-VF-NEXT: [[TMP36:%.*]] = srem i32 [[TMP21]], [[TMP13]] 275; UNROLL-NO-VF-NEXT: [[TMP37:%.*]] = urem i32 [[TMP23]], [[TMP15]] 276; UNROLL-NO-VF-NEXT: br label [[PRED_UREM_CONTINUE33]] 277; UNROLL-NO-VF: pred.urem.continue33: 278; UNROLL-NO-VF-NEXT: [[TMP38:%.*]] = phi i32 [ poison, [[PRED_UREM_CONTINUE]] ], [ [[TMP34]], [[PRED_UREM_IF32]] ] 279; UNROLL-NO-VF-NEXT: [[TMP39:%.*]] = phi i32 [ poison, [[PRED_UREM_CONTINUE]] ], [ [[TMP35]], [[PRED_UREM_IF32]] ] 280; UNROLL-NO-VF-NEXT: [[TMP40:%.*]] = phi i32 [ poison, [[PRED_UREM_CONTINUE]] ], [ [[TMP36]], [[PRED_UREM_IF32]] ] 281; UNROLL-NO-VF-NEXT: [[TMP41:%.*]] = phi i32 [ poison, [[PRED_UREM_CONTINUE]] ], [ [[TMP37]], [[PRED_UREM_IF32]] ] 282; UNROLL-NO-VF-NEXT: [[TMP42:%.*]] = xor i1 [[TMP24]], true 283; UNROLL-NO-VF-NEXT: [[TMP43:%.*]] = xor i1 [[TMP25]], true 284; UNROLL-NO-VF-NEXT: [[PREDPHI:%.*]] = select i1 [[TMP42]], i32 [[TMP16]], i32 [[TMP30]] 285; UNROLL-NO-VF-NEXT: [[PREDPHI34:%.*]] = select i1 [[TMP43]], i32 [[TMP17]], i32 [[TMP38]] 286; UNROLL-NO-VF-NEXT: [[PREDPHI35:%.*]] = select i1 [[TMP42]], i32 [[TMP18]], i32 [[TMP31]] 287; UNROLL-NO-VF-NEXT: [[PREDPHI36:%.*]] = select i1 [[TMP43]], i32 [[TMP19]], i32 [[TMP39]] 288; UNROLL-NO-VF-NEXT: [[PREDPHI37:%.*]] = select i1 [[TMP42]], i32 [[TMP20]], i32 [[TMP32]] 289; UNROLL-NO-VF-NEXT: [[PREDPHI38:%.*]] = select i1 [[TMP43]], i32 [[TMP21]], i32 [[TMP40]] 290; UNROLL-NO-VF-NEXT: [[PREDPHI39:%.*]] = select i1 [[TMP42]], i32 [[TMP22]], i32 [[TMP33]] 291; UNROLL-NO-VF-NEXT: [[PREDPHI40:%.*]] = select i1 [[TMP43]], i32 [[TMP23]], i32 [[TMP41]] 292; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI]], i32* [[TMP0]], align 4, !alias.scope !5, !noalias !8 293; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI34]], i32* [[TMP1]], align 4, !alias.scope !5, !noalias !8 294; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI35]], i32* [[TMP2]], align 4, !alias.scope !12, !noalias !13 295; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI36]], i32* [[TMP3]], align 4, !alias.scope !12, !noalias !13 296; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI37]], i32* [[TMP4]], align 4, !alias.scope !14, !noalias !15 297; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI38]], i32* [[TMP5]], align 4, !alias.scope !14, !noalias !15 298; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI39]], i32* [[TMP6]], align 4, !alias.scope !15 299; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI40]], i32* [[TMP7]], align 4, !alias.scope !15 300; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 301; UNROLL-NO-VF-NEXT: [[TMP44:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 302; UNROLL-NO-VF-NEXT: br i1 [[TMP44]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]] 303; UNROLL-NO-VF: middle.block: 304; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128 305; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 306; UNROLL-NO-VF: scalar.ph: 307; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ] 308; UNROLL-NO-VF-NEXT: br label [[FOR_BODY:%.*]] 309; UNROLL-NO-VF: for.cond.cleanup: 310; UNROLL-NO-VF-NEXT: ret void 311; UNROLL-NO-VF: for.body: 312; UNROLL-NO-VF-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[IF_END:%.*]] ] 313; UNROLL-NO-VF-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]] 314; UNROLL-NO-VF-NEXT: [[IUD:%.*]] = getelementptr inbounds i32, i32* [[AUD]], i64 [[INDVARS_IV]] 315; UNROLL-NO-VF-NEXT: [[ISR:%.*]] = getelementptr inbounds i32, i32* [[ASR]], i64 [[INDVARS_IV]] 316; UNROLL-NO-VF-NEXT: [[IUR:%.*]] = getelementptr inbounds i32, i32* [[AUR]], i64 [[INDVARS_IV]] 317; UNROLL-NO-VF-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4 318; UNROLL-NO-VF-NEXT: [[LUD:%.*]] = load i32, i32* [[IUD]], align 4 319; UNROLL-NO-VF-NEXT: [[LSR:%.*]] = load i32, i32* [[ISR]], align 4 320; UNROLL-NO-VF-NEXT: [[LUR:%.*]] = load i32, i32* [[IUR]], align 4 321; UNROLL-NO-VF-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23 322; UNROLL-NO-VF-NEXT: [[PUD:%.*]] = add nsw i32 [[LUD]], 24 323; UNROLL-NO-VF-NEXT: [[PSR:%.*]] = add nsw i32 [[LSR]], 25 324; UNROLL-NO-VF-NEXT: [[PUR:%.*]] = add nsw i32 [[LUR]], 26 325; UNROLL-NO-VF-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100 326; UNROLL-NO-VF-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_END]] 327; UNROLL-NO-VF: if.then: 328; UNROLL-NO-VF-NEXT: [[RSD:%.*]] = sdiv i32 [[PSD]], [[LSD]] 329; UNROLL-NO-VF-NEXT: [[RUD:%.*]] = udiv i32 [[PUD]], [[LUD]] 330; UNROLL-NO-VF-NEXT: [[RSR:%.*]] = srem i32 [[PSR]], [[LSR]] 331; UNROLL-NO-VF-NEXT: [[RUR:%.*]] = urem i32 [[PUR]], [[LUR]] 332; UNROLL-NO-VF-NEXT: br label [[IF_END]] 333; UNROLL-NO-VF: if.end: 334; UNROLL-NO-VF-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[FOR_BODY]] ] 335; UNROLL-NO-VF-NEXT: [[YUD_0:%.*]] = phi i32 [ [[RUD]], [[IF_THEN]] ], [ [[PUD]], [[FOR_BODY]] ] 336; UNROLL-NO-VF-NEXT: [[YSR_0:%.*]] = phi i32 [ [[RSR]], [[IF_THEN]] ], [ [[PSR]], [[FOR_BODY]] ] 337; UNROLL-NO-VF-NEXT: [[YUR_0:%.*]] = phi i32 [ [[RUR]], [[IF_THEN]] ], [ [[PUR]], [[FOR_BODY]] ] 338; UNROLL-NO-VF-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4 339; UNROLL-NO-VF-NEXT: store i32 [[YUD_0]], i32* [[IUD]], align 4 340; UNROLL-NO-VF-NEXT: store i32 [[YSR_0]], i32* [[ISR]], align 4 341; UNROLL-NO-VF-NEXT: store i32 [[YUR_0]], i32* [[IUR]], align 4 342; UNROLL-NO-VF-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 343; UNROLL-NO-VF-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128 344; UNROLL-NO-VF-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]] 345; 346 i32* nocapture %asr, i32* nocapture %aur) { 347entry: 348 br label %for.body 349 350for.cond.cleanup: ; preds = %if.end 351 ret void 352 353for.body: ; preds = %if.end, %entry 354 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end ] 355 %isd = getelementptr inbounds i32, i32* %asd, i64 %indvars.iv 356 %iud = getelementptr inbounds i32, i32* %aud, i64 %indvars.iv 357 %isr = getelementptr inbounds i32, i32* %asr, i64 %indvars.iv 358 %iur = getelementptr inbounds i32, i32* %aur, i64 %indvars.iv 359 %lsd = load i32, i32* %isd, align 4 360 %lud = load i32, i32* %iud, align 4 361 %lsr = load i32, i32* %isr, align 4 362 %lur = load i32, i32* %iur, align 4 363 %psd = add nsw i32 %lsd, 23 364 %pud = add nsw i32 %lud, 24 365 %psr = add nsw i32 %lsr, 25 366 %pur = add nsw i32 %lur, 26 367 %cmp1 = icmp slt i32 %lsd, 100 368 br i1 %cmp1, label %if.then, label %if.end 369 370if.then: ; preds = %for.body 371 %rsd = sdiv i32 %psd, %lsd 372 %rud = udiv i32 %pud, %lud 373 %rsr = srem i32 %psr, %lsr 374 %rur = urem i32 %pur, %lur 375 br label %if.end 376 377if.end: ; preds = %if.then, %for.body 378 %ysd.0 = phi i32 [ %rsd, %if.then ], [ %psd, %for.body ] 379 %yud.0 = phi i32 [ %rud, %if.then ], [ %pud, %for.body ] 380 %ysr.0 = phi i32 [ %rsr, %if.then ], [ %psr, %for.body ] 381 %yur.0 = phi i32 [ %rur, %if.then ], [ %pur, %for.body ] 382 store i32 %ysd.0, i32* %isd, align 4 383 store i32 %yud.0, i32* %iud, align 4 384 store i32 %ysr.0, i32* %isr, align 4 385 store i32 %yur.0, i32* %iur, align 4 386 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 387 %exitcond = icmp eq i64 %indvars.iv.next, 128 388 br i1 %exitcond, label %for.cond.cleanup, label %for.body 389} 390 391define void @test_scalar2scalar(i32* nocapture %asd, i32* nocapture %bsd) { 392; CHECK-LABEL: @test_scalar2scalar( 393; CHECK-NEXT: entry: 394; CHECK-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8* 395; CHECK-NEXT: [[BSD3:%.*]] = bitcast i32* [[BSD:%.*]] to i8* 396; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128 397; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8* 398; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[BSD]], i64 128 399; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8* 400; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]] 401; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[BSD3]], [[SCEVGEP2]] 402; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 403; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH:%.*]], label [[VECTOR_BODY:%.*]] 404; CHECK: vector.body: 405; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[PRED_SDIV_CONTINUE8:%.*]] ], [ 0, [[ENTRY:%.*]] ] 406; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 407; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[TMP0]] 408; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 409; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <2 x i32>* 410; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP3]], align 4, !alias.scope !19, !noalias !22 411; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[TMP0]] 412; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 0 413; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[TMP5]] to <2 x i32>* 414; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <2 x i32>, <2 x i32>* [[TMP6]], align 4, !alias.scope !22 415; CHECK-NEXT: [[TMP7:%.*]] = add nsw <2 x i32> [[WIDE_LOAD]], <i32 23, i32 23> 416; CHECK-NEXT: [[TMP8:%.*]] = icmp slt <2 x i32> [[WIDE_LOAD]], <i32 100, i32 100> 417; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP8]], i32 0 418; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_SDIV_IF:%.*]], label [[PRED_SDIV_CONTINUE:%.*]] 419; CHECK: pred.sdiv.if: 420; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP7]], i32 0 421; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0 422; CHECK-NEXT: [[TMP12:%.*]] = sdiv i32 [[TMP10]], [[TMP11]] 423; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i32> [[WIDE_LOAD6]], i32 0 424; CHECK-NEXT: [[TMP14:%.*]] = sdiv i32 [[TMP13]], [[TMP12]] 425; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x i32> poison, i32 [[TMP14]], i32 0 426; CHECK-NEXT: br label [[PRED_SDIV_CONTINUE]] 427; CHECK: pred.sdiv.continue: 428; CHECK-NEXT: [[TMP16:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP12]], [[PRED_SDIV_IF]] ] 429; CHECK-NEXT: [[TMP17:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP15]], [[PRED_SDIV_IF]] ] 430; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x i1> [[TMP8]], i32 1 431; CHECK-NEXT: br i1 [[TMP18]], label [[PRED_SDIV_IF7:%.*]], label [[PRED_SDIV_CONTINUE8]] 432; CHECK: pred.sdiv.if7: 433; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x i32> [[TMP7]], i32 1 434; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1 435; CHECK-NEXT: [[TMP21:%.*]] = sdiv i32 [[TMP19]], [[TMP20]] 436; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i32> [[WIDE_LOAD6]], i32 1 437; CHECK-NEXT: [[TMP23:%.*]] = sdiv i32 [[TMP22]], [[TMP21]] 438; CHECK-NEXT: [[TMP24:%.*]] = insertelement <2 x i32> [[TMP17]], i32 [[TMP23]], i32 1 439; CHECK-NEXT: br label [[PRED_SDIV_CONTINUE8]] 440; CHECK: pred.sdiv.continue8: 441; CHECK-NEXT: [[TMP25:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP21]], [[PRED_SDIV_IF7]] ] 442; CHECK-NEXT: [[TMP26:%.*]] = phi <2 x i32> [ [[TMP17]], [[PRED_SDIV_CONTINUE]] ], [ [[TMP24]], [[PRED_SDIV_IF7]] ] 443; CHECK-NEXT: [[TMP27:%.*]] = xor <2 x i1> [[TMP8]], <i1 true, i1 true> 444; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP27]], <2 x i32> [[TMP7]], <2 x i32> [[TMP26]] 445; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 446; CHECK-NEXT: [[TMP29:%.*]] = bitcast i32* [[TMP28]] to <2 x i32>* 447; CHECK-NEXT: store <2 x i32> [[PREDPHI]], <2 x i32>* [[TMP29]], align 4, !alias.scope !19, !noalias !22 448; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 449; CHECK-NEXT: [[TMP30:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 450; CHECK-NEXT: br i1 [[TMP30]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]] 451; CHECK: middle.block: 452; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128 453; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 454; CHECK: scalar.ph: 455; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 456; CHECK-NEXT: br label [[FOR_BODY:%.*]] 457; CHECK: for.cond.cleanup: 458; CHECK-NEXT: ret void 459; CHECK: for.body: 460; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[IF_END:%.*]] ] 461; CHECK-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]] 462; CHECK-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4 463; CHECK-NEXT: [[ISD_B:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDVARS_IV]] 464; CHECK-NEXT: [[LSD_B:%.*]] = load i32, i32* [[ISD_B]], align 4 465; CHECK-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23 466; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100 467; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_END]] 468; CHECK: if.then: 469; CHECK-NEXT: [[SD1:%.*]] = sdiv i32 [[PSD]], [[LSD]] 470; CHECK-NEXT: [[RSD:%.*]] = sdiv i32 [[LSD_B]], [[SD1]] 471; CHECK-NEXT: br label [[IF_END]] 472; CHECK: if.end: 473; CHECK-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[FOR_BODY]] ] 474; CHECK-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4 475; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 476; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128 477; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]] 478; 479; UNROLL-NO-VF-LABEL: @test_scalar2scalar( 480; UNROLL-NO-VF-NEXT: entry: 481; UNROLL-NO-VF-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8* 482; UNROLL-NO-VF-NEXT: [[BSD3:%.*]] = bitcast i32* [[BSD:%.*]] to i8* 483; UNROLL-NO-VF-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 484; UNROLL-NO-VF: vector.memcheck: 485; UNROLL-NO-VF-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128 486; UNROLL-NO-VF-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8* 487; UNROLL-NO-VF-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[BSD]], i64 128 488; UNROLL-NO-VF-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8* 489; UNROLL-NO-VF-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]] 490; UNROLL-NO-VF-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[BSD3]], [[SCEVGEP2]] 491; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 492; UNROLL-NO-VF-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 493; UNROLL-NO-VF: vector.ph: 494; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]] 495; UNROLL-NO-VF: vector.body: 496; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_SDIV_CONTINUE8:%.*]] ] 497; UNROLL-NO-VF-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0 498; UNROLL-NO-VF-NEXT: [[INDUCTION6:%.*]] = add i64 [[INDEX]], 1 499; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION]] 500; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION6]] 501; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4, !alias.scope !19, !noalias !22 502; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !19, !noalias !22 503; UNROLL-NO-VF-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP2]], 23 504; UNROLL-NO-VF-NEXT: [[TMP5:%.*]] = add nsw i32 [[TMP3]], 23 505; UNROLL-NO-VF-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP2]], 100 506; UNROLL-NO-VF-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP3]], 100 507; UNROLL-NO-VF-NEXT: br i1 [[TMP6]], label [[PRED_SDIV_IF:%.*]], label [[PRED_SDIV_CONTINUE:%.*]] 508; UNROLL-NO-VF: pred.sdiv.if: 509; UNROLL-NO-VF-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDUCTION]] 510; UNROLL-NO-VF-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4, !alias.scope !22 511; UNROLL-NO-VF-NEXT: [[TMP10:%.*]] = sdiv i32 [[TMP4]], [[TMP2]] 512; UNROLL-NO-VF-NEXT: [[TMP11:%.*]] = sdiv i32 [[TMP9]], [[TMP10]] 513; UNROLL-NO-VF-NEXT: br label [[PRED_SDIV_CONTINUE]] 514; UNROLL-NO-VF: pred.sdiv.continue: 515; UNROLL-NO-VF-NEXT: [[TMP12:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP10]], [[PRED_SDIV_IF]] ] 516; UNROLL-NO-VF-NEXT: [[TMP13:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP11]], [[PRED_SDIV_IF]] ] 517; UNROLL-NO-VF-NEXT: br i1 [[TMP7]], label [[PRED_SDIV_IF7:%.*]], label [[PRED_SDIV_CONTINUE8]] 518; UNROLL-NO-VF: pred.sdiv.if7: 519; UNROLL-NO-VF-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDUCTION6]] 520; UNROLL-NO-VF-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4, !alias.scope !22 521; UNROLL-NO-VF-NEXT: [[TMP16:%.*]] = sdiv i32 [[TMP5]], [[TMP3]] 522; UNROLL-NO-VF-NEXT: [[TMP17:%.*]] = sdiv i32 [[TMP15]], [[TMP16]] 523; UNROLL-NO-VF-NEXT: br label [[PRED_SDIV_CONTINUE8]] 524; UNROLL-NO-VF: pred.sdiv.continue8: 525; UNROLL-NO-VF-NEXT: [[TMP18:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP16]], [[PRED_SDIV_IF7]] ] 526; UNROLL-NO-VF-NEXT: [[TMP19:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP17]], [[PRED_SDIV_IF7]] ] 527; UNROLL-NO-VF-NEXT: [[TMP20:%.*]] = xor i1 [[TMP6]], true 528; UNROLL-NO-VF-NEXT: [[TMP21:%.*]] = xor i1 [[TMP7]], true 529; UNROLL-NO-VF-NEXT: [[PREDPHI:%.*]] = select i1 [[TMP20]], i32 [[TMP4]], i32 [[TMP13]] 530; UNROLL-NO-VF-NEXT: [[PREDPHI9:%.*]] = select i1 [[TMP21]], i32 [[TMP5]], i32 [[TMP19]] 531; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI]], i32* [[TMP0]], align 4, !alias.scope !19, !noalias !22 532; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI9]], i32* [[TMP1]], align 4, !alias.scope !19, !noalias !22 533; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 534; UNROLL-NO-VF-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 535; UNROLL-NO-VF-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]] 536; UNROLL-NO-VF: middle.block: 537; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128 538; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 539; UNROLL-NO-VF: scalar.ph: 540; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ] 541; UNROLL-NO-VF-NEXT: br label [[FOR_BODY:%.*]] 542; UNROLL-NO-VF: for.cond.cleanup: 543; UNROLL-NO-VF-NEXT: ret void 544; UNROLL-NO-VF: for.body: 545; UNROLL-NO-VF-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[IF_END:%.*]] ] 546; UNROLL-NO-VF-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]] 547; UNROLL-NO-VF-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4 548; UNROLL-NO-VF-NEXT: [[ISD_B:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDVARS_IV]] 549; UNROLL-NO-VF-NEXT: [[LSD_B:%.*]] = load i32, i32* [[ISD_B]], align 4 550; UNROLL-NO-VF-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23 551; UNROLL-NO-VF-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100 552; UNROLL-NO-VF-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_END]] 553; UNROLL-NO-VF: if.then: 554; UNROLL-NO-VF-NEXT: [[SD1:%.*]] = sdiv i32 [[PSD]], [[LSD]] 555; UNROLL-NO-VF-NEXT: [[RSD:%.*]] = sdiv i32 [[LSD_B]], [[SD1]] 556; UNROLL-NO-VF-NEXT: br label [[IF_END]] 557; UNROLL-NO-VF: if.end: 558; UNROLL-NO-VF-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[FOR_BODY]] ] 559; UNROLL-NO-VF-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4 560; UNROLL-NO-VF-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 561; UNROLL-NO-VF-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128 562; UNROLL-NO-VF-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]] 563; 564entry: 565 br label %for.body 566 567for.cond.cleanup: ; preds = %if.end 568 ret void 569 570 571for.body: ; preds = %if.end, %entry 572 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end ] 573 %isd = getelementptr inbounds i32, i32* %asd, i64 %indvars.iv 574 %lsd = load i32, i32* %isd, align 4 575 %isd.b = getelementptr inbounds i32, i32* %bsd, i64 %indvars.iv 576 %lsd.b = load i32, i32* %isd.b, align 4 577 %psd = add nsw i32 %lsd, 23 578 %cmp1 = icmp slt i32 %lsd, 100 579 br i1 %cmp1, label %if.then, label %if.end 580 581if.then: ; preds = %for.body 582 %sd1 = sdiv i32 %psd, %lsd 583 %rsd = sdiv i32 %lsd.b, %sd1 584 br label %if.end 585 586if.end: ; preds = %if.then, %for.body 587 %ysd.0 = phi i32 [ %rsd, %if.then ], [ %psd, %for.body ] 588 store i32 %ysd.0, i32* %isd, align 4 589 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 590 %exitcond = icmp eq i64 %indvars.iv.next, 128 591 br i1 %exitcond, label %for.cond.cleanup, label %for.body 592} 593 594define void @pr30172(i32* nocapture %asd, i32* nocapture %bsd) !dbg !5 {; 595; CHECK-LABEL: @pr30172( 596; CHECK-NEXT: entry: 597; CHECK-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8* 598; CHECK-NEXT: [[BSD3:%.*]] = bitcast i32* [[BSD:%.*]] to i8* 599; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128 600; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8* 601; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[BSD]], i64 128 602; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8* 603; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]] 604; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[BSD3]], [[SCEVGEP2]] 605; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 606; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH:%.*]], label [[VECTOR_BODY:%.*]] 607; CHECK: vector.body: 608; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[PRED_SDIV_CONTINUE8:%.*]] ], [ 0, [[ENTRY:%.*]] ] 609; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 610; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[TMP0]] 611; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 612; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <2 x i32>* 613; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP3]], align 4, !alias.scope !28, !noalias !31 614; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[TMP0]] 615; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 0 616; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[TMP5]] to <2 x i32>* 617; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <2 x i32>, <2 x i32>* [[TMP6]], align 4, !alias.scope !31 618; CHECK-NEXT: [[TMP7:%.*]] = add nsw <2 x i32> [[WIDE_LOAD]], <i32 23, i32 23> 619; CHECK-NEXT: [[TMP8:%.*]] = icmp slt <2 x i32> [[WIDE_LOAD]], <i32 100, i32 100> 620; CHECK-NEXT: [[TMP9:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], <i32 200, i32 200> 621; CHECK-NEXT: [[TMP10:%.*]] = xor <2 x i1> [[TMP8]], <i1 true, i1 true>, !dbg [[DBG33:![0-9]+]] 622; CHECK-NEXT: [[TMP11:%.*]] = select <2 x i1> [[TMP10]], <2 x i1> [[TMP9]], <2 x i1> zeroinitializer, !dbg [[DBG34:![0-9]+]] 623; CHECK-NEXT: [[TMP12:%.*]] = or <2 x i1> [[TMP11]], [[TMP8]] 624; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP12]], i32 0 625; CHECK-NEXT: br i1 [[TMP13]], label [[PRED_SDIV_IF:%.*]], label [[PRED_SDIV_CONTINUE:%.*]] 626; CHECK: pred.sdiv.if: 627; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x i32> [[TMP7]], i32 0 628; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0 629; CHECK-NEXT: [[TMP16:%.*]] = sdiv i32 [[TMP14]], [[TMP15]] 630; CHECK-NEXT: [[TMP17:%.*]] = extractelement <2 x i32> [[WIDE_LOAD6]], i32 0 631; CHECK-NEXT: [[TMP18:%.*]] = sdiv i32 [[TMP17]], [[TMP16]] 632; CHECK-NEXT: [[TMP19:%.*]] = insertelement <2 x i32> poison, i32 [[TMP18]], i32 0 633; CHECK-NEXT: br label [[PRED_SDIV_CONTINUE]] 634; CHECK: pred.sdiv.continue: 635; CHECK-NEXT: [[TMP20:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP16]], [[PRED_SDIV_IF]] ] 636; CHECK-NEXT: [[TMP21:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP19]], [[PRED_SDIV_IF]] ] 637; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i1> [[TMP12]], i32 1 638; CHECK-NEXT: br i1 [[TMP22]], label [[PRED_SDIV_IF7:%.*]], label [[PRED_SDIV_CONTINUE8]] 639; CHECK: pred.sdiv.if7: 640; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x i32> [[TMP7]], i32 1 641; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1 642; CHECK-NEXT: [[TMP25:%.*]] = sdiv i32 [[TMP23]], [[TMP24]] 643; CHECK-NEXT: [[TMP26:%.*]] = extractelement <2 x i32> [[WIDE_LOAD6]], i32 1 644; CHECK-NEXT: [[TMP27:%.*]] = sdiv i32 [[TMP26]], [[TMP25]] 645; CHECK-NEXT: [[TMP28:%.*]] = insertelement <2 x i32> [[TMP21]], i32 [[TMP27]], i32 1 646; CHECK-NEXT: br label [[PRED_SDIV_CONTINUE8]] 647; CHECK: pred.sdiv.continue8: 648; CHECK-NEXT: [[TMP29:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP25]], [[PRED_SDIV_IF7]] ] 649; CHECK-NEXT: [[TMP30:%.*]] = phi <2 x i32> [ [[TMP21]], [[PRED_SDIV_CONTINUE]] ], [ [[TMP28]], [[PRED_SDIV_IF7]] ] 650; CHECK-NEXT: [[TMP31:%.*]] = xor <2 x i1> [[TMP9]], <i1 true, i1 true>, !dbg [[DBG34]] 651; CHECK-NEXT: [[TMP32:%.*]] = select <2 x i1> [[TMP10]], <2 x i1> [[TMP31]], <2 x i1> zeroinitializer, !dbg [[DBG34]] 652; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP32]], <2 x i32> [[TMP7]], <2 x i32> [[TMP30]] 653; CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 654; CHECK-NEXT: [[TMP34:%.*]] = bitcast i32* [[TMP33]] to <2 x i32>* 655; CHECK-NEXT: store <2 x i32> [[PREDPHI]], <2 x i32>* [[TMP34]], align 4, !alias.scope !28, !noalias !31 656; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 657; CHECK-NEXT: [[TMP35:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 658; CHECK-NEXT: br i1 [[TMP35]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]] 659; CHECK: middle.block: 660; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128 661; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 662; CHECK: scalar.ph: 663; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 664; CHECK-NEXT: br label [[FOR_BODY:%.*]] 665; CHECK: for.cond.cleanup: 666; CHECK-NEXT: ret void 667; CHECK: for.body: 668; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[IF_END:%.*]] ] 669; CHECK-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]] 670; CHECK-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4 671; CHECK-NEXT: [[ISD_B:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDVARS_IV]] 672; CHECK-NEXT: [[LSD_B:%.*]] = load i32, i32* [[ISD_B]], align 4 673; CHECK-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23 674; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100 675; CHECK-NEXT: [[CMP2:%.*]] = icmp sge i32 [[LSD]], 200 676; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP1]], [[CMP2]], !dbg [[DBG33]] 677; CHECK-NEXT: br i1 [[OR_COND]], label [[IF_THEN:%.*]], label [[IF_END]], !dbg [[DBG33]] 678; CHECK: if.then: 679; CHECK-NEXT: [[SD1:%.*]] = sdiv i32 [[PSD]], [[LSD]] 680; CHECK-NEXT: [[RSD:%.*]] = sdiv i32 [[LSD_B]], [[SD1]] 681; CHECK-NEXT: br label [[IF_END]] 682; CHECK: if.end: 683; CHECK-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[FOR_BODY]] ] 684; CHECK-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4 685; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 686; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128 687; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]] 688; 689; UNROLL-NO-VF-LABEL: @pr30172( 690; UNROLL-NO-VF-NEXT: entry: 691; UNROLL-NO-VF-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8* 692; UNROLL-NO-VF-NEXT: [[BSD3:%.*]] = bitcast i32* [[BSD:%.*]] to i8* 693; UNROLL-NO-VF-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 694; UNROLL-NO-VF: vector.memcheck: 695; UNROLL-NO-VF-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128 696; UNROLL-NO-VF-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8* 697; UNROLL-NO-VF-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[BSD]], i64 128 698; UNROLL-NO-VF-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8* 699; UNROLL-NO-VF-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]] 700; UNROLL-NO-VF-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[BSD3]], [[SCEVGEP2]] 701; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 702; UNROLL-NO-VF-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 703; UNROLL-NO-VF: vector.ph: 704; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]] 705; UNROLL-NO-VF: vector.body: 706; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_SDIV_CONTINUE8:%.*]] ] 707; UNROLL-NO-VF-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0 708; UNROLL-NO-VF-NEXT: [[INDUCTION6:%.*]] = add i64 [[INDEX]], 1 709; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION]] 710; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION6]] 711; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4, !alias.scope !28, !noalias !31 712; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !28, !noalias !31 713; UNROLL-NO-VF-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP2]], 23 714; UNROLL-NO-VF-NEXT: [[TMP5:%.*]] = add nsw i32 [[TMP3]], 23 715; UNROLL-NO-VF-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP2]], 100 716; UNROLL-NO-VF-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP3]], 100 717; UNROLL-NO-VF-NEXT: [[TMP8:%.*]] = icmp sge i32 [[TMP2]], 200 718; UNROLL-NO-VF-NEXT: [[TMP9:%.*]] = icmp sge i32 [[TMP3]], 200 719; UNROLL-NO-VF-NEXT: [[TMP10:%.*]] = xor i1 [[TMP6]], true, !dbg [[DBG33:![0-9]+]] 720; UNROLL-NO-VF-NEXT: [[TMP11:%.*]] = xor i1 [[TMP7]], true, !dbg [[DBG33]] 721; UNROLL-NO-VF-NEXT: [[TMP12:%.*]] = select i1 [[TMP10]], i1 [[TMP8]], i1 false, !dbg [[DBG34:![0-9]+]] 722; UNROLL-NO-VF-NEXT: [[TMP13:%.*]] = select i1 [[TMP11]], i1 [[TMP9]], i1 false, !dbg [[DBG34]] 723; UNROLL-NO-VF-NEXT: [[TMP14:%.*]] = or i1 [[TMP12]], [[TMP6]] 724; UNROLL-NO-VF-NEXT: [[TMP15:%.*]] = or i1 [[TMP13]], [[TMP7]] 725; UNROLL-NO-VF-NEXT: br i1 [[TMP14]], label [[PRED_SDIV_IF:%.*]], label [[PRED_SDIV_CONTINUE:%.*]] 726; UNROLL-NO-VF: pred.sdiv.if: 727; UNROLL-NO-VF-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDUCTION]] 728; UNROLL-NO-VF-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4, !alias.scope !31 729; UNROLL-NO-VF-NEXT: [[TMP18:%.*]] = sdiv i32 [[TMP4]], [[TMP2]] 730; UNROLL-NO-VF-NEXT: [[TMP19:%.*]] = sdiv i32 [[TMP17]], [[TMP18]] 731; UNROLL-NO-VF-NEXT: br label [[PRED_SDIV_CONTINUE]] 732; UNROLL-NO-VF: pred.sdiv.continue: 733; UNROLL-NO-VF-NEXT: [[TMP20:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP18]], [[PRED_SDIV_IF]] ] 734; UNROLL-NO-VF-NEXT: [[TMP21:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP19]], [[PRED_SDIV_IF]] ] 735; UNROLL-NO-VF-NEXT: br i1 [[TMP15]], label [[PRED_SDIV_IF7:%.*]], label [[PRED_SDIV_CONTINUE8]] 736; UNROLL-NO-VF: pred.sdiv.if7: 737; UNROLL-NO-VF-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDUCTION6]] 738; UNROLL-NO-VF-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4, !alias.scope !31 739; UNROLL-NO-VF-NEXT: [[TMP24:%.*]] = sdiv i32 [[TMP5]], [[TMP3]] 740; UNROLL-NO-VF-NEXT: [[TMP25:%.*]] = sdiv i32 [[TMP23]], [[TMP24]] 741; UNROLL-NO-VF-NEXT: br label [[PRED_SDIV_CONTINUE8]] 742; UNROLL-NO-VF: pred.sdiv.continue8: 743; UNROLL-NO-VF-NEXT: [[TMP26:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP24]], [[PRED_SDIV_IF7]] ] 744; UNROLL-NO-VF-NEXT: [[TMP27:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP25]], [[PRED_SDIV_IF7]] ] 745; UNROLL-NO-VF-NEXT: [[TMP28:%.*]] = xor i1 [[TMP8]], true, !dbg [[DBG34]] 746; UNROLL-NO-VF-NEXT: [[TMP29:%.*]] = xor i1 [[TMP9]], true, !dbg [[DBG34]] 747; UNROLL-NO-VF-NEXT: [[TMP30:%.*]] = select i1 [[TMP10]], i1 [[TMP28]], i1 false, !dbg [[DBG34]] 748; UNROLL-NO-VF-NEXT: [[TMP31:%.*]] = select i1 [[TMP11]], i1 [[TMP29]], i1 false, !dbg [[DBG34]] 749; UNROLL-NO-VF-NEXT: [[PREDPHI:%.*]] = select i1 [[TMP30]], i32 [[TMP4]], i32 [[TMP21]] 750; UNROLL-NO-VF-NEXT: [[PREDPHI9:%.*]] = select i1 [[TMP31]], i32 [[TMP5]], i32 [[TMP27]] 751; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI]], i32* [[TMP0]], align 4, !alias.scope !28, !noalias !31 752; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI9]], i32* [[TMP1]], align 4, !alias.scope !28, !noalias !31 753; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 754; UNROLL-NO-VF-NEXT: [[TMP32:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 755; UNROLL-NO-VF-NEXT: br i1 [[TMP32]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]] 756; UNROLL-NO-VF: middle.block: 757; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128 758; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 759; UNROLL-NO-VF: scalar.ph: 760; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ] 761; UNROLL-NO-VF-NEXT: br label [[FOR_BODY:%.*]] 762; UNROLL-NO-VF: for.cond.cleanup: 763; UNROLL-NO-VF-NEXT: ret void 764; UNROLL-NO-VF: for.body: 765; UNROLL-NO-VF-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[IF_END:%.*]] ] 766; UNROLL-NO-VF-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]] 767; UNROLL-NO-VF-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4 768; UNROLL-NO-VF-NEXT: [[ISD_B:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDVARS_IV]] 769; UNROLL-NO-VF-NEXT: [[LSD_B:%.*]] = load i32, i32* [[ISD_B]], align 4 770; UNROLL-NO-VF-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23 771; UNROLL-NO-VF-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100 772; UNROLL-NO-VF-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[CHECKBB:%.*]], !dbg [[DBG33]] 773; UNROLL-NO-VF: checkbb: 774; UNROLL-NO-VF-NEXT: [[CMP2:%.*]] = icmp sge i32 [[LSD]], 200 775; UNROLL-NO-VF-NEXT: br i1 [[CMP2]], label [[IF_THEN]], label [[IF_END]], !dbg [[DBG34]] 776; UNROLL-NO-VF: if.then: 777; UNROLL-NO-VF-NEXT: [[SD1:%.*]] = sdiv i32 [[PSD]], [[LSD]] 778; UNROLL-NO-VF-NEXT: [[RSD:%.*]] = sdiv i32 [[LSD_B]], [[SD1]] 779; UNROLL-NO-VF-NEXT: br label [[IF_END]] 780; UNROLL-NO-VF: if.end: 781; UNROLL-NO-VF-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[CHECKBB]] ] 782; UNROLL-NO-VF-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4 783; UNROLL-NO-VF-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 784; UNROLL-NO-VF-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128 785; UNROLL-NO-VF-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]] 786; 787entry: 788 br label %for.body 789 790for.cond.cleanup: ; preds = %if.end 791 ret void 792 793for.body: ; preds = %if.end, %entry 794 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end ] 795 %isd = getelementptr inbounds i32, i32* %asd, i64 %indvars.iv 796 %lsd = load i32, i32* %isd, align 4 797 %isd.b = getelementptr inbounds i32, i32* %bsd, i64 %indvars.iv 798 %lsd.b = load i32, i32* %isd.b, align 4 799 %psd = add nsw i32 %lsd, 23 800 %cmp1 = icmp slt i32 %lsd, 100 801 br i1 %cmp1, label %if.then, label %checkbb, !dbg !7 802 803checkbb: ; preds = %for.body 804 %cmp2 = icmp sge i32 %lsd, 200 805 br i1 %cmp2, label %if.then, label %if.end, !dbg !8 806 807if.then: ; preds = %checkbb, %for.body 808 %sd1 = sdiv i32 %psd, %lsd 809 %rsd = sdiv i32 %lsd.b, %sd1 810 br label %if.end 811 812if.end: ; preds = %if.then, %checkbb 813 %ysd.0 = phi i32 [ %rsd, %if.then ], [ %psd, %checkbb ] 814 store i32 %ysd.0, i32* %isd, align 4 815 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 816 %exitcond = icmp eq i64 %indvars.iv.next, 128 817 br i1 %exitcond, label %for.cond.cleanup, label %for.body 818} 819 820define i32 @predicated_udiv_scalarized_operand(i32* %a, i1 %c, i32 %x, i64 %n) { 821; CHECK-LABEL: @predicated_udiv_scalarized_operand( 822; CHECK-NEXT: entry: 823; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1) 824; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 2 825; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 826; CHECK: vector.ph: 827; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 2 828; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]] 829; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i1> poison, i1 [[C:%.*]], i32 0 830; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i1> [[BROADCAST_SPLATINSERT]], <2 x i1> poison, <2 x i32> zeroinitializer 831; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 832; CHECK: vector.body: 833; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UDIV_CONTINUE2:%.*]] ] 834; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP19:%.*]], [[PRED_UDIV_CONTINUE2]] ] 835; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 836; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[TMP0]] 837; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 838; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <2 x i32>* 839; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP3]], align 4 840; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> [[BROADCAST_SPLAT]], i32 0 841; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] 842; CHECK: pred.udiv.if: 843; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0 844; CHECK-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP5]], [[X:%.*]] 845; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0 846; CHECK-NEXT: [[TMP8:%.*]] = udiv i32 [[TMP7]], [[TMP6]] 847; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i32> poison, i32 [[TMP8]], i32 0 848; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE]] 849; CHECK: pred.udiv.continue: 850; CHECK-NEXT: [[TMP10:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP9]], [[PRED_UDIV_IF]] ] 851; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[BROADCAST_SPLAT]], i32 1 852; CHECK-NEXT: br i1 [[TMP11]], label [[PRED_UDIV_IF1:%.*]], label [[PRED_UDIV_CONTINUE2]] 853; CHECK: pred.udiv.if1: 854; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1 855; CHECK-NEXT: [[TMP13:%.*]] = add nsw i32 [[TMP12]], [[X]] 856; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1 857; CHECK-NEXT: [[TMP15:%.*]] = udiv i32 [[TMP14]], [[TMP13]] 858; CHECK-NEXT: [[TMP16:%.*]] = insertelement <2 x i32> [[TMP10]], i32 [[TMP15]], i32 1 859; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE2]] 860; CHECK: pred.udiv.continue2: 861; CHECK-NEXT: [[TMP17:%.*]] = phi <2 x i32> [ [[TMP10]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP16]], [[PRED_UDIV_IF1]] ] 862; CHECK-NEXT: [[TMP18:%.*]] = xor <2 x i1> [[BROADCAST_SPLAT]], <i1 true, i1 true> 863; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[BROADCAST_SPLAT]], <2 x i32> [[TMP17]], <2 x i32> [[WIDE_LOAD]] 864; CHECK-NEXT: [[TMP19]] = add <2 x i32> [[VEC_PHI]], [[PREDPHI]] 865; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 866; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 867; CHECK-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP37:![0-9]+]] 868; CHECK: middle.block: 869; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.vector.reduce.add.v2i32(<2 x i32> [[TMP19]]) 870; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]] 871; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 872; CHECK: scalar.ph: 873; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 874; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP21]], [[MIDDLE_BLOCK]] ] 875; CHECK-NEXT: br label [[FOR_BODY:%.*]] 876; CHECK: for.body: 877; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[FOR_INC:%.*]] ] 878; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[T6:%.*]], [[FOR_INC]] ] 879; CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[I]] 880; CHECK-NEXT: [[T2:%.*]] = load i32, i32* [[T0]], align 4 881; CHECK-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[FOR_INC]] 882; CHECK: if.then: 883; CHECK-NEXT: [[T3:%.*]] = add nsw i32 [[T2]], [[X]] 884; CHECK-NEXT: [[T4:%.*]] = udiv i32 [[T2]], [[T3]] 885; CHECK-NEXT: br label [[FOR_INC]] 886; CHECK: for.inc: 887; CHECK-NEXT: [[T5:%.*]] = phi i32 [ [[T2]], [[FOR_BODY]] ], [ [[T4]], [[IF_THEN]] ] 888; CHECK-NEXT: [[T6]] = add i32 [[R]], [[T5]] 889; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 890; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 891; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP38:![0-9]+]] 892; CHECK: for.end: 893; CHECK-NEXT: [[T7:%.*]] = phi i32 [ [[T6]], [[FOR_INC]] ], [ [[TMP21]], [[MIDDLE_BLOCK]] ] 894; CHECK-NEXT: ret i32 [[T7]] 895; 896; UNROLL-NO-VF-LABEL: @predicated_udiv_scalarized_operand( 897; UNROLL-NO-VF-NEXT: entry: 898; UNROLL-NO-VF-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1) 899; UNROLL-NO-VF-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 2 900; UNROLL-NO-VF-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 901; UNROLL-NO-VF: vector.ph: 902; UNROLL-NO-VF-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 2 903; UNROLL-NO-VF-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]] 904; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]] 905; UNROLL-NO-VF: vector.body: 906; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UDIV_CONTINUE4:%.*]] ] 907; UNROLL-NO-VF-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP12:%.*]], [[PRED_UDIV_CONTINUE4]] ] 908; UNROLL-NO-VF-NEXT: [[VEC_PHI1:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP13:%.*]], [[PRED_UDIV_CONTINUE4]] ] 909; UNROLL-NO-VF-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0 910; UNROLL-NO-VF-NEXT: [[INDUCTION2:%.*]] = add i64 [[INDEX]], 1 911; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDUCTION]] 912; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDUCTION2]] 913; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 914; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 915; UNROLL-NO-VF-NEXT: br i1 [[C:%.*]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] 916; UNROLL-NO-VF: pred.udiv.if: 917; UNROLL-NO-VF-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP2]], [[X:%.*]] 918; UNROLL-NO-VF-NEXT: [[TMP5:%.*]] = udiv i32 [[TMP2]], [[TMP4]] 919; UNROLL-NO-VF-NEXT: br label [[PRED_UDIV_CONTINUE]] 920; UNROLL-NO-VF: pred.udiv.continue: 921; UNROLL-NO-VF-NEXT: [[TMP6:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP5]], [[PRED_UDIV_IF]] ] 922; UNROLL-NO-VF-NEXT: br i1 [[C]], label [[PRED_UDIV_IF3:%.*]], label [[PRED_UDIV_CONTINUE4]] 923; UNROLL-NO-VF: pred.udiv.if3: 924; UNROLL-NO-VF-NEXT: [[TMP7:%.*]] = add nsw i32 [[TMP3]], [[X]] 925; UNROLL-NO-VF-NEXT: [[TMP8:%.*]] = udiv i32 [[TMP3]], [[TMP7]] 926; UNROLL-NO-VF-NEXT: br label [[PRED_UDIV_CONTINUE4]] 927; UNROLL-NO-VF: pred.udiv.continue4: 928; UNROLL-NO-VF-NEXT: [[TMP9:%.*]] = phi i32 [ poison, [[PRED_UDIV_CONTINUE]] ], [ [[TMP8]], [[PRED_UDIV_IF3]] ] 929; UNROLL-NO-VF-NEXT: [[TMP10:%.*]] = xor i1 [[C]], true 930; UNROLL-NO-VF-NEXT: [[TMP11:%.*]] = xor i1 [[C]], true 931; UNROLL-NO-VF-NEXT: [[PREDPHI:%.*]] = select i1 [[C]], i32 [[TMP6]], i32 [[TMP2]] 932; UNROLL-NO-VF-NEXT: [[PREDPHI5:%.*]] = select i1 [[C]], i32 [[TMP9]], i32 [[TMP3]] 933; UNROLL-NO-VF-NEXT: [[TMP12]] = add i32 [[VEC_PHI]], [[PREDPHI]] 934; UNROLL-NO-VF-NEXT: [[TMP13]] = add i32 [[VEC_PHI1]], [[PREDPHI5]] 935; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 936; UNROLL-NO-VF-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 937; UNROLL-NO-VF-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP37:![0-9]+]] 938; UNROLL-NO-VF: middle.block: 939; UNROLL-NO-VF-NEXT: [[BIN_RDX:%.*]] = add i32 [[TMP13]], [[TMP12]] 940; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]] 941; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 942; UNROLL-NO-VF: scalar.ph: 943; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 944; UNROLL-NO-VF-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[BIN_RDX]], [[MIDDLE_BLOCK]] ] 945; UNROLL-NO-VF-NEXT: br label [[FOR_BODY:%.*]] 946; UNROLL-NO-VF: for.body: 947; UNROLL-NO-VF-NEXT: [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[FOR_INC:%.*]] ] 948; UNROLL-NO-VF-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[T6:%.*]], [[FOR_INC]] ] 949; UNROLL-NO-VF-NEXT: [[T0:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[I]] 950; UNROLL-NO-VF-NEXT: [[T2:%.*]] = load i32, i32* [[T0]], align 4 951; UNROLL-NO-VF-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[FOR_INC]] 952; UNROLL-NO-VF: if.then: 953; UNROLL-NO-VF-NEXT: [[T3:%.*]] = add nsw i32 [[T2]], [[X]] 954; UNROLL-NO-VF-NEXT: [[T4:%.*]] = udiv i32 [[T2]], [[T3]] 955; UNROLL-NO-VF-NEXT: br label [[FOR_INC]] 956; UNROLL-NO-VF: for.inc: 957; UNROLL-NO-VF-NEXT: [[T5:%.*]] = phi i32 [ [[T2]], [[FOR_BODY]] ], [ [[T4]], [[IF_THEN]] ] 958; UNROLL-NO-VF-NEXT: [[T6]] = add i32 [[R]], [[T5]] 959; UNROLL-NO-VF-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 960; UNROLL-NO-VF-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 961; UNROLL-NO-VF-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP38:![0-9]+]] 962; UNROLL-NO-VF: for.end: 963; UNROLL-NO-VF-NEXT: [[T7:%.*]] = phi i32 [ [[T6]], [[FOR_INC]] ], [ [[BIN_RDX]], [[MIDDLE_BLOCK]] ] 964; UNROLL-NO-VF-NEXT: ret i32 [[T7]] 965; 966entry: 967 br label %for.body 968 969 970; Test predicating an instruction that feeds a vectorizable use, when unrolled 971; but not vectorized. Derived from pr34248 reproducer. 972for.body: 973 %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ] 974 %r = phi i32 [ 0, %entry ], [ %t6, %for.inc ] 975 %t0 = getelementptr inbounds i32, i32* %a, i64 %i 976 %t2 = load i32, i32* %t0, align 4 977 br i1 %c, label %if.then, label %for.inc 978 979if.then: 980 %t3 = add nsw i32 %t2, %x 981 %t4 = udiv i32 %t2, %t3 982 br label %for.inc 983 984for.inc: 985 %t5 = phi i32 [ %t2, %for.body ], [ %t4, %if.then] 986 %t6 = add i32 %r, %t5 987 %i.next = add nuw nsw i64 %i, 1 988 %cond = icmp slt i64 %i.next, %n 989 br i1 %cond, label %for.body, label %for.end 990 991for.end: 992 %t7 = phi i32 [ %t6, %for.inc ] 993 ret i32 %t7 994} 995 996!llvm.dbg.cu = !{!0} 997!llvm.module.flags = !{!3, !4} 998 999!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !2) 1000!1 = !DIFile(filename: "/tmp/s.c", directory: "/tmp") 1001!2 = !{} 1002!3 = !{i32 2, !"Debug Info Version", i32 3} 1003!4 = !{i32 7, !"PIC Level", i32 2} 1004!5 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 4, type: !6, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2) 1005!6 = !DISubroutineType(types: !2) 1006!7 = !DILocation(line: 5, column: 21, scope: !5) 1007!8 = !DILocation(line: 5, column: 3, scope: !5) 1008 1009 1010