1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -loop-vectorize < %s | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 5target triple = "x86_64-unknown-linux-gnu" 6 7define float @reduction_sum_float_ieee(i32 %n, float* %array) { 8; CHECK-LABEL: @reduction_sum_float_ieee( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 0, 4096 11; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LOOP_EXIT:%.*]] 12; CHECK: loop.preheader: 13; CHECK-NEXT: br label [[LOOP:%.*]] 14; CHECK: loop: 15; CHECK-NEXT: [[IDX:%.*]] = phi i32 [ [[IDX_INC:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ] 16; CHECK-NEXT: [[SUM:%.*]] = phi float [ [[SUM_INC:%.*]], [[LOOP]] ], [ 0.000000e+00, [[LOOP_PREHEADER]] ] 17; CHECK-NEXT: [[ADDRESS:%.*]] = getelementptr float, float* [[ARRAY:%.*]], i32 [[IDX]] 18; CHECK-NEXT: [[VALUE:%.*]] = load float, float* [[ADDRESS]], align 4 19; CHECK-NEXT: [[SUM_INC]] = fadd float [[SUM]], [[VALUE]] 20; CHECK-NEXT: [[IDX_INC]] = add i32 [[IDX]], 1 21; CHECK-NEXT: [[BE_COND:%.*]] = icmp ne i32 [[IDX_INC]], 4096 22; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LOOP_EXIT_LOOPEXIT:%.*]] 23; CHECK: loop.exit.loopexit: 24; CHECK-NEXT: [[SUM_INC_LCSSA:%.*]] = phi float [ [[SUM_INC]], [[LOOP]] ] 25; CHECK-NEXT: br label [[LOOP_EXIT]] 26; CHECK: loop.exit: 27; CHECK-NEXT: [[SUM_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[SUM_INC_LCSSA]], [[LOOP_EXIT_LOOPEXIT]] ] 28; CHECK-NEXT: ret float [[SUM_LCSSA]] 29; 30entry: 31 %entry.cond = icmp ne i32 0, 4096 32 br i1 %entry.cond, label %loop, label %loop.exit 33 34loop: 35 %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] 36 %sum = phi float [ 0.000000e+00, %entry ], [ %sum.inc, %loop ] 37 %address = getelementptr float, float* %array, i32 %idx 38 %value = load float, float* %address 39 %sum.inc = fadd float %sum, %value 40 %idx.inc = add i32 %idx, 1 41 %be.cond = icmp ne i32 %idx.inc, 4096 42 br i1 %be.cond, label %loop, label %loop.exit 43 44loop.exit: 45 %sum.lcssa = phi float [ %sum.inc, %loop ], [ 0.000000e+00, %entry ] 46 ret float %sum.lcssa 47} 48 49define float @reduction_sum_float_fastmath(i32 %n, float* %array) { 50; CHECK-LABEL: @reduction_sum_float_fastmath( 51; CHECK-NEXT: entry: 52; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 0, 4096 53; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LOOP_EXIT:%.*]] 54; CHECK: loop.preheader: 55; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 56; CHECK: vector.ph: 57; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 58; CHECK: vector.body: 59; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 60; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ] 61; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 62; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 63; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 4 64; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[ARRAY:%.*]], i32 [[TMP0]] 65; CHECK-NEXT: [[TMP3:%.*]] = getelementptr float, float* [[ARRAY]], i32 [[TMP1]] 66; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, float* [[TMP2]], i32 0 67; CHECK-NEXT: [[TMP5:%.*]] = bitcast float* [[TMP4]] to <4 x float>* 68; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP5]], align 4 69; CHECK-NEXT: [[TMP6:%.*]] = getelementptr float, float* [[TMP2]], i32 4 70; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[TMP6]] to <4 x float>* 71; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, <4 x float>* [[TMP7]], align 4 72; CHECK-NEXT: [[TMP8]] = fadd fast <4 x float> [[VEC_PHI]], [[WIDE_LOAD]] 73; CHECK-NEXT: [[TMP9]] = fadd fast <4 x float> [[VEC_PHI1]], [[WIDE_LOAD2]] 74; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 75; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[INDEX_NEXT]], 4096 76; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] 77; CHECK: middle.block: 78; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd fast <4 x float> [[TMP9]], [[TMP8]] 79; CHECK-NEXT: [[TMP11:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[BIN_RDX]]) 80; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 4096, 4096 81; CHECK-NEXT: br i1 [[CMP_N]], label [[LOOP_EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 82; CHECK: scalar.ph: 83; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4096, [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 84; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ 0.000000e+00, [[LOOP_PREHEADER]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ] 85; CHECK-NEXT: br label [[LOOP:%.*]] 86; CHECK: loop: 87; CHECK-NEXT: [[IDX:%.*]] = phi i32 [ [[IDX_INC:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 88; CHECK-NEXT: [[SUM:%.*]] = phi float [ [[SUM_INC:%.*]], [[LOOP]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 89; CHECK-NEXT: [[ADDRESS:%.*]] = getelementptr float, float* [[ARRAY]], i32 [[IDX]] 90; CHECK-NEXT: [[VALUE:%.*]] = load float, float* [[ADDRESS]], align 4 91; CHECK-NEXT: [[SUM_INC]] = fadd fast float [[SUM]], [[VALUE]] 92; CHECK-NEXT: [[IDX_INC]] = add i32 [[IDX]], 1 93; CHECK-NEXT: [[BE_COND:%.*]] = icmp ne i32 [[IDX_INC]], 4096 94; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LOOP_EXIT_LOOPEXIT]], [[LOOP2:!llvm.loop !.*]] 95; CHECK: loop.exit.loopexit: 96; CHECK-NEXT: [[SUM_INC_LCSSA:%.*]] = phi float [ [[SUM_INC]], [[LOOP]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ] 97; CHECK-NEXT: br label [[LOOP_EXIT]] 98; CHECK: loop.exit: 99; CHECK-NEXT: [[SUM_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[SUM_INC_LCSSA]], [[LOOP_EXIT_LOOPEXIT]] ] 100; CHECK-NEXT: ret float [[SUM_LCSSA]] 101; 102entry: 103 %entry.cond = icmp ne i32 0, 4096 104 br i1 %entry.cond, label %loop, label %loop.exit 105 106loop: 107 %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] 108 %sum = phi float [ 0.000000e+00, %entry ], [ %sum.inc, %loop ] 109 %address = getelementptr float, float* %array, i32 %idx 110 %value = load float, float* %address 111 %sum.inc = fadd fast float %sum, %value 112 %idx.inc = add i32 %idx, 1 113 %be.cond = icmp ne i32 %idx.inc, 4096 114 br i1 %be.cond, label %loop, label %loop.exit 115 116loop.exit: 117 %sum.lcssa = phi float [ %sum.inc, %loop ], [ 0.000000e+00, %entry ] 118 ret float %sum.lcssa 119} 120 121define float @reduction_sum_float_only_reassoc(i32 %n, float* %array) { 122; CHECK-LABEL: @reduction_sum_float_only_reassoc( 123; CHECK-NEXT: entry: 124; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 0, 4096 125; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LOOP_EXIT:%.*]] 126; CHECK: loop.preheader: 127; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 128; CHECK: vector.ph: 129; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 130; CHECK: vector.body: 131; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 132; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ] 133; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 134; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 135; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 4 136; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[ARRAY:%.*]], i32 [[TMP0]] 137; CHECK-NEXT: [[TMP3:%.*]] = getelementptr float, float* [[ARRAY]], i32 [[TMP1]] 138; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, float* [[TMP2]], i32 0 139; CHECK-NEXT: [[TMP5:%.*]] = bitcast float* [[TMP4]] to <4 x float>* 140; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP5]], align 4 141; CHECK-NEXT: [[TMP6:%.*]] = getelementptr float, float* [[TMP2]], i32 4 142; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[TMP6]] to <4 x float>* 143; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, <4 x float>* [[TMP7]], align 4 144; CHECK-NEXT: [[TMP8]] = fadd reassoc <4 x float> [[VEC_PHI]], [[WIDE_LOAD]] 145; CHECK-NEXT: [[TMP9]] = fadd reassoc <4 x float> [[VEC_PHI1]], [[WIDE_LOAD2]] 146; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 147; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[INDEX_NEXT]], 4096 148; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP4:!llvm.loop !.*]] 149; CHECK: middle.block: 150; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd reassoc <4 x float> [[TMP9]], [[TMP8]] 151; CHECK-NEXT: [[TMP11:%.*]] = call reassoc float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[BIN_RDX]]) 152; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 4096, 4096 153; CHECK-NEXT: br i1 [[CMP_N]], label [[LOOP_EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 154; CHECK: scalar.ph: 155; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4096, [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 156; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ -0.000000e+00, [[LOOP_PREHEADER]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ] 157; CHECK-NEXT: br label [[LOOP:%.*]] 158; CHECK: loop: 159; CHECK-NEXT: [[IDX:%.*]] = phi i32 [ [[IDX_INC:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 160; CHECK-NEXT: [[SUM:%.*]] = phi float [ [[SUM_INC:%.*]], [[LOOP]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 161; CHECK-NEXT: [[ADDRESS:%.*]] = getelementptr float, float* [[ARRAY]], i32 [[IDX]] 162; CHECK-NEXT: [[VALUE:%.*]] = load float, float* [[ADDRESS]], align 4 163; CHECK-NEXT: [[SUM_INC]] = fadd reassoc float [[SUM]], [[VALUE]] 164; CHECK-NEXT: [[IDX_INC]] = add i32 [[IDX]], 1 165; CHECK-NEXT: [[BE_COND:%.*]] = icmp ne i32 [[IDX_INC]], 4096 166; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LOOP_EXIT_LOOPEXIT]], [[LOOP5:!llvm.loop !.*]] 167; CHECK: loop.exit.loopexit: 168; CHECK-NEXT: [[SUM_INC_LCSSA:%.*]] = phi float [ [[SUM_INC]], [[LOOP]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ] 169; CHECK-NEXT: br label [[LOOP_EXIT]] 170; CHECK: loop.exit: 171; CHECK-NEXT: [[SUM_LCSSA:%.*]] = phi float [ -0.000000e+00, [[ENTRY:%.*]] ], [ [[SUM_INC_LCSSA]], [[LOOP_EXIT_LOOPEXIT]] ] 172; CHECK-NEXT: ret float [[SUM_LCSSA]] 173; 174entry: 175 %entry.cond = icmp ne i32 0, 4096 176 br i1 %entry.cond, label %loop, label %loop.exit 177 178loop: 179 %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] 180 %sum = phi float [ -0.000000e+00, %entry ], [ %sum.inc, %loop ] 181 %address = getelementptr float, float* %array, i32 %idx 182 %value = load float, float* %address 183 %sum.inc = fadd reassoc float %sum, %value 184 %idx.inc = add i32 %idx, 1 185 %be.cond = icmp ne i32 %idx.inc, 4096 186 br i1 %be.cond, label %loop, label %loop.exit 187 188loop.exit: 189 %sum.lcssa = phi float [ %sum.inc, %loop ], [ -0.000000e+00, %entry ] 190 ret float %sum.lcssa 191} 192 193define float @reduction_sum_float_only_reassoc_and_contract(i32 %n, float* %array) { 194; CHECK-LABEL: @reduction_sum_float_only_reassoc_and_contract( 195; CHECK-NEXT: entry: 196; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 0, 4096 197; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LOOP_EXIT:%.*]] 198; CHECK: loop.preheader: 199; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 200; CHECK: vector.ph: 201; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 202; CHECK: vector.body: 203; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 204; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ] 205; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 206; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 207; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 4 208; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[ARRAY:%.*]], i32 [[TMP0]] 209; CHECK-NEXT: [[TMP3:%.*]] = getelementptr float, float* [[ARRAY]], i32 [[TMP1]] 210; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, float* [[TMP2]], i32 0 211; CHECK-NEXT: [[TMP5:%.*]] = bitcast float* [[TMP4]] to <4 x float>* 212; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP5]], align 4 213; CHECK-NEXT: [[TMP6:%.*]] = getelementptr float, float* [[TMP2]], i32 4 214; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[TMP6]] to <4 x float>* 215; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, <4 x float>* [[TMP7]], align 4 216; CHECK-NEXT: [[TMP8]] = fadd reassoc contract <4 x float> [[VEC_PHI]], [[WIDE_LOAD]] 217; CHECK-NEXT: [[TMP9]] = fadd reassoc contract <4 x float> [[VEC_PHI1]], [[WIDE_LOAD2]] 218; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 219; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[INDEX_NEXT]], 4096 220; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP6:!llvm.loop !.*]] 221; CHECK: middle.block: 222; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd reassoc contract <4 x float> [[TMP9]], [[TMP8]] 223; CHECK-NEXT: [[TMP11:%.*]] = call reassoc contract float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[BIN_RDX]]) 224; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 4096, 4096 225; CHECK-NEXT: br i1 [[CMP_N]], label [[LOOP_EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 226; CHECK: scalar.ph: 227; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4096, [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 228; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ -0.000000e+00, [[LOOP_PREHEADER]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ] 229; CHECK-NEXT: br label [[LOOP:%.*]] 230; CHECK: loop: 231; CHECK-NEXT: [[IDX:%.*]] = phi i32 [ [[IDX_INC:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 232; CHECK-NEXT: [[SUM:%.*]] = phi float [ [[SUM_INC:%.*]], [[LOOP]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 233; CHECK-NEXT: [[ADDRESS:%.*]] = getelementptr float, float* [[ARRAY]], i32 [[IDX]] 234; CHECK-NEXT: [[VALUE:%.*]] = load float, float* [[ADDRESS]], align 4 235; CHECK-NEXT: [[SUM_INC]] = fadd reassoc contract float [[SUM]], [[VALUE]] 236; CHECK-NEXT: [[IDX_INC]] = add i32 [[IDX]], 1 237; CHECK-NEXT: [[BE_COND:%.*]] = icmp ne i32 [[IDX_INC]], 4096 238; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LOOP_EXIT_LOOPEXIT]], [[LOOP7:!llvm.loop !.*]] 239; CHECK: loop.exit.loopexit: 240; CHECK-NEXT: [[SUM_INC_LCSSA:%.*]] = phi float [ [[SUM_INC]], [[LOOP]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ] 241; CHECK-NEXT: br label [[LOOP_EXIT]] 242; CHECK: loop.exit: 243; CHECK-NEXT: [[SUM_LCSSA:%.*]] = phi float [ -0.000000e+00, [[ENTRY:%.*]] ], [ [[SUM_INC_LCSSA]], [[LOOP_EXIT_LOOPEXIT]] ] 244; CHECK-NEXT: ret float [[SUM_LCSSA]] 245; 246entry: 247 %entry.cond = icmp ne i32 0, 4096 248 br i1 %entry.cond, label %loop, label %loop.exit 249 250loop: 251 %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] 252 %sum = phi float [ -0.000000e+00, %entry ], [ %sum.inc, %loop ] 253 %address = getelementptr float, float* %array, i32 %idx 254 %value = load float, float* %address 255 %sum.inc = fadd reassoc contract float %sum, %value 256 %idx.inc = add i32 %idx, 1 257 %be.cond = icmp ne i32 %idx.inc, 4096 258 br i1 %be.cond, label %loop, label %loop.exit 259 260loop.exit: 261 %sum.lcssa = phi float [ %sum.inc, %loop ], [ -0.000000e+00, %entry ] 262 ret float %sum.lcssa 263} 264 265; New instructions should have the same FMF as the original code. 266; Note that the select inherits FMF from its fcmp condition. 267 268define float @PR35538(float* nocapture readonly %a, i32 %N) #0 { 269; CHECK-LABEL: @PR35538( 270; CHECK-NEXT: entry: 271; CHECK-NEXT: [[CMP12:%.*]] = icmp sgt i32 [[N:%.*]], 0 272; CHECK-NEXT: br i1 [[CMP12]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]] 273; CHECK: for.body.lr.ph: 274; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 275; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 8 276; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 277; CHECK: vector.ph: 278; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 8 279; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]] 280; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 281; CHECK: vector.body: 282; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 283; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ <float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00>, [[VECTOR_PH]] ], [ [[TMP10:%.*]], [[VECTOR_BODY]] ] 284; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ <float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00>, [[VECTOR_PH]] ], [ [[TMP11:%.*]], [[VECTOR_BODY]] ] 285; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 286; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 4 287; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[TMP0]] 288; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP1]] 289; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 0 290; CHECK-NEXT: [[TMP5:%.*]] = bitcast float* [[TMP4]] to <4 x float>* 291; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP5]], align 4 292; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 4 293; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[TMP6]] to <4 x float>* 294; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, <4 x float>* [[TMP7]], align 4 295; CHECK-NEXT: [[TMP8:%.*]] = fcmp nnan ninf nsz oge <4 x float> [[WIDE_LOAD]], [[VEC_PHI]] 296; CHECK-NEXT: [[TMP9:%.*]] = fcmp nnan ninf nsz oge <4 x float> [[WIDE_LOAD2]], [[VEC_PHI1]] 297; CHECK-NEXT: [[TMP10]] = select <4 x i1> [[TMP8]], <4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]] 298; CHECK-NEXT: [[TMP11]] = select <4 x i1> [[TMP9]], <4 x float> [[WIDE_LOAD2]], <4 x float> [[VEC_PHI1]] 299; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 300; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 301; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP8:!llvm.loop !.*]] 302; CHECK: middle.block: 303; CHECK-NEXT: [[RDX_MINMAX_CMP:%.*]] = fcmp nnan ninf nsz ogt <4 x float> [[TMP10]], [[TMP11]] 304; CHECK-NEXT: [[RDX_MINMAX_SELECT:%.*]] = select nnan ninf nsz <4 x i1> [[RDX_MINMAX_CMP]], <4 x float> [[TMP10]], <4 x float> [[TMP11]] 305; CHECK-NEXT: [[TMP13:%.*]] = call nnan ninf nsz float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[RDX_MINMAX_SELECT]]) 306; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]] 307; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]] 308; CHECK: scalar.ph: 309; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH]] ] 310; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ -1.000000e+00, [[FOR_BODY_LR_PH]] ], [ [[TMP13]], [[MIDDLE_BLOCK]] ] 311; CHECK-NEXT: br label [[FOR_BODY:%.*]] 312; CHECK: for.cond.cleanup.loopexit: 313; CHECK-NEXT: [[MAX_0__LCSSA:%.*]] = phi float [ [[MAX_0_:%.*]], [[FOR_BODY]] ], [ [[TMP13]], [[MIDDLE_BLOCK]] ] 314; CHECK-NEXT: br label [[FOR_COND_CLEANUP]] 315; CHECK: for.cond.cleanup: 316; CHECK-NEXT: [[MAX_0_LCSSA:%.*]] = phi float [ -1.000000e+00, [[ENTRY:%.*]] ], [ [[MAX_0__LCSSA]], [[FOR_COND_CLEANUP_LOOPEXIT]] ] 317; CHECK-NEXT: ret float [[MAX_0_LCSSA]] 318; CHECK: for.body: 319; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 320; CHECK-NEXT: [[MAX_013:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[MAX_0_]], [[FOR_BODY]] ] 321; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[INDVARS_IV]] 322; CHECK-NEXT: [[TMP14:%.*]] = load float, float* [[ARRAYIDX]], align 4 323; CHECK-NEXT: [[CMP1_INV:%.*]] = fcmp nnan ninf nsz oge float [[TMP14]], [[MAX_013]] 324; CHECK-NEXT: [[MAX_0_]] = select i1 [[CMP1_INV]], float [[TMP14]], float [[MAX_013]] 325; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 326; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 327; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]], [[LOOP9:!llvm.loop !.*]] 328; 329entry: 330 %cmp12 = icmp sgt i32 %N, 0 331 br i1 %cmp12, label %for.body.lr.ph, label %for.cond.cleanup 332 333for.body.lr.ph: 334 %wide.trip.count = zext i32 %N to i64 335 br label %for.body 336 337for.cond.cleanup: 338 %max.0.lcssa = phi float [ -1.000000e+00, %entry ], [ %max.0., %for.body ] 339 ret float %max.0.lcssa 340 341for.body: 342 %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] 343 %max.013 = phi float [ -1.000000e+00, %for.body.lr.ph ], [ %max.0., %for.body ] 344 %arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv 345 %0 = load float, float* %arrayidx, align 4 346 %cmp1.inv = fcmp nnan ninf nsz oge float %0, %max.013 347 %max.0. = select i1 %cmp1.inv, float %0, float %max.013 348 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 349 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count 350 br i1 %exitcond, label %for.cond.cleanup, label %for.body 351} 352 353; Same as above, but this time the select already has matching FMF with its condition. 354 355define float @PR35538_more_FMF(float* nocapture readonly %a, i32 %N) #0 { 356; CHECK-LABEL: @PR35538_more_FMF( 357; CHECK-NEXT: entry: 358; CHECK-NEXT: [[CMP12:%.*]] = icmp sgt i32 [[N:%.*]], 0 359; CHECK-NEXT: br i1 [[CMP12]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]] 360; CHECK: for.body.lr.ph: 361; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 362; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 8 363; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 364; CHECK: vector.ph: 365; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 8 366; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]] 367; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 368; CHECK: vector.body: 369; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 370; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ <float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00>, [[VECTOR_PH]] ], [ [[TMP10:%.*]], [[VECTOR_BODY]] ] 371; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ <float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00>, [[VECTOR_PH]] ], [ [[TMP11:%.*]], [[VECTOR_BODY]] ] 372; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 373; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 4 374; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[TMP0]] 375; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP1]] 376; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 0 377; CHECK-NEXT: [[TMP5:%.*]] = bitcast float* [[TMP4]] to <4 x float>* 378; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP5]], align 4 379; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 4 380; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[TMP6]] to <4 x float>* 381; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, <4 x float>* [[TMP7]], align 4 382; CHECK-NEXT: [[TMP8:%.*]] = fcmp nnan ninf oge <4 x float> [[WIDE_LOAD]], [[VEC_PHI]] 383; CHECK-NEXT: [[TMP9:%.*]] = fcmp nnan ninf oge <4 x float> [[WIDE_LOAD2]], [[VEC_PHI1]] 384; CHECK-NEXT: [[TMP10]] = select <4 x i1> [[TMP8]], <4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]] 385; CHECK-NEXT: [[TMP11]] = select <4 x i1> [[TMP9]], <4 x float> [[WIDE_LOAD2]], <4 x float> [[VEC_PHI1]] 386; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 387; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 388; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP10:!llvm.loop !.*]] 389; CHECK: middle.block: 390; CHECK-NEXT: [[RDX_MINMAX_CMP:%.*]] = fcmp nnan ninf ogt <4 x float> [[TMP10]], [[TMP11]] 391; CHECK-NEXT: [[RDX_MINMAX_SELECT:%.*]] = select nnan ninf <4 x i1> [[RDX_MINMAX_CMP]], <4 x float> [[TMP10]], <4 x float> [[TMP11]] 392; CHECK-NEXT: [[TMP13:%.*]] = call nnan ninf float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[RDX_MINMAX_SELECT]]) 393; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]] 394; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]] 395; CHECK: scalar.ph: 396; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH]] ] 397; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ -1.000000e+00, [[FOR_BODY_LR_PH]] ], [ [[TMP13]], [[MIDDLE_BLOCK]] ] 398; CHECK-NEXT: br label [[FOR_BODY:%.*]] 399; CHECK: for.cond.cleanup.loopexit: 400; CHECK-NEXT: [[MAX_0__LCSSA:%.*]] = phi float [ [[MAX_0_:%.*]], [[FOR_BODY]] ], [ [[TMP13]], [[MIDDLE_BLOCK]] ] 401; CHECK-NEXT: br label [[FOR_COND_CLEANUP]] 402; CHECK: for.cond.cleanup: 403; CHECK-NEXT: [[MAX_0_LCSSA:%.*]] = phi float [ -1.000000e+00, [[ENTRY:%.*]] ], [ [[MAX_0__LCSSA]], [[FOR_COND_CLEANUP_LOOPEXIT]] ] 404; CHECK-NEXT: ret float [[MAX_0_LCSSA]] 405; CHECK: for.body: 406; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 407; CHECK-NEXT: [[MAX_013:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[MAX_0_]], [[FOR_BODY]] ] 408; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[INDVARS_IV]] 409; CHECK-NEXT: [[TMP14:%.*]] = load float, float* [[ARRAYIDX]], align 4 410; CHECK-NEXT: [[CMP1_INV:%.*]] = fcmp nnan ninf oge float [[TMP14]], [[MAX_013]] 411; CHECK-NEXT: [[MAX_0_]] = select nnan ninf i1 [[CMP1_INV]], float [[TMP14]], float [[MAX_013]] 412; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 413; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 414; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]], [[LOOP11:!llvm.loop !.*]] 415; 416entry: 417 %cmp12 = icmp sgt i32 %N, 0 418 br i1 %cmp12, label %for.body.lr.ph, label %for.cond.cleanup 419 420for.body.lr.ph: 421 %wide.trip.count = zext i32 %N to i64 422 br label %for.body 423 424for.cond.cleanup: 425 %max.0.lcssa = phi float [ -1.000000e+00, %entry ], [ %max.0., %for.body ] 426 ret float %max.0.lcssa 427 428for.body: 429 %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] 430 %max.013 = phi float [ -1.000000e+00, %for.body.lr.ph ], [ %max.0., %for.body ] 431 %arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv 432 %0 = load float, float* %arrayidx, align 4 433 %cmp1.inv = fcmp nnan ninf oge float %0, %max.013 434 %max.0. = select nnan ninf i1 %cmp1.inv, float %0, float %max.013 435 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 436 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count 437 br i1 %exitcond, label %for.cond.cleanup, label %for.body 438} 439 440attributes #0 = { "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "unsafe-fp-math"="false" } 441