1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -S -loop-vectorize -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE2 3; RUN: opt < %s -S -loop-vectorize -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41 4; RUN: opt < %s -S -loop-vectorize -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX1 5; RUN: opt < %s -S -loop-vectorize -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX2 6; RUN: opt < %s -S -loop-vectorize -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefix=SSE2 7 8define void @test_muladd(i32* noalias nocapture %d1, i16* noalias nocapture readonly %s1, i16* noalias nocapture readonly %s2, i32 %n) { 9; SSE2-LABEL: @test_muladd( 10; SSE2-NEXT: entry: 11; SSE2-NEXT: [[CMP30:%.*]] = icmp sgt i32 [[N:%.*]], 0 12; SSE2-NEXT: br i1 [[CMP30]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] 13; SSE2: for.body.preheader: 14; SSE2-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 15; SSE2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 4 16; SSE2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 17; SSE2: vector.ph: 18; SSE2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 4 19; SSE2-NEXT: [[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]] 20; SSE2-NEXT: br label [[VECTOR_BODY:%.*]] 21; SSE2: vector.body: 22; SSE2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 23; SSE2-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 24; SSE2-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 25; SSE2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i16, i16* [[S1:%.*]], i64 [[TMP1]] 26; SSE2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i16, i16* [[TMP2]], i32 0 27; SSE2-NEXT: [[TMP4:%.*]] = bitcast i16* [[TMP3]] to <8 x i16>* 28; SSE2-NEXT: [[WIDE_VEC:%.*]] = load <8 x i16>, <8 x i16>* [[TMP4]], align 2 29; SSE2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i16> [[WIDE_VEC]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 30; SSE2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i16> [[WIDE_VEC]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 31; SSE2-NEXT: [[TMP5:%.*]] = sext <4 x i16> [[STRIDED_VEC]] to <4 x i32> 32; SSE2-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, i16* [[S2:%.*]], i64 [[TMP1]] 33; SSE2-NEXT: [[TMP7:%.*]] = getelementptr inbounds i16, i16* [[TMP6]], i32 0 34; SSE2-NEXT: [[TMP8:%.*]] = bitcast i16* [[TMP7]] to <8 x i16>* 35; SSE2-NEXT: [[WIDE_VEC2:%.*]] = load <8 x i16>, <8 x i16>* [[TMP8]], align 2 36; SSE2-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <8 x i16> [[WIDE_VEC2]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 37; SSE2-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <8 x i16> [[WIDE_VEC2]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 38; SSE2-NEXT: [[TMP9:%.*]] = sext <4 x i16> [[STRIDED_VEC3]] to <4 x i32> 39; SSE2-NEXT: [[TMP10:%.*]] = mul nsw <4 x i32> [[TMP9]], [[TMP5]] 40; SSE2-NEXT: [[TMP13:%.*]] = sext <4 x i16> [[STRIDED_VEC1]] to <4 x i32> 41; SSE2-NEXT: [[TMP15:%.*]] = sext <4 x i16> [[STRIDED_VEC4]] to <4 x i32> 42; SSE2-NEXT: [[TMP16:%.*]] = mul nsw <4 x i32> [[TMP15]], [[TMP13]] 43; SSE2-NEXT: [[TMP17:%.*]] = add nsw <4 x i32> [[TMP16]], [[TMP10]] 44; SSE2-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, i32* [[D1:%.*]], i64 [[TMP0]] 45; SSE2-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[TMP18]], i32 0 46; SSE2-NEXT: [[TMP20:%.*]] = bitcast i32* [[TMP19]] to <4 x i32>* 47; SSE2-NEXT: store <4 x i32> [[TMP17]], <4 x i32>* [[TMP20]], align 4 48; SSE2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 49; SSE2-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 50; SSE2-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 51; SSE2: middle.block: 52; SSE2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]] 53; SSE2-NEXT: br i1 [[CMP_N]], label [[FOR_END_LOOPEXIT:%.*]], label [[SCALAR_PH]] 54; SSE2: scalar.ph: 55; SSE2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 56; SSE2-NEXT: br label [[FOR_BODY:%.*]] 57; SSE2: for.body: 58; SSE2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 59; SSE2-NEXT: [[TMP22:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 1 60; SSE2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP22]] 61; SSE2-NEXT: [[TMP23:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 62; SSE2-NEXT: [[CONV:%.*]] = sext i16 [[TMP23]] to i32 63; SSE2-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP22]] 64; SSE2-NEXT: [[TMP24:%.*]] = load i16, i16* [[ARRAYIDX4]], align 2 65; SSE2-NEXT: [[CONV5:%.*]] = sext i16 [[TMP24]] to i32 66; SSE2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV5]], [[CONV]] 67; SSE2-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], 1 68; SSE2-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP25]] 69; SSE2-NEXT: [[TMP26:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2 70; SSE2-NEXT: [[CONV11:%.*]] = sext i16 [[TMP26]] to i32 71; SSE2-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP25]] 72; SSE2-NEXT: [[TMP27:%.*]] = load i16, i16* [[ARRAYIDX15]], align 2 73; SSE2-NEXT: [[CONV16:%.*]] = sext i16 [[TMP27]] to i32 74; SSE2-NEXT: [[MUL17:%.*]] = mul nsw i32 [[CONV16]], [[CONV11]] 75; SSE2-NEXT: [[ADD18:%.*]] = add nsw i32 [[MUL17]], [[MUL6]] 76; SSE2-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i32, i32* [[D1]], i64 [[INDVARS_IV]] 77; SSE2-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX20]], align 4 78; SSE2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 79; SSE2-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 80; SSE2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] 81; SSE2: for.end.loopexit: 82; SSE2-NEXT: br label [[FOR_END]] 83; SSE2: for.end: 84; SSE2-NEXT: ret void 85; 86; SSE41-LABEL: @test_muladd( 87; SSE41-NEXT: entry: 88; SSE41-NEXT: [[CMP30:%.*]] = icmp sgt i32 [[N:%.*]], 0 89; SSE41-NEXT: br i1 [[CMP30]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] 90; SSE41: for.body.preheader: 91; SSE41-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 92; SSE41-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 8 93; SSE41-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 94; SSE41: vector.ph: 95; SSE41-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 8 96; SSE41-NEXT: [[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]] 97; SSE41-NEXT: br label [[VECTOR_BODY:%.*]] 98; SSE41: vector.body: 99; SSE41-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 100; SSE41-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 101; SSE41-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 4 102; SSE41-NEXT: [[TMP2:%.*]] = shl nuw nsw i64 [[TMP0]], 1 103; SSE41-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP1]], 1 104; SSE41-NEXT: [[TMP4:%.*]] = getelementptr inbounds i16, i16* [[S1:%.*]], i64 [[TMP2]] 105; SSE41-NEXT: [[TMP5:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP3]] 106; SSE41-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, i16* [[TMP4]], i32 0 107; SSE41-NEXT: [[TMP7:%.*]] = bitcast i16* [[TMP6]] to <8 x i16>* 108; SSE41-NEXT: [[TMP8:%.*]] = getelementptr inbounds i16, i16* [[TMP5]], i32 0 109; SSE41-NEXT: [[TMP9:%.*]] = bitcast i16* [[TMP8]] to <8 x i16>* 110; SSE41-NEXT: [[WIDE_VEC:%.*]] = load <8 x i16>, <8 x i16>* [[TMP7]], align 2 111; SSE41-NEXT: [[WIDE_VEC1:%.*]] = load <8 x i16>, <8 x i16>* [[TMP9]], align 2 112; SSE41-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i16> [[WIDE_VEC]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 113; SSE41-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <8 x i16> [[WIDE_VEC1]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 114; SSE41-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <8 x i16> [[WIDE_VEC]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 115; SSE41-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <8 x i16> [[WIDE_VEC1]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 116; SSE41-NEXT: [[TMP10:%.*]] = sext <4 x i16> [[STRIDED_VEC]] to <4 x i32> 117; SSE41-NEXT: [[TMP11:%.*]] = sext <4 x i16> [[STRIDED_VEC2]] to <4 x i32> 118; SSE41-NEXT: [[TMP12:%.*]] = getelementptr inbounds i16, i16* [[S2:%.*]], i64 [[TMP2]] 119; SSE41-NEXT: [[TMP13:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP3]] 120; SSE41-NEXT: [[TMP14:%.*]] = getelementptr inbounds i16, i16* [[TMP12]], i32 0 121; SSE41-NEXT: [[TMP15:%.*]] = bitcast i16* [[TMP14]] to <8 x i16>* 122; SSE41-NEXT: [[TMP16:%.*]] = getelementptr inbounds i16, i16* [[TMP13]], i32 0 123; SSE41-NEXT: [[TMP17:%.*]] = bitcast i16* [[TMP16]] to <8 x i16>* 124; SSE41-NEXT: [[WIDE_VEC5:%.*]] = load <8 x i16>, <8 x i16>* [[TMP15]], align 2 125; SSE41-NEXT: [[WIDE_VEC6:%.*]] = load <8 x i16>, <8 x i16>* [[TMP17]], align 2 126; SSE41-NEXT: [[STRIDED_VEC7:%.*]] = shufflevector <8 x i16> [[WIDE_VEC5]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 127; SSE41-NEXT: [[STRIDED_VEC8:%.*]] = shufflevector <8 x i16> [[WIDE_VEC6]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 128; SSE41-NEXT: [[STRIDED_VEC9:%.*]] = shufflevector <8 x i16> [[WIDE_VEC5]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 129; SSE41-NEXT: [[STRIDED_VEC10:%.*]] = shufflevector <8 x i16> [[WIDE_VEC6]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 130; SSE41-NEXT: [[TMP18:%.*]] = sext <4 x i16> [[STRIDED_VEC7]] to <4 x i32> 131; SSE41-NEXT: [[TMP19:%.*]] = sext <4 x i16> [[STRIDED_VEC8]] to <4 x i32> 132; SSE41-NEXT: [[TMP20:%.*]] = mul nsw <4 x i32> [[TMP18]], [[TMP10]] 133; SSE41-NEXT: [[TMP21:%.*]] = mul nsw <4 x i32> [[TMP19]], [[TMP11]] 134; SSE41-NEXT: [[TMP26:%.*]] = sext <4 x i16> [[STRIDED_VEC3]] to <4 x i32> 135; SSE41-NEXT: [[TMP27:%.*]] = sext <4 x i16> [[STRIDED_VEC4]] to <4 x i32> 136; SSE41-NEXT: [[TMP30:%.*]] = sext <4 x i16> [[STRIDED_VEC9]] to <4 x i32> 137; SSE41-NEXT: [[TMP31:%.*]] = sext <4 x i16> [[STRIDED_VEC10]] to <4 x i32> 138; SSE41-NEXT: [[TMP32:%.*]] = mul nsw <4 x i32> [[TMP30]], [[TMP26]] 139; SSE41-NEXT: [[TMP33:%.*]] = mul nsw <4 x i32> [[TMP31]], [[TMP27]] 140; SSE41-NEXT: [[TMP34:%.*]] = add nsw <4 x i32> [[TMP32]], [[TMP20]] 141; SSE41-NEXT: [[TMP35:%.*]] = add nsw <4 x i32> [[TMP33]], [[TMP21]] 142; SSE41-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, i32* [[D1:%.*]], i64 [[TMP0]] 143; SSE41-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, i32* [[D1]], i64 [[TMP1]] 144; SSE41-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, i32* [[TMP36]], i32 0 145; SSE41-NEXT: [[TMP39:%.*]] = bitcast i32* [[TMP38]] to <4 x i32>* 146; SSE41-NEXT: store <4 x i32> [[TMP34]], <4 x i32>* [[TMP39]], align 4 147; SSE41-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, i32* [[TMP36]], i32 4 148; SSE41-NEXT: [[TMP41:%.*]] = bitcast i32* [[TMP40]] to <4 x i32>* 149; SSE41-NEXT: store <4 x i32> [[TMP35]], <4 x i32>* [[TMP41]], align 4 150; SSE41-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 151; SSE41-NEXT: [[TMP42:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 152; SSE41-NEXT: br i1 [[TMP42]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 153; SSE41: middle.block: 154; SSE41-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]] 155; SSE41-NEXT: br i1 [[CMP_N]], label [[FOR_END_LOOPEXIT:%.*]], label [[SCALAR_PH]] 156; SSE41: scalar.ph: 157; SSE41-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 158; SSE41-NEXT: br label [[FOR_BODY:%.*]] 159; SSE41: for.body: 160; SSE41-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 161; SSE41-NEXT: [[TMP43:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 1 162; SSE41-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP43]] 163; SSE41-NEXT: [[TMP44:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 164; SSE41-NEXT: [[CONV:%.*]] = sext i16 [[TMP44]] to i32 165; SSE41-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP43]] 166; SSE41-NEXT: [[TMP45:%.*]] = load i16, i16* [[ARRAYIDX4]], align 2 167; SSE41-NEXT: [[CONV5:%.*]] = sext i16 [[TMP45]] to i32 168; SSE41-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV5]], [[CONV]] 169; SSE41-NEXT: [[TMP46:%.*]] = or i64 [[TMP43]], 1 170; SSE41-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP46]] 171; SSE41-NEXT: [[TMP47:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2 172; SSE41-NEXT: [[CONV11:%.*]] = sext i16 [[TMP47]] to i32 173; SSE41-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP46]] 174; SSE41-NEXT: [[TMP48:%.*]] = load i16, i16* [[ARRAYIDX15]], align 2 175; SSE41-NEXT: [[CONV16:%.*]] = sext i16 [[TMP48]] to i32 176; SSE41-NEXT: [[MUL17:%.*]] = mul nsw i32 [[CONV16]], [[CONV11]] 177; SSE41-NEXT: [[ADD18:%.*]] = add nsw i32 [[MUL17]], [[MUL6]] 178; SSE41-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i32, i32* [[D1]], i64 [[INDVARS_IV]] 179; SSE41-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX20]], align 4 180; SSE41-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 181; SSE41-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 182; SSE41-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] 183; SSE41: for.end.loopexit: 184; SSE41-NEXT: br label [[FOR_END]] 185; SSE41: for.end: 186; SSE41-NEXT: ret void 187; 188; AVX1-LABEL: @test_muladd( 189; AVX1-NEXT: entry: 190; AVX1-NEXT: [[CMP30:%.*]] = icmp sgt i32 [[N:%.*]], 0 191; AVX1-NEXT: br i1 [[CMP30]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] 192; AVX1: for.body.preheader: 193; AVX1-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 194; AVX1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 16 195; AVX1-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 196; AVX1: vector.ph: 197; AVX1-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 16 198; AVX1-NEXT: [[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]] 199; AVX1-NEXT: br label [[VECTOR_BODY:%.*]] 200; AVX1: vector.body: 201; AVX1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 202; AVX1-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 203; AVX1-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 4 204; AVX1-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 8 205; AVX1-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 12 206; AVX1-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[TMP0]], 1 207; AVX1-NEXT: [[TMP5:%.*]] = shl nuw nsw i64 [[TMP1]], 1 208; AVX1-NEXT: [[TMP6:%.*]] = shl nuw nsw i64 [[TMP2]], 1 209; AVX1-NEXT: [[TMP7:%.*]] = shl nuw nsw i64 [[TMP3]], 1 210; AVX1-NEXT: [[TMP8:%.*]] = getelementptr inbounds i16, i16* [[S1:%.*]], i64 [[TMP4]] 211; AVX1-NEXT: [[TMP9:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP5]] 212; AVX1-NEXT: [[TMP10:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP6]] 213; AVX1-NEXT: [[TMP11:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP7]] 214; AVX1-NEXT: [[TMP12:%.*]] = getelementptr inbounds i16, i16* [[TMP8]], i32 0 215; AVX1-NEXT: [[TMP13:%.*]] = bitcast i16* [[TMP12]] to <8 x i16>* 216; AVX1-NEXT: [[TMP14:%.*]] = getelementptr inbounds i16, i16* [[TMP9]], i32 0 217; AVX1-NEXT: [[TMP15:%.*]] = bitcast i16* [[TMP14]] to <8 x i16>* 218; AVX1-NEXT: [[TMP16:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 0 219; AVX1-NEXT: [[TMP17:%.*]] = bitcast i16* [[TMP16]] to <8 x i16>* 220; AVX1-NEXT: [[TMP18:%.*]] = getelementptr inbounds i16, i16* [[TMP11]], i32 0 221; AVX1-NEXT: [[TMP19:%.*]] = bitcast i16* [[TMP18]] to <8 x i16>* 222; AVX1-NEXT: [[WIDE_VEC:%.*]] = load <8 x i16>, <8 x i16>* [[TMP13]], align 2 223; AVX1-NEXT: [[WIDE_VEC1:%.*]] = load <8 x i16>, <8 x i16>* [[TMP15]], align 2 224; AVX1-NEXT: [[WIDE_VEC2:%.*]] = load <8 x i16>, <8 x i16>* [[TMP17]], align 2 225; AVX1-NEXT: [[WIDE_VEC3:%.*]] = load <8 x i16>, <8 x i16>* [[TMP19]], align 2 226; AVX1-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i16> [[WIDE_VEC]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 227; AVX1-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <8 x i16> [[WIDE_VEC1]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 228; AVX1-NEXT: [[STRIDED_VEC5:%.*]] = shufflevector <8 x i16> [[WIDE_VEC2]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 229; AVX1-NEXT: [[STRIDED_VEC6:%.*]] = shufflevector <8 x i16> [[WIDE_VEC3]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 230; AVX1-NEXT: [[STRIDED_VEC7:%.*]] = shufflevector <8 x i16> [[WIDE_VEC]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 231; AVX1-NEXT: [[STRIDED_VEC8:%.*]] = shufflevector <8 x i16> [[WIDE_VEC1]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 232; AVX1-NEXT: [[STRIDED_VEC9:%.*]] = shufflevector <8 x i16> [[WIDE_VEC2]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 233; AVX1-NEXT: [[STRIDED_VEC10:%.*]] = shufflevector <8 x i16> [[WIDE_VEC3]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 234; AVX1-NEXT: [[TMP20:%.*]] = sext <4 x i16> [[STRIDED_VEC]] to <4 x i32> 235; AVX1-NEXT: [[TMP21:%.*]] = sext <4 x i16> [[STRIDED_VEC4]] to <4 x i32> 236; AVX1-NEXT: [[TMP22:%.*]] = sext <4 x i16> [[STRIDED_VEC5]] to <4 x i32> 237; AVX1-NEXT: [[TMP23:%.*]] = sext <4 x i16> [[STRIDED_VEC6]] to <4 x i32> 238; AVX1-NEXT: [[TMP24:%.*]] = getelementptr inbounds i16, i16* [[S2:%.*]], i64 [[TMP4]] 239; AVX1-NEXT: [[TMP25:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP5]] 240; AVX1-NEXT: [[TMP26:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP6]] 241; AVX1-NEXT: [[TMP27:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP7]] 242; AVX1-NEXT: [[TMP28:%.*]] = getelementptr inbounds i16, i16* [[TMP24]], i32 0 243; AVX1-NEXT: [[TMP29:%.*]] = bitcast i16* [[TMP28]] to <8 x i16>* 244; AVX1-NEXT: [[TMP30:%.*]] = getelementptr inbounds i16, i16* [[TMP25]], i32 0 245; AVX1-NEXT: [[TMP31:%.*]] = bitcast i16* [[TMP30]] to <8 x i16>* 246; AVX1-NEXT: [[TMP32:%.*]] = getelementptr inbounds i16, i16* [[TMP26]], i32 0 247; AVX1-NEXT: [[TMP33:%.*]] = bitcast i16* [[TMP32]] to <8 x i16>* 248; AVX1-NEXT: [[TMP34:%.*]] = getelementptr inbounds i16, i16* [[TMP27]], i32 0 249; AVX1-NEXT: [[TMP35:%.*]] = bitcast i16* [[TMP34]] to <8 x i16>* 250; AVX1-NEXT: [[WIDE_VEC11:%.*]] = load <8 x i16>, <8 x i16>* [[TMP29]], align 2 251; AVX1-NEXT: [[WIDE_VEC12:%.*]] = load <8 x i16>, <8 x i16>* [[TMP31]], align 2 252; AVX1-NEXT: [[WIDE_VEC13:%.*]] = load <8 x i16>, <8 x i16>* [[TMP33]], align 2 253; AVX1-NEXT: [[WIDE_VEC14:%.*]] = load <8 x i16>, <8 x i16>* [[TMP35]], align 2 254; AVX1-NEXT: [[STRIDED_VEC15:%.*]] = shufflevector <8 x i16> [[WIDE_VEC11]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 255; AVX1-NEXT: [[STRIDED_VEC16:%.*]] = shufflevector <8 x i16> [[WIDE_VEC12]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 256; AVX1-NEXT: [[STRIDED_VEC17:%.*]] = shufflevector <8 x i16> [[WIDE_VEC13]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 257; AVX1-NEXT: [[STRIDED_VEC18:%.*]] = shufflevector <8 x i16> [[WIDE_VEC14]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 258; AVX1-NEXT: [[STRIDED_VEC19:%.*]] = shufflevector <8 x i16> [[WIDE_VEC11]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 259; AVX1-NEXT: [[STRIDED_VEC20:%.*]] = shufflevector <8 x i16> [[WIDE_VEC12]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 260; AVX1-NEXT: [[STRIDED_VEC21:%.*]] = shufflevector <8 x i16> [[WIDE_VEC13]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 261; AVX1-NEXT: [[STRIDED_VEC22:%.*]] = shufflevector <8 x i16> [[WIDE_VEC14]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 262; AVX1-NEXT: [[TMP36:%.*]] = sext <4 x i16> [[STRIDED_VEC15]] to <4 x i32> 263; AVX1-NEXT: [[TMP37:%.*]] = sext <4 x i16> [[STRIDED_VEC16]] to <4 x i32> 264; AVX1-NEXT: [[TMP38:%.*]] = sext <4 x i16> [[STRIDED_VEC17]] to <4 x i32> 265; AVX1-NEXT: [[TMP39:%.*]] = sext <4 x i16> [[STRIDED_VEC18]] to <4 x i32> 266; AVX1-NEXT: [[TMP40:%.*]] = mul nsw <4 x i32> [[TMP36]], [[TMP20]] 267; AVX1-NEXT: [[TMP41:%.*]] = mul nsw <4 x i32> [[TMP37]], [[TMP21]] 268; AVX1-NEXT: [[TMP42:%.*]] = mul nsw <4 x i32> [[TMP38]], [[TMP22]] 269; AVX1-NEXT: [[TMP43:%.*]] = mul nsw <4 x i32> [[TMP39]], [[TMP23]] 270; AVX1-NEXT: [[TMP52:%.*]] = sext <4 x i16> [[STRIDED_VEC7]] to <4 x i32> 271; AVX1-NEXT: [[TMP53:%.*]] = sext <4 x i16> [[STRIDED_VEC8]] to <4 x i32> 272; AVX1-NEXT: [[TMP54:%.*]] = sext <4 x i16> [[STRIDED_VEC9]] to <4 x i32> 273; AVX1-NEXT: [[TMP55:%.*]] = sext <4 x i16> [[STRIDED_VEC10]] to <4 x i32> 274; AVX1-NEXT: [[TMP60:%.*]] = sext <4 x i16> [[STRIDED_VEC19]] to <4 x i32> 275; AVX1-NEXT: [[TMP61:%.*]] = sext <4 x i16> [[STRIDED_VEC20]] to <4 x i32> 276; AVX1-NEXT: [[TMP62:%.*]] = sext <4 x i16> [[STRIDED_VEC21]] to <4 x i32> 277; AVX1-NEXT: [[TMP63:%.*]] = sext <4 x i16> [[STRIDED_VEC22]] to <4 x i32> 278; AVX1-NEXT: [[TMP64:%.*]] = mul nsw <4 x i32> [[TMP60]], [[TMP52]] 279; AVX1-NEXT: [[TMP65:%.*]] = mul nsw <4 x i32> [[TMP61]], [[TMP53]] 280; AVX1-NEXT: [[TMP66:%.*]] = mul nsw <4 x i32> [[TMP62]], [[TMP54]] 281; AVX1-NEXT: [[TMP67:%.*]] = mul nsw <4 x i32> [[TMP63]], [[TMP55]] 282; AVX1-NEXT: [[TMP68:%.*]] = add nsw <4 x i32> [[TMP64]], [[TMP40]] 283; AVX1-NEXT: [[TMP69:%.*]] = add nsw <4 x i32> [[TMP65]], [[TMP41]] 284; AVX1-NEXT: [[TMP70:%.*]] = add nsw <4 x i32> [[TMP66]], [[TMP42]] 285; AVX1-NEXT: [[TMP71:%.*]] = add nsw <4 x i32> [[TMP67]], [[TMP43]] 286; AVX1-NEXT: [[TMP72:%.*]] = getelementptr inbounds i32, i32* [[D1:%.*]], i64 [[TMP0]] 287; AVX1-NEXT: [[TMP73:%.*]] = getelementptr inbounds i32, i32* [[D1]], i64 [[TMP1]] 288; AVX1-NEXT: [[TMP74:%.*]] = getelementptr inbounds i32, i32* [[D1]], i64 [[TMP2]] 289; AVX1-NEXT: [[TMP75:%.*]] = getelementptr inbounds i32, i32* [[D1]], i64 [[TMP3]] 290; AVX1-NEXT: [[TMP76:%.*]] = getelementptr inbounds i32, i32* [[TMP72]], i32 0 291; AVX1-NEXT: [[TMP77:%.*]] = bitcast i32* [[TMP76]] to <4 x i32>* 292; AVX1-NEXT: store <4 x i32> [[TMP68]], <4 x i32>* [[TMP77]], align 4 293; AVX1-NEXT: [[TMP78:%.*]] = getelementptr inbounds i32, i32* [[TMP72]], i32 4 294; AVX1-NEXT: [[TMP79:%.*]] = bitcast i32* [[TMP78]] to <4 x i32>* 295; AVX1-NEXT: store <4 x i32> [[TMP69]], <4 x i32>* [[TMP79]], align 4 296; AVX1-NEXT: [[TMP80:%.*]] = getelementptr inbounds i32, i32* [[TMP72]], i32 8 297; AVX1-NEXT: [[TMP81:%.*]] = bitcast i32* [[TMP80]] to <4 x i32>* 298; AVX1-NEXT: store <4 x i32> [[TMP70]], <4 x i32>* [[TMP81]], align 4 299; AVX1-NEXT: [[TMP82:%.*]] = getelementptr inbounds i32, i32* [[TMP72]], i32 12 300; AVX1-NEXT: [[TMP83:%.*]] = bitcast i32* [[TMP82]] to <4 x i32>* 301; AVX1-NEXT: store <4 x i32> [[TMP71]], <4 x i32>* [[TMP83]], align 4 302; AVX1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16 303; AVX1-NEXT: [[TMP84:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 304; AVX1-NEXT: br i1 [[TMP84]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 305; AVX1: middle.block: 306; AVX1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]] 307; AVX1-NEXT: br i1 [[CMP_N]], label [[FOR_END_LOOPEXIT:%.*]], label [[SCALAR_PH]] 308; AVX1: scalar.ph: 309; AVX1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 310; AVX1-NEXT: br label [[FOR_BODY:%.*]] 311; AVX1: for.body: 312; AVX1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 313; AVX1-NEXT: [[TMP85:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 1 314; AVX1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP85]] 315; AVX1-NEXT: [[TMP86:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 316; AVX1-NEXT: [[CONV:%.*]] = sext i16 [[TMP86]] to i32 317; AVX1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP85]] 318; AVX1-NEXT: [[TMP87:%.*]] = load i16, i16* [[ARRAYIDX4]], align 2 319; AVX1-NEXT: [[CONV5:%.*]] = sext i16 [[TMP87]] to i32 320; AVX1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV5]], [[CONV]] 321; AVX1-NEXT: [[TMP88:%.*]] = or i64 [[TMP85]], 1 322; AVX1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP88]] 323; AVX1-NEXT: [[TMP89:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2 324; AVX1-NEXT: [[CONV11:%.*]] = sext i16 [[TMP89]] to i32 325; AVX1-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP88]] 326; AVX1-NEXT: [[TMP90:%.*]] = load i16, i16* [[ARRAYIDX15]], align 2 327; AVX1-NEXT: [[CONV16:%.*]] = sext i16 [[TMP90]] to i32 328; AVX1-NEXT: [[MUL17:%.*]] = mul nsw i32 [[CONV16]], [[CONV11]] 329; AVX1-NEXT: [[ADD18:%.*]] = add nsw i32 [[MUL17]], [[MUL6]] 330; AVX1-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i32, i32* [[D1]], i64 [[INDVARS_IV]] 331; AVX1-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX20]], align 4 332; AVX1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 333; AVX1-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 334; AVX1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] 335; AVX1: for.end.loopexit: 336; AVX1-NEXT: br label [[FOR_END]] 337; AVX1: for.end: 338; AVX1-NEXT: ret void 339; 340; AVX2-LABEL: @test_muladd( 341; AVX2-NEXT: entry: 342; AVX2-NEXT: [[CMP30:%.*]] = icmp sgt i32 [[N:%.*]], 0 343; AVX2-NEXT: br i1 [[CMP30]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] 344; AVX2: for.body.preheader: 345; AVX2-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 346; AVX2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 8 347; AVX2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 348; AVX2: vector.ph: 349; AVX2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 8 350; AVX2-NEXT: [[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]] 351; AVX2-NEXT: br label [[VECTOR_BODY:%.*]] 352; AVX2: vector.body: 353; AVX2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 354; AVX2-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 355; AVX2-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 356; AVX2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i16, i16* [[S1:%.*]], i64 [[TMP1]] 357; AVX2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i16, i16* [[TMP2]], i32 0 358; AVX2-NEXT: [[TMP4:%.*]] = bitcast i16* [[TMP3]] to <16 x i16>* 359; AVX2-NEXT: [[WIDE_VEC:%.*]] = load <16 x i16>, <16 x i16>* [[TMP4]], align 2 360; AVX2-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i16> [[WIDE_VEC]], <16 x i16> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 361; AVX2-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <16 x i16> [[WIDE_VEC]], <16 x i16> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 362; AVX2-NEXT: [[TMP5:%.*]] = sext <8 x i16> [[STRIDED_VEC]] to <8 x i32> 363; AVX2-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, i16* [[S2:%.*]], i64 [[TMP1]] 364; AVX2-NEXT: [[TMP7:%.*]] = getelementptr inbounds i16, i16* [[TMP6]], i32 0 365; AVX2-NEXT: [[TMP8:%.*]] = bitcast i16* [[TMP7]] to <16 x i16>* 366; AVX2-NEXT: [[WIDE_VEC2:%.*]] = load <16 x i16>, <16 x i16>* [[TMP8]], align 2 367; AVX2-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <16 x i16> [[WIDE_VEC2]], <16 x i16> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 368; AVX2-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <16 x i16> [[WIDE_VEC2]], <16 x i16> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 369; AVX2-NEXT: [[TMP9:%.*]] = sext <8 x i16> [[STRIDED_VEC3]] to <8 x i32> 370; AVX2-NEXT: [[TMP10:%.*]] = mul nsw <8 x i32> [[TMP9]], [[TMP5]] 371; AVX2-NEXT: [[TMP13:%.*]] = sext <8 x i16> [[STRIDED_VEC1]] to <8 x i32> 372; AVX2-NEXT: [[TMP15:%.*]] = sext <8 x i16> [[STRIDED_VEC4]] to <8 x i32> 373; AVX2-NEXT: [[TMP16:%.*]] = mul nsw <8 x i32> [[TMP15]], [[TMP13]] 374; AVX2-NEXT: [[TMP17:%.*]] = add nsw <8 x i32> [[TMP16]], [[TMP10]] 375; AVX2-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, i32* [[D1:%.*]], i64 [[TMP0]] 376; AVX2-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[TMP18]], i32 0 377; AVX2-NEXT: [[TMP20:%.*]] = bitcast i32* [[TMP19]] to <8 x i32>* 378; AVX2-NEXT: store <8 x i32> [[TMP17]], <8 x i32>* [[TMP20]], align 4 379; AVX2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 380; AVX2-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 381; AVX2-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 382; AVX2: middle.block: 383; AVX2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]] 384; AVX2-NEXT: br i1 [[CMP_N]], label [[FOR_END_LOOPEXIT:%.*]], label [[SCALAR_PH]] 385; AVX2: scalar.ph: 386; AVX2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 387; AVX2-NEXT: br label [[FOR_BODY:%.*]] 388; AVX2: for.body: 389; AVX2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 390; AVX2-NEXT: [[TMP22:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 1 391; AVX2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP22]] 392; AVX2-NEXT: [[TMP23:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 393; AVX2-NEXT: [[CONV:%.*]] = sext i16 [[TMP23]] to i32 394; AVX2-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP22]] 395; AVX2-NEXT: [[TMP24:%.*]] = load i16, i16* [[ARRAYIDX4]], align 2 396; AVX2-NEXT: [[CONV5:%.*]] = sext i16 [[TMP24]] to i32 397; AVX2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV5]], [[CONV]] 398; AVX2-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], 1 399; AVX2-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, i16* [[S1]], i64 [[TMP25]] 400; AVX2-NEXT: [[TMP26:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2 401; AVX2-NEXT: [[CONV11:%.*]] = sext i16 [[TMP26]] to i32 402; AVX2-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i16, i16* [[S2]], i64 [[TMP25]] 403; AVX2-NEXT: [[TMP27:%.*]] = load i16, i16* [[ARRAYIDX15]], align 2 404; AVX2-NEXT: [[CONV16:%.*]] = sext i16 [[TMP27]] to i32 405; AVX2-NEXT: [[MUL17:%.*]] = mul nsw i32 [[CONV16]], [[CONV11]] 406; AVX2-NEXT: [[ADD18:%.*]] = add nsw i32 [[MUL17]], [[MUL6]] 407; AVX2-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i32, i32* [[D1]], i64 [[INDVARS_IV]] 408; AVX2-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX20]], align 4 409; AVX2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 410; AVX2-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 411; AVX2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] 412; AVX2: for.end.loopexit: 413; AVX2-NEXT: br label [[FOR_END]] 414; AVX2: for.end: 415; AVX2-NEXT: ret void 416; 417entry: 418 %cmp30 = icmp sgt i32 %n, 0 419 br i1 %cmp30, label %for.body.preheader, label %for.end 420 421for.body.preheader: 422 %wide.trip.count = zext i32 %n to i64 423 br label %for.body 424 425for.body: 426 %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] 427 %0 = shl nuw nsw i64 %indvars.iv, 1 428 %arrayidx = getelementptr inbounds i16, i16* %s1, i64 %0 429 %1 = load i16, i16* %arrayidx, align 2 430 %conv = sext i16 %1 to i32 431 %arrayidx4 = getelementptr inbounds i16, i16* %s2, i64 %0 432 %2 = load i16, i16* %arrayidx4, align 2 433 %conv5 = sext i16 %2 to i32 434 %mul6 = mul nsw i32 %conv5, %conv 435 %3 = or i64 %0, 1 436 %arrayidx10 = getelementptr inbounds i16, i16* %s1, i64 %3 437 %4 = load i16, i16* %arrayidx10, align 2 438 %conv11 = sext i16 %4 to i32 439 %arrayidx15 = getelementptr inbounds i16, i16* %s2, i64 %3 440 %5 = load i16, i16* %arrayidx15, align 2 441 %conv16 = sext i16 %5 to i32 442 %mul17 = mul nsw i32 %conv16, %conv11 443 %add18 = add nsw i32 %mul17, %mul6 444 %arrayidx20 = getelementptr inbounds i32, i32* %d1, i64 %indvars.iv 445 store i32 %add18, i32* %arrayidx20, align 4 446 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 447 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count 448 br i1 %exitcond.not, label %for.end.loopexit, label %for.body 449 450for.end.loopexit: 451 br label %for.end 452 453for.end: 454 ret void 455} 456