1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine < %s | FileCheck %s --check-prefix=NORMAL 3; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine -mcpu=sandybridge < %s | FileCheck %s --check-prefixes=AVX,AVX1 4; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine -mcpu=haswell < %s | FileCheck %s --check-prefixes=AVX,AVX2 5; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine -mcpu=slm < %s | FileCheck %s --check-prefix=SLOW 6; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine -mcpu=atom < %s | FileCheck %s --check-prefix=SLOW 7 8define void @foo(i32* noalias nocapture %a, i32* noalias nocapture readonly %b) { 9; NORMAL-LABEL: @foo( 10; NORMAL-NEXT: entry: 11; NORMAL-NEXT: br label [[FOR_BODY:%.*]] 12; NORMAL: for.cond.cleanup: 13; NORMAL-NEXT: ret void 14; NORMAL: for.body: 15; NORMAL-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 16; NORMAL-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 1 17; NORMAL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[TMP0]] 18; NORMAL-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 19; NORMAL-NEXT: [[TMP2:%.*]] = or i64 [[TMP0]], 1 20; NORMAL-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP2]] 21; NORMAL-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 22; NORMAL-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP3]], [[TMP1]] 23; NORMAL-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]] 24; NORMAL-NEXT: store i32 [[ADD4]], i32* [[ARRAYIDX6]], align 4 25; NORMAL-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 26; NORMAL-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1024 27; NORMAL-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]] 28; 29; AVX-LABEL: @foo( 30; AVX-NEXT: entry: 31; AVX-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 32; AVX: vector.ph: 33; AVX-NEXT: br label [[VECTOR_BODY:%.*]] 34; AVX: vector.body: 35; AVX-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 36; AVX-NEXT: [[TMP0:%.*]] = shl nsw i64 [[INDEX]], 1 37; AVX-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[TMP0]] 38; AVX-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to <8 x i32>* 39; AVX-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP2]], align 4 40; AVX-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 41; AVX-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 42; AVX-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[STRIDED_VEC1]], [[STRIDED_VEC]] 43; AVX-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 44; AVX-NEXT: [[TMP5:%.*]] = bitcast i32* [[TMP4]] to <4 x i32>* 45; AVX-NEXT: store <4 x i32> [[TMP3]], <4 x i32>* [[TMP5]], align 4 46; AVX-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 47; AVX-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024 48; AVX-NEXT: br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop !0 49; AVX: middle.block: 50; AVX-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 51; AVX: scalar.ph: 52; AVX-NEXT: br label [[FOR_BODY:%.*]] 53; AVX: for.cond.cleanup: 54; AVX-NEXT: ret void 55; AVX: for.body: 56; AVX-NEXT: br i1 undef, label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop !2 57; 58; SLOW-LABEL: @foo( 59; SLOW-NEXT: entry: 60; SLOW-NEXT: br label [[FOR_BODY:%.*]] 61; SLOW: for.cond.cleanup: 62; SLOW-NEXT: ret void 63; SLOW: for.body: 64; SLOW-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 65; SLOW-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 1 66; SLOW-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[TMP0]] 67; SLOW-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 68; SLOW-NEXT: [[TMP2:%.*]] = or i64 [[TMP0]], 1 69; SLOW-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP2]] 70; SLOW-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 71; SLOW-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP3]], [[TMP1]] 72; SLOW-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]] 73; SLOW-NEXT: store i32 [[ADD4]], i32* [[ARRAYIDX6]], align 4 74; SLOW-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 75; SLOW-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1024 76; SLOW-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]] 77; 78entry: 79 br label %for.body 80 81for.cond.cleanup: ; preds = %for.body 82 ret void 83 84for.body: ; preds = %for.body, %entry 85 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 86 %0 = shl nsw i64 %indvars.iv, 1 87 %arrayidx = getelementptr inbounds i32, i32* %b, i64 %0 88 %1 = load i32, i32* %arrayidx, align 4 89 %2 = or i64 %0, 1 90 %arrayidx3 = getelementptr inbounds i32, i32* %b, i64 %2 91 %3 = load i32, i32* %arrayidx3, align 4 92 %add4 = add nsw i32 %3, %1 93 %arrayidx6 = getelementptr inbounds i32, i32* %a, i64 %indvars.iv 94 store i32 %add4, i32* %arrayidx6, align 4 95 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 96 %exitcond = icmp eq i64 %indvars.iv.next, 1024 97 br i1 %exitcond, label %for.cond.cleanup, label %for.body 98} 99