1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine < %s | FileCheck %s --check-prefix=SSE
3; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine -mcpu=sandybridge < %s | FileCheck %s --check-prefix=AVX1
4; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine -mcpu=haswell < %s | FileCheck %s --check-prefix=AVX2
5; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine -mcpu=slm < %s | FileCheck %s --check-prefix=SSE
6; RUN: opt -S -mtriple=x86_64-pc_linux -loop-vectorize -instcombine -mcpu=atom < %s | FileCheck %s --check-prefix=ATOM
7
8define void @foo(i32* noalias nocapture %a, i32* noalias nocapture readonly %b) {
9; SSE-LABEL: @foo(
10; SSE-NEXT:  entry:
11; SSE-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
12; SSE:       vector.ph:
13; SSE-NEXT:    br label [[VECTOR_BODY:%.*]]
14; SSE:       vector.body:
15; SSE-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
16; SSE-NEXT:    [[TMP0:%.*]] = shl nsw i64 [[INDEX]], 1
17; SSE-NEXT:    [[TMP1:%.*]] = shl i64 [[INDEX]], 1
18; SSE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 8
19; SSE-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[TMP0]]
20; SSE-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP2]]
21; SSE-NEXT:    [[TMP5:%.*]] = bitcast i32* [[TMP3]] to <8 x i32>*
22; SSE-NEXT:    [[TMP6:%.*]] = bitcast i32* [[TMP4]] to <8 x i32>*
23; SSE-NEXT:    [[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP5]], align 4
24; SSE-NEXT:    [[WIDE_VEC1:%.*]] = load <8 x i32>, <8 x i32>* [[TMP6]], align 4
25; SSE-NEXT:    [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
26; SSE-NEXT:    [[STRIDED_VEC2:%.*]] = shufflevector <8 x i32> [[WIDE_VEC1]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
27; SSE-NEXT:    [[STRIDED_VEC3:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
28; SSE-NEXT:    [[STRIDED_VEC4:%.*]] = shufflevector <8 x i32> [[WIDE_VEC1]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
29; SSE-NEXT:    [[TMP7:%.*]] = add nsw <4 x i32> [[STRIDED_VEC3]], [[STRIDED_VEC]]
30; SSE-NEXT:    [[TMP8:%.*]] = add nsw <4 x i32> [[STRIDED_VEC4]], [[STRIDED_VEC2]]
31; SSE-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
32; SSE-NEXT:    [[TMP10:%.*]] = bitcast i32* [[TMP9]] to <4 x i32>*
33; SSE-NEXT:    store <4 x i32> [[TMP7]], <4 x i32>* [[TMP10]], align 4
34; SSE-NEXT:    [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[TMP9]], i64 4
35; SSE-NEXT:    [[TMP12:%.*]] = bitcast i32* [[TMP11]] to <4 x i32>*
36; SSE-NEXT:    store <4 x i32> [[TMP8]], <4 x i32>* [[TMP12]], align 4
37; SSE-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
38; SSE-NEXT:    [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
39; SSE-NEXT:    br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
40; SSE:       middle.block:
41; SSE-NEXT:    br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
42; SSE:       scalar.ph:
43; SSE-NEXT:    br label [[FOR_BODY:%.*]]
44; SSE:       for.cond.cleanup:
45; SSE-NEXT:    ret void
46; SSE:       for.body:
47; SSE-NEXT:    br i1 poison, label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
48;
49; AVX1-LABEL: @foo(
50; AVX1-NEXT:  entry:
51; AVX1-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
52; AVX1:       vector.ph:
53; AVX1-NEXT:    br label [[VECTOR_BODY:%.*]]
54; AVX1:       vector.body:
55; AVX1-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
56; AVX1-NEXT:    [[TMP0:%.*]] = shl nsw i64 [[INDEX]], 1
57; AVX1-NEXT:    [[TMP1:%.*]] = shl i64 [[INDEX]], 1
58; AVX1-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 8
59; AVX1-NEXT:    [[TMP3:%.*]] = shl i64 [[INDEX]], 1
60; AVX1-NEXT:    [[TMP4:%.*]] = or i64 [[TMP3]], 16
61; AVX1-NEXT:    [[TMP5:%.*]] = shl i64 [[INDEX]], 1
62; AVX1-NEXT:    [[TMP6:%.*]] = or i64 [[TMP5]], 24
63; AVX1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[TMP0]]
64; AVX1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP2]]
65; AVX1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP4]]
66; AVX1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP6]]
67; AVX1-NEXT:    [[TMP11:%.*]] = bitcast i32* [[TMP7]] to <8 x i32>*
68; AVX1-NEXT:    [[TMP12:%.*]] = bitcast i32* [[TMP8]] to <8 x i32>*
69; AVX1-NEXT:    [[TMP13:%.*]] = bitcast i32* [[TMP9]] to <8 x i32>*
70; AVX1-NEXT:    [[TMP14:%.*]] = bitcast i32* [[TMP10]] to <8 x i32>*
71; AVX1-NEXT:    [[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP11]], align 4
72; AVX1-NEXT:    [[WIDE_VEC1:%.*]] = load <8 x i32>, <8 x i32>* [[TMP12]], align 4
73; AVX1-NEXT:    [[WIDE_VEC2:%.*]] = load <8 x i32>, <8 x i32>* [[TMP13]], align 4
74; AVX1-NEXT:    [[WIDE_VEC3:%.*]] = load <8 x i32>, <8 x i32>* [[TMP14]], align 4
75; AVX1-NEXT:    [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
76; AVX1-NEXT:    [[STRIDED_VEC4:%.*]] = shufflevector <8 x i32> [[WIDE_VEC1]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
77; AVX1-NEXT:    [[STRIDED_VEC5:%.*]] = shufflevector <8 x i32> [[WIDE_VEC2]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
78; AVX1-NEXT:    [[STRIDED_VEC6:%.*]] = shufflevector <8 x i32> [[WIDE_VEC3]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
79; AVX1-NEXT:    [[STRIDED_VEC7:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
80; AVX1-NEXT:    [[STRIDED_VEC8:%.*]] = shufflevector <8 x i32> [[WIDE_VEC1]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
81; AVX1-NEXT:    [[STRIDED_VEC9:%.*]] = shufflevector <8 x i32> [[WIDE_VEC2]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
82; AVX1-NEXT:    [[STRIDED_VEC10:%.*]] = shufflevector <8 x i32> [[WIDE_VEC3]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
83; AVX1-NEXT:    [[TMP15:%.*]] = add nsw <4 x i32> [[STRIDED_VEC7]], [[STRIDED_VEC]]
84; AVX1-NEXT:    [[TMP16:%.*]] = add nsw <4 x i32> [[STRIDED_VEC8]], [[STRIDED_VEC4]]
85; AVX1-NEXT:    [[TMP17:%.*]] = add nsw <4 x i32> [[STRIDED_VEC9]], [[STRIDED_VEC5]]
86; AVX1-NEXT:    [[TMP18:%.*]] = add nsw <4 x i32> [[STRIDED_VEC10]], [[STRIDED_VEC6]]
87; AVX1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
88; AVX1-NEXT:    [[TMP20:%.*]] = bitcast i32* [[TMP19]] to <4 x i32>*
89; AVX1-NEXT:    store <4 x i32> [[TMP15]], <4 x i32>* [[TMP20]], align 4
90; AVX1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i64 4
91; AVX1-NEXT:    [[TMP22:%.*]] = bitcast i32* [[TMP21]] to <4 x i32>*
92; AVX1-NEXT:    store <4 x i32> [[TMP16]], <4 x i32>* [[TMP22]], align 4
93; AVX1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i64 8
94; AVX1-NEXT:    [[TMP24:%.*]] = bitcast i32* [[TMP23]] to <4 x i32>*
95; AVX1-NEXT:    store <4 x i32> [[TMP17]], <4 x i32>* [[TMP24]], align 4
96; AVX1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i64 12
97; AVX1-NEXT:    [[TMP26:%.*]] = bitcast i32* [[TMP25]] to <4 x i32>*
98; AVX1-NEXT:    store <4 x i32> [[TMP18]], <4 x i32>* [[TMP26]], align 4
99; AVX1-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16
100; AVX1-NEXT:    [[TMP27:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
101; AVX1-NEXT:    br i1 [[TMP27]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
102; AVX1:       middle.block:
103; AVX1-NEXT:    br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
104; AVX1:       scalar.ph:
105; AVX1-NEXT:    br label [[FOR_BODY:%.*]]
106; AVX1:       for.cond.cleanup:
107; AVX1-NEXT:    ret void
108; AVX1:       for.body:
109; AVX1-NEXT:    br i1 poison, label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
110;
111; AVX2-LABEL: @foo(
112; AVX2-NEXT:  entry:
113; AVX2-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
114; AVX2:       vector.ph:
115; AVX2-NEXT:    br label [[VECTOR_BODY:%.*]]
116; AVX2:       vector.body:
117; AVX2-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
118; AVX2-NEXT:    [[TMP0:%.*]] = shl nsw i64 [[INDEX]], 1
119; AVX2-NEXT:    [[TMP1:%.*]] = shl i64 [[INDEX]], 1
120; AVX2-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 16
121; AVX2-NEXT:    [[TMP3:%.*]] = shl i64 [[INDEX]], 1
122; AVX2-NEXT:    [[TMP4:%.*]] = or i64 [[TMP3]], 32
123; AVX2-NEXT:    [[TMP5:%.*]] = shl i64 [[INDEX]], 1
124; AVX2-NEXT:    [[TMP6:%.*]] = or i64 [[TMP5]], 48
125; AVX2-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[TMP0]]
126; AVX2-NEXT:    [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP2]]
127; AVX2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP4]]
128; AVX2-NEXT:    [[TMP10:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP6]]
129; AVX2-NEXT:    [[TMP11:%.*]] = bitcast i32* [[TMP7]] to <16 x i32>*
130; AVX2-NEXT:    [[TMP12:%.*]] = bitcast i32* [[TMP8]] to <16 x i32>*
131; AVX2-NEXT:    [[TMP13:%.*]] = bitcast i32* [[TMP9]] to <16 x i32>*
132; AVX2-NEXT:    [[TMP14:%.*]] = bitcast i32* [[TMP10]] to <16 x i32>*
133; AVX2-NEXT:    [[WIDE_VEC:%.*]] = load <16 x i32>, <16 x i32>* [[TMP11]], align 4
134; AVX2-NEXT:    [[WIDE_VEC1:%.*]] = load <16 x i32>, <16 x i32>* [[TMP12]], align 4
135; AVX2-NEXT:    [[WIDE_VEC2:%.*]] = load <16 x i32>, <16 x i32>* [[TMP13]], align 4
136; AVX2-NEXT:    [[WIDE_VEC3:%.*]] = load <16 x i32>, <16 x i32>* [[TMP14]], align 4
137; AVX2-NEXT:    [[STRIDED_VEC:%.*]] = shufflevector <16 x i32> [[WIDE_VEC]], <16 x i32> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
138; AVX2-NEXT:    [[STRIDED_VEC4:%.*]] = shufflevector <16 x i32> [[WIDE_VEC1]], <16 x i32> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
139; AVX2-NEXT:    [[STRIDED_VEC5:%.*]] = shufflevector <16 x i32> [[WIDE_VEC2]], <16 x i32> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
140; AVX2-NEXT:    [[STRIDED_VEC6:%.*]] = shufflevector <16 x i32> [[WIDE_VEC3]], <16 x i32> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
141; AVX2-NEXT:    [[STRIDED_VEC7:%.*]] = shufflevector <16 x i32> [[WIDE_VEC]], <16 x i32> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
142; AVX2-NEXT:    [[STRIDED_VEC8:%.*]] = shufflevector <16 x i32> [[WIDE_VEC1]], <16 x i32> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
143; AVX2-NEXT:    [[STRIDED_VEC9:%.*]] = shufflevector <16 x i32> [[WIDE_VEC2]], <16 x i32> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
144; AVX2-NEXT:    [[STRIDED_VEC10:%.*]] = shufflevector <16 x i32> [[WIDE_VEC3]], <16 x i32> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
145; AVX2-NEXT:    [[TMP15:%.*]] = add nsw <8 x i32> [[STRIDED_VEC7]], [[STRIDED_VEC]]
146; AVX2-NEXT:    [[TMP16:%.*]] = add nsw <8 x i32> [[STRIDED_VEC8]], [[STRIDED_VEC4]]
147; AVX2-NEXT:    [[TMP17:%.*]] = add nsw <8 x i32> [[STRIDED_VEC9]], [[STRIDED_VEC5]]
148; AVX2-NEXT:    [[TMP18:%.*]] = add nsw <8 x i32> [[STRIDED_VEC10]], [[STRIDED_VEC6]]
149; AVX2-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]]
150; AVX2-NEXT:    [[TMP20:%.*]] = bitcast i32* [[TMP19]] to <8 x i32>*
151; AVX2-NEXT:    store <8 x i32> [[TMP15]], <8 x i32>* [[TMP20]], align 4
152; AVX2-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i64 8
153; AVX2-NEXT:    [[TMP22:%.*]] = bitcast i32* [[TMP21]] to <8 x i32>*
154; AVX2-NEXT:    store <8 x i32> [[TMP16]], <8 x i32>* [[TMP22]], align 4
155; AVX2-NEXT:    [[TMP23:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i64 16
156; AVX2-NEXT:    [[TMP24:%.*]] = bitcast i32* [[TMP23]] to <8 x i32>*
157; AVX2-NEXT:    store <8 x i32> [[TMP17]], <8 x i32>* [[TMP24]], align 4
158; AVX2-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i64 24
159; AVX2-NEXT:    [[TMP26:%.*]] = bitcast i32* [[TMP25]] to <8 x i32>*
160; AVX2-NEXT:    store <8 x i32> [[TMP18]], <8 x i32>* [[TMP26]], align 4
161; AVX2-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32
162; AVX2-NEXT:    [[TMP27:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
163; AVX2-NEXT:    br i1 [[TMP27]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
164; AVX2:       middle.block:
165; AVX2-NEXT:    br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
166; AVX2:       scalar.ph:
167; AVX2-NEXT:    br label [[FOR_BODY:%.*]]
168; AVX2:       for.cond.cleanup:
169; AVX2-NEXT:    ret void
170; AVX2:       for.body:
171; AVX2-NEXT:    br i1 poison, label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
172;
173; ATOM-LABEL: @foo(
174; ATOM-NEXT:  entry:
175; ATOM-NEXT:    br label [[FOR_BODY:%.*]]
176; ATOM:       for.cond.cleanup:
177; ATOM-NEXT:    ret void
178; ATOM:       for.body:
179; ATOM-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
180; ATOM-NEXT:    [[TMP0:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 1
181; ATOM-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[TMP0]]
182; ATOM-NEXT:    [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
183; ATOM-NEXT:    [[TMP2:%.*]] = or i64 [[TMP0]], 1
184; ATOM-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP2]]
185; ATOM-NEXT:    [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4
186; ATOM-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP3]], [[TMP1]]
187; ATOM-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
188; ATOM-NEXT:    store i32 [[ADD4]], i32* [[ARRAYIDX6]], align 4
189; ATOM-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
190; ATOM-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1024
191; ATOM-NEXT:    br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
192;
193entry:
194  br label %for.body
195
196for.cond.cleanup:                                 ; preds = %for.body
197  ret void
198
199for.body:                                         ; preds = %for.body, %entry
200  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
201  %0 = shl nsw i64 %indvars.iv, 1
202  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %0
203  %1 = load i32, i32* %arrayidx, align 4
204  %2 = or i64 %0, 1
205  %arrayidx3 = getelementptr inbounds i32, i32* %b, i64 %2
206  %3 = load i32, i32* %arrayidx3, align 4
207  %add4 = add nsw i32 %3, %1
208  %arrayidx6 = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
209  store i32 %add4, i32* %arrayidx6, align 4
210  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
211  %exitcond = icmp eq i64 %indvars.iv.next, 1024
212  br i1 %exitcond, label %for.cond.cleanup, label %for.body
213}
214