1; RUN: opt -march=hexagon -loop-vectorize -hexagon-autohvx -debug-only=loop-vectorize -disable-output < %s 2>&1 | FileCheck %s 2; REQUIRES: asserts 3 4; Check that TTI::getMinimumVF works. The calculated MaxVF was based on the 5; register pressure and was less than 64. 6; CHECK: LV: Overriding calculated MaxVF({{[0-9]+}}) with target's minimum: 64 7 8target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048" 9target triple = "hexagon" 10 11%s.0 = type { i8*, i32, i32, i32, i32 } 12 13@g0 = external dso_local local_unnamed_addr global %s.0**, align 4 14 15declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #0 16declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #0 17 18; Function Attrs: nounwind 19define hidden fastcc void @f0(i8* nocapture %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i8 zeroext %a5) unnamed_addr #1 { 20b0: 21 %v0 = alloca [4 x [9 x i16]], align 8 22 %v1 = bitcast [4 x [9 x i16]]* %v0 to i8* 23 call void @llvm.lifetime.start.p0i8(i64 72, i8* nonnull %v1) #2 24 %v2 = add i32 %a1, -2 25 %v3 = add i32 %a3, -9 26 %v4 = icmp ugt i32 %v2, %v3 27 %v5 = add i32 %a2, -2 28 %v6 = add i32 %a4, -9 29 %v7 = icmp ugt i32 %v5, %v6 30 %v8 = or i1 %v4, %v7 31 %v9 = load %s.0**, %s.0*** @g0, align 4, !tbaa !1 32 %v10 = zext i8 %a5 to i32 33 %v11 = getelementptr inbounds %s.0*, %s.0** %v9, i32 %v10 34 %v12 = load %s.0*, %s.0** %v11, align 4, !tbaa !1 35 %v13 = getelementptr inbounds %s.0, %s.0* %v12, i32 0, i32 0 36 %v14 = load i8*, i8** %v13, align 4, !tbaa !5 37 br i1 %v8, label %b1, label %b2 38 39b1: ; preds = %b1, %b0 40 %v15 = phi i32 [ 0, %b0 ], [ %v119, %b1 ] 41 %v16 = add i32 %v5, %v15 42 %v17 = icmp slt i32 %v16, 0 43 %v18 = icmp slt i32 %v16, %a4 44 %v19 = select i1 %v18, i32 %v16, i32 %v3 45 %v20 = select i1 %v17, i32 0, i32 %v19 46 %v21 = mul i32 %v20, %a3 47 %v22 = add i32 97, %v21 48 %v23 = getelementptr inbounds i8, i8* %v14, i32 %v22 49 %v24 = load i8, i8* %v23, align 1, !tbaa !8 50 %v25 = zext i8 %v24 to i32 51 %v26 = add i32 101, %v21 52 %v27 = getelementptr inbounds i8, i8* %v14, i32 %v26 53 %v28 = load i8, i8* %v27, align 1, !tbaa !8 54 %v29 = zext i8 %v28 to i32 55 %v30 = mul nsw i32 %v29, -5 56 %v31 = add nsw i32 %v30, %v25 57 %v32 = add i32 106, %v21 58 %v33 = getelementptr inbounds i8, i8* %v14, i32 %v32 59 %v34 = load i8, i8* %v33, align 1, !tbaa !8 60 %v35 = zext i8 %v34 to i32 61 %v36 = mul nuw nsw i32 %v35, 20 62 %v37 = add nsw i32 %v36, %v31 63 %v38 = add i32 111, %v21 64 %v39 = getelementptr inbounds i8, i8* %v14, i32 %v38 65 %v40 = load i8, i8* %v39, align 1, !tbaa !8 66 %v41 = zext i8 %v40 to i32 67 %v42 = mul nuw nsw i32 %v41, 20 68 %v43 = add nsw i32 %v42, %v37 69 %v44 = add i32 116, %v21 70 %v45 = getelementptr inbounds i8, i8* %v14, i32 %v44 71 %v46 = load i8, i8* %v45, align 1, !tbaa !8 72 %v47 = zext i8 %v46 to i32 73 %v48 = mul nsw i32 %v47, -5 74 %v49 = add nsw i32 %v48, %v43 75 %v50 = add i32 120, %v21 76 %v51 = getelementptr inbounds i8, i8* %v14, i32 %v50 77 %v52 = load i8, i8* %v51, align 1, !tbaa !8 78 %v53 = zext i8 %v52 to i32 79 %v54 = add nsw i32 %v49, %v53 80 %v55 = trunc i32 %v54 to i16 81 %v56 = getelementptr inbounds [4 x [9 x i16]], [4 x [9 x i16]]* %v0, i32 0, i32 0, i32 %v15 82 store i16 %v55, i16* %v56, align 2, !tbaa !9 83 %v57 = mul nsw i32 %v35, -5 84 %v58 = add nsw i32 %v57, %v29 85 %v59 = add nsw i32 %v42, %v58 86 %v60 = mul nuw nsw i32 %v47, 20 87 %v61 = add nsw i32 %v60, %v59 88 %v62 = mul nsw i32 %v53, -5 89 %v63 = add nsw i32 %v62, %v61 90 %v64 = add i32 125, %v21 91 %v65 = getelementptr inbounds i8, i8* %v14, i32 %v64 92 %v66 = load i8, i8* %v65, align 1, !tbaa !8 93 %v67 = zext i8 %v66 to i32 94 %v68 = add nsw i32 %v63, %v67 95 %v69 = trunc i32 %v68 to i16 96 %v70 = getelementptr inbounds [4 x [9 x i16]], [4 x [9 x i16]]* %v0, i32 0, i32 1, i32 %v15 97 store i16 %v69, i16* %v70, align 2, !tbaa !9 98 %v71 = mul nsw i32 %v41, -5 99 %v72 = add nsw i32 %v71, %v35 100 %v73 = add nsw i32 %v60, %v72 101 %v74 = mul nuw nsw i32 %v53, 20 102 %v75 = add nsw i32 %v74, %v73 103 %v76 = mul nsw i32 %v67, -5 104 %v77 = add nsw i32 %v76, %v75 105 %v78 = add i32 130, %v21 106 %v79 = getelementptr inbounds i8, i8* %v14, i32 %v78 107 %v80 = load i8, i8* %v79, align 1, !tbaa !8 108 %v81 = zext i8 %v80 to i32 109 %v82 = add nsw i32 %v77, %v81 110 %v83 = trunc i32 %v82 to i16 111 %v84 = getelementptr inbounds [4 x [9 x i16]], [4 x [9 x i16]]* %v0, i32 0, i32 2, i32 %v15 112 store i16 %v83, i16* %v84, align 2, !tbaa !9 113 %v85 = add i32 92, %v21 114 %v86 = getelementptr inbounds i8, i8* %v14, i32 %v85 115 %v87 = load i8, i8* %v86, align 1, !tbaa !8 116 %v88 = zext i8 %v87 to i16 117 %v89 = add i32 135, %v21 118 %v90 = getelementptr inbounds i8, i8* %v14, i32 %v89 119 %v91 = load i8, i8* %v90, align 1, !tbaa !8 120 %v92 = zext i8 %v91 to i16 121 %v93 = mul nsw i16 %v92, -5 122 %v94 = add nsw i16 %v93, %v88 123 %v95 = add i32 140, %v21 124 %v96 = getelementptr inbounds i8, i8* %v14, i32 %v95 125 %v97 = load i8, i8* %v96, align 1, !tbaa !8 126 %v98 = zext i8 %v97 to i16 127 %v99 = mul nuw nsw i16 %v98, 20 128 %v100 = add nsw i16 %v99, %v94 129 %v101 = add i32 145, %v21 130 %v102 = getelementptr inbounds i8, i8* %v14, i32 %v101 131 %v103 = load i8, i8* %v102, align 1, !tbaa !8 132 %v104 = zext i8 %v103 to i16 133 %v105 = mul nuw nsw i16 %v104, 20 134 %v106 = add i16 %v105, %v100 135 %v107 = add i32 150, %v21 136 %v108 = getelementptr inbounds i8, i8* %v14, i32 %v107 137 %v109 = load i8, i8* %v108, align 1, !tbaa !8 138 %v110 = zext i8 %v109 to i16 139 %v111 = mul nsw i16 %v110, -5 140 %v112 = add i16 %v111, %v106 141 %v113 = add i32 154, %v21 142 %v114 = getelementptr inbounds i8, i8* %v14, i32 %v113 143 %v115 = load i8, i8* %v114, align 1, !tbaa !8 144 %v116 = zext i8 %v115 to i16 145 %v117 = add i16 %v112, %v116 146 %v118 = getelementptr inbounds [4 x [9 x i16]], [4 x [9 x i16]]* %v0, i32 0, i32 3, i32 %v15 147 store i16 %v117, i16* %v118, align 2, !tbaa !9 148 %v119 = add nuw nsw i32 %v15, 1 149 %v120 = icmp eq i32 %v119, 19 150 br i1 %v120, label %b2, label %b1 151 152b2: ; preds = %b1, %b0 153 call void @llvm.lifetime.end.p0i8(i64 72, i8* nonnull %v1) #2 154 ret void 155} 156 157attributes #0 = { argmemonly nounwind } 158attributes #1 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" } 159attributes #2 = { nounwind } 160 161!llvm.module.flags = !{!0} 162 163!0 = !{i32 1, !"wchar_size", i32 4} 164!1 = !{!2, !2, i64 0} 165!2 = !{!"any pointer", !3, i64 0} 166!3 = !{!"omnipotent char", !4, i64 0} 167!4 = !{!"Simple C/C++ TBAA"} 168!5 = !{!6, !2, i64 0} 169!6 = !{!"", !2, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16} 170!7 = !{!"int", !3, i64 0} 171!8 = !{!3, !3, i64 0} 172!9 = !{!10, !10, i64 0} 173!10 = !{!"short", !3, i64 0} 174