1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -passes=instsimplify < %s | FileCheck %s
3
4define i1 @f16_si_max1(half %f) {
5; CHECK-LABEL: @f16_si_max1(
6; CHECK-NEXT:    [[I:%.*]] = fptosi half [[F:%.*]] to i32
7; CHECK-NEXT:    [[C:%.*]] = icmp sge i32 [[I]], 65504
8; CHECK-NEXT:    ret i1 [[C]]
9;
10  %i = fptosi half %f to i32
11  %c = icmp sge i32 %i, 65504
12  ret i1 %c
13}
14
15define i1 @f16_si_max2(half %f) {
16; CHECK-LABEL: @f16_si_max2(
17; CHECK-NEXT:    ret i1 false
18;
19  %i = fptosi half %f to i32
20  %c = icmp sgt i32 %i, 65504
21  ret i1 %c
22}
23
24define i1 @f16_si16_max2(half %f) {
25; CHECK-LABEL: @f16_si16_max2(
26; CHECK-NEXT:    [[I:%.*]] = fptosi half [[F:%.*]] to i16
27; CHECK-NEXT:    [[C:%.*]] = icmp sgt i16 [[I]], -32
28; CHECK-NEXT:    ret i1 [[C]]
29;
30  %i = fptosi half %f to i16
31  %c = icmp sgt i16 %i, 65504
32  ret i1 %c
33}
34
35define i1 @f16_si_min1(half %f) {
36; CHECK-LABEL: @f16_si_min1(
37; CHECK-NEXT:    ret i1 true
38;
39  %i = fptosi half %f to i32
40  %c = icmp sge i32 %i, -65504
41  ret i1 %c
42}
43
44define i1 @f16_si16_min1(half %f) {
45; CHECK-LABEL: @f16_si16_min1(
46; CHECK-NEXT:    [[I:%.*]] = fptosi half [[F:%.*]] to i16
47; CHECK-NEXT:    [[C:%.*]] = icmp sge i16 [[I]], 32
48; CHECK-NEXT:    ret i1 [[C]]
49;
50  %i = fptosi half %f to i16
51  %c = icmp sge i16 %i, -65504
52  ret i1 %c
53}
54
55define i1 @f16_si_min2(half %f) {
56; CHECK-LABEL: @f16_si_min2(
57; CHECK-NEXT:    [[I:%.*]] = fptosi half [[F:%.*]] to i32
58; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[I]], -65504
59; CHECK-NEXT:    ret i1 [[C]]
60;
61  %i = fptosi half %f to i32
62  %c = icmp sgt i32 %i, -65504
63  ret i1 %c
64}
65
66define i1 @f16_ui_max1(half %f) {
67; CHECK-LABEL: @f16_ui_max1(
68; CHECK-NEXT:    [[I:%.*]] = fptoui half [[F:%.*]] to i32
69; CHECK-NEXT:    [[C:%.*]] = icmp sge i32 [[I]], 65504
70; CHECK-NEXT:    ret i1 [[C]]
71;
72  %i = fptoui half %f to i32
73  %c = icmp sge i32 %i, 65504
74  ret i1 %c
75}
76
77define i1 @f16_ui_max2(half %f) {
78; CHECK-LABEL: @f16_ui_max2(
79; CHECK-NEXT:    ret i1 false
80;
81  %i = fptoui half %f to i32
82  %c = icmp sgt i32 %i, 65504
83  ret i1 %c
84}
85
86define i1 @f16_ui16_max2(half %f) {
87; CHECK-LABEL: @f16_ui16_max2(
88; CHECK-NEXT:    [[I:%.*]] = fptoui half [[F:%.*]] to i16
89; CHECK-NEXT:    [[C:%.*]] = icmp sgt i16 [[I]], -32
90; CHECK-NEXT:    ret i1 [[C]]
91;
92  %i = fptoui half %f to i16
93  %c = icmp sgt i16 %i, 65504
94  ret i1 %c
95}
96
97define i1 @f16_ui16_max3(half %f) {
98; CHECK-LABEL: @f16_ui16_max3(
99; CHECK-NEXT:    ret i1 true
100;
101  %i = fptoui half %f to i16
102  %c = icmp ule i16 %i, 65504
103  ret i1 %c
104}
105
106define i1 @f16_ui_min1(half %f) {
107; CHECK-LABEL: @f16_ui_min1(
108; CHECK-NEXT:    ret i1 true
109;
110  %i = fptoui half %f to i32
111  %c = icmp sge i32 %i, 0
112  ret i1 %c
113}
114
115define i1 @f16_ui16_min1(half %f) {
116; CHECK-LABEL: @f16_ui16_min1(
117; CHECK-NEXT:    [[I:%.*]] = fptoui half [[F:%.*]] to i16
118; CHECK-NEXT:    [[C:%.*]] = icmp sge i16 [[I]], 0
119; CHECK-NEXT:    ret i1 [[C]]
120;
121  %i = fptoui half %f to i16
122  %c = icmp sge i16 %i, 0
123  ret i1 %c
124}
125
126define i1 @f16_ui_min2(half %f) {
127; CHECK-LABEL: @f16_ui_min2(
128; CHECK-NEXT:    [[I:%.*]] = fptoui half [[F:%.*]] to i32
129; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[I]], 0
130; CHECK-NEXT:    ret i1 [[C]]
131;
132  %i = fptoui half %f to i32
133  %c = icmp sgt i32 %i, 0
134  ret i1 %c
135}
136
137
138
139define <2 x i1> @v2f16_si_max(<2 x half> %f) {
140; CHECK-LABEL: @v2f16_si_max(
141; CHECK-NEXT:    [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i32>
142; CHECK-NEXT:    [[C:%.*]] = icmp sge <2 x i32> [[I]], <i32 65504, i32 65504>
143; CHECK-NEXT:    ret <2 x i1> [[C]]
144;
145  %i = fptosi <2 x half> %f to <2 x i32>
146  %c = icmp sge <2 x i32> %i, <i32 65504, i32 65504>
147  ret <2 x i1> %c
148}
149
150define <2 x i1> @v2f16_si_max2(<2 x half> %f) {
151; CHECK-LABEL: @v2f16_si_max2(
152; CHECK-NEXT:    ret <2 x i1> zeroinitializer
153;
154  %i = fptosi <2 x half> %f to <2 x i32>
155  %c = icmp sgt <2 x i32> %i, <i32 65504, i32 65504>
156  ret <2 x i1> %c
157}
158
159define <2 x i1> @v2f16_si16_max2(<2 x half> %f) {
160; CHECK-LABEL: @v2f16_si16_max2(
161; CHECK-NEXT:    [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i16>
162; CHECK-NEXT:    [[C:%.*]] = icmp sgt <2 x i16> [[I]], <i16 -32, i16 -32>
163; CHECK-NEXT:    ret <2 x i1> [[C]]
164;
165  %i = fptosi <2 x half> %f to <2 x i16>
166  %c = icmp sgt <2 x i16> %i, <i16 65504, i16 65504>
167  ret <2 x i1> %c
168}
169
170define <2 x i1> @v2f16_si_min1(<2 x half> %f) {
171; CHECK-LABEL: @v2f16_si_min1(
172; CHECK-NEXT:    ret <2 x i1> <i1 true, i1 true>
173;
174  %i = fptosi <2 x half> %f to <2 x i32>
175  %c = icmp sge <2 x i32> %i, <i32 -65504, i32 -65504>
176  ret <2 x i1> %c
177}
178
179define <2 x i1> @v2f16_si16_min1(<2 x half> %f) {
180; CHECK-LABEL: @v2f16_si16_min1(
181; CHECK-NEXT:    [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i16>
182; CHECK-NEXT:    [[C:%.*]] = icmp sge <2 x i16> [[I]], <i16 32, i16 32>
183; CHECK-NEXT:    ret <2 x i1> [[C]]
184;
185  %i = fptosi <2 x half> %f to <2 x i16>
186  %c = icmp sge <2 x i16> %i, <i16 -65504, i16 -65504>
187  ret <2 x i1> %c
188}
189
190define <2 x i1> @v2f16_si_min2(<2 x half> %f) {
191; CHECK-LABEL: @v2f16_si_min2(
192; CHECK-NEXT:    [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i32>
193; CHECK-NEXT:    [[C:%.*]] = icmp sgt <2 x i32> [[I]], <i32 -65504, i32 -65504>
194; CHECK-NEXT:    ret <2 x i1> [[C]]
195;
196  %i = fptosi <2 x half> %f to <2 x i32>
197  %c = icmp sgt <2 x i32> %i, <i32 -65504, i32 -65504>
198  ret <2 x i1> %c
199}
200
201define <2 x i1> @v2f16_ui_max1(<2 x half> %f) {
202; CHECK-LABEL: @v2f16_ui_max1(
203; CHECK-NEXT:    [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i32>
204; CHECK-NEXT:    [[C:%.*]] = icmp sge <2 x i32> [[I]], <i32 65504, i32 65504>
205; CHECK-NEXT:    ret <2 x i1> [[C]]
206;
207  %i = fptoui <2 x half> %f to <2 x i32>
208  %c = icmp sge <2 x i32> %i, <i32 65504, i32 65504>
209  ret <2 x i1> %c
210}
211
212define <2 x i1> @v2f16_ui_max2(<2 x half> %f) {
213; CHECK-LABEL: @v2f16_ui_max2(
214; CHECK-NEXT:    ret <2 x i1> zeroinitializer
215;
216  %i = fptoui <2 x half> %f to <2 x i32>
217  %c = icmp sgt <2 x i32> %i, <i32 65504, i32 65504>
218  ret <2 x i1> %c
219}
220
221define <2 x i1> @v2f16_ui16_max2(<2 x half> %f) {
222; CHECK-LABEL: @v2f16_ui16_max2(
223; CHECK-NEXT:    [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i16>
224; CHECK-NEXT:    [[C:%.*]] = icmp sgt <2 x i16> [[I]], <i16 -32, i16 -32>
225; CHECK-NEXT:    ret <2 x i1> [[C]]
226;
227  %i = fptoui <2 x half> %f to <2 x i16>
228  %c = icmp sgt <2 x i16> %i, <i16 65504, i16 65504>
229  ret <2 x i1> %c
230}
231
232define <2 x i1> @v2f16_ui16_max3(<2 x half> %f) {
233; CHECK-LABEL: @v2f16_ui16_max3(
234; CHECK-NEXT:    ret <2 x i1> <i1 true, i1 true>
235;
236  %i = fptoui <2 x half> %f to <2 x i16>
237  %c = icmp ule <2 x i16> %i, <i16 65504, i16 65504>
238  ret <2 x i1> %c
239}
240
241define <2 x i1> @v2f16_ui_min1(<2 x half> %f) {
242; CHECK-LABEL: @v2f16_ui_min1(
243; CHECK-NEXT:    ret <2 x i1> <i1 true, i1 true>
244;
245  %i = fptoui <2 x half> %f to <2 x i32>
246  %c = icmp sge <2 x i32> %i, <i32 0, i32 0>
247  ret <2 x i1> %c
248}
249
250define <2 x i1> @v2f16_ui16_min1(<2 x half> %f) {
251; CHECK-LABEL: @v2f16_ui16_min1(
252; CHECK-NEXT:    [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i16>
253; CHECK-NEXT:    [[C:%.*]] = icmp sge <2 x i16> [[I]], zeroinitializer
254; CHECK-NEXT:    ret <2 x i1> [[C]]
255;
256  %i = fptoui <2 x half> %f to <2 x i16>
257  %c = icmp sge <2 x i16> %i, <i16 0, i16 0>
258  ret <2 x i1> %c
259}
260
261define <2 x i1> @v2f16_ui_min2(<2 x half> %f) {
262; CHECK-LABEL: @v2f16_ui_min2(
263; CHECK-NEXT:    [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i32>
264; CHECK-NEXT:    [[C:%.*]] = icmp sgt <2 x i32> [[I]], zeroinitializer
265; CHECK-NEXT:    ret <2 x i1> [[C]]
266;
267  %i = fptoui <2 x half> %f to <2 x i32>
268  %c = icmp sgt <2 x i32> %i, <i32 0, i32 0>
269  ret <2 x i1> %c
270}
271
272declare i32 @llvm.fptosi.sat.i32.f16(half)
273declare i32 @llvm.fptoui.sat.i32.f16(half)
274declare <2 x i32> @llvm.fptosi.sat.v2i32.v2f16(<2 x half>)
275declare <2 x i32> @llvm.fptoui.sat.v2i32.v2f16(<2 x half>)
276