1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-globals 2; call site specific analysis is enabled 3 4; RUN: opt -attributor -enable-new-pm=0 -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM 5 6; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM 7 8; RUN: opt -attributor-cgscc -attributor-enable-call-site-specific-deduction=true -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM 9 10; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM 11 12define i32 @test_range(i32 %unknown) { 13; CHECK-LABEL: define {{[^@]+}}@test_range 14; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0:[0-9]+]] { 15; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[UNKNOWN]], 100 16; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 100, i32 0 17; CHECK-NEXT: ret i32 [[TMP2]] 18; 19 %1 = icmp sgt i32 %unknown, 100 20 %2 = select i1 %1, i32 100, i32 0 21 ret i32 %2 22} 23 24define i32 @test1(i32 %unknown, i32 %b) { 25; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 26; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { 27; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR0]], !range [[RNG0:![0-9]+]] 28; IS__TUNIT____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]] 29; IS__TUNIT____-NEXT: ret i32 [[TMP2]] 30; 31; IS__CGSCC____-LABEL: define {{[^@]+}}@test1 32; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { 33; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]] 34; IS__CGSCC____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]] 35; IS__CGSCC____-NEXT: ret i32 [[TMP2]] 36; 37 %1 = call i32 @test_range(i32 %unknown) 38 %2 = sub nsw i32 %1, %b 39 ret i32 %2 40} 41 42define i32 @test2(i32 %unknown, i32 %b) { 43; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 44; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { 45; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR0]], !range [[RNG0]] 46; IS__TUNIT____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]] 47; IS__TUNIT____-NEXT: ret i32 [[TMP2]] 48; 49; IS__CGSCC____-LABEL: define {{[^@]+}}@test2 50; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { 51; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1]], !range [[RNG0]] 52; IS__CGSCC____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]] 53; IS__CGSCC____-NEXT: ret i32 [[TMP2]] 54; 55 %1 = call i32 @test_range(i32 %unknown) 56 %2 = add nsw i32 %1, %b 57 ret i32 %2 58} 59 60; Positive checks 61 62define i32 @test1_pcheck(i32 %unknown) { 63; CHECK-LABEL: define {{[^@]+}}@test1_pcheck 64; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 65; CHECK-NEXT: ret i32 1 66; 67 %1 = call i32 @test1(i32 %unknown, i32 20) 68 %2 = icmp sle i32 %1, 90 69 %3 = zext i1 %2 to i32 70 ret i32 %3 71} 72 73define i32 @test2_pcheck(i32 %unknown) { 74; CHECK-LABEL: define {{[^@]+}}@test2_pcheck 75; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 76; CHECK-NEXT: ret i32 1 77; 78 %1 = call i32 @test2(i32 %unknown, i32 20) 79 %2 = icmp sge i32 %1, 20 80 %3 = zext i1 %2 to i32 81 ret i32 %3 82} 83 84; Negative checks 85 86define i32 @test1_ncheck(i32 %unknown) { 87; IS__TUNIT____-LABEL: define {{[^@]+}}@test1_ncheck 88; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 89; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR0]], !range [[RNG1:![0-9]+]] 90; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10 91; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 92; IS__TUNIT____-NEXT: ret i32 [[TMP3]] 93; 94; IS__CGSCC____-LABEL: define {{[^@]+}}@test1_ncheck 95; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 96; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR1]], !range [[RNG1:![0-9]+]] 97; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10 98; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 99; IS__CGSCC____-NEXT: ret i32 [[TMP3]] 100; 101 %1 = call i32 @test1(i32 %unknown, i32 20) 102 %2 = icmp sle i32 %1, 10 103 %3 = zext i1 %2 to i32 104 ret i32 %3 105} 106 107define i32 @test2_ncheck(i32 %unknown) { 108; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_ncheck 109; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 110; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR0]], !range [[RNG2:![0-9]+]] 111; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30 112; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 113; IS__TUNIT____-NEXT: ret i32 [[TMP3]] 114; 115; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_ncheck 116; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 117; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR1]], !range [[RNG2:![0-9]+]] 118; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30 119; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 120; IS__CGSCC____-NEXT: ret i32 [[TMP3]] 121; 122 %1 = call i32 @test2(i32 %unknown, i32 20) 123 %2 = icmp sge i32 %1, 30 124 %3 = zext i1 %2 to i32 125 ret i32 %3 126} 127;. 128; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } 129;. 130; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } 131; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn } 132;. 133; CHECK: [[META0:![0-9]+]] = !{i32 0, i32 101} 134; CHECK: [[META1:![0-9]+]] = !{i32 -20, i32 81} 135; CHECK: [[META2:![0-9]+]] = !{i32 20, i32 121} 136;. 137