1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-globals 2; call site specific analysis is enabled 3 4; RUN: opt -attributor -enable-new-pm=0 -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM 5 6; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM 7 8; RUN: opt -attributor-cgscc -attributor-enable-call-site-specific-deduction=true -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM 9 10; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM 11 12define i32 @test_range(i32 %unknown) { 13; CHECK-LABEL: define {{[^@]+}}@test_range 14; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0:[0-9]+]] { 15; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[UNKNOWN]], 100 16; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 100, i32 0 17; CHECK-NEXT: ret i32 [[TMP2]] 18; 19 %1 = icmp sgt i32 %unknown, 100 20 %2 = select i1 %1, i32 100, i32 0 21 ret i32 %2 22} 23 24define i32 @test1(i32 %unknown, i32 %b) { 25; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 26; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { 27; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) 28; IS__TUNIT____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]] 29; IS__TUNIT____-NEXT: ret i32 [[TMP2]] 30; 31; IS__CGSCC____-LABEL: define {{[^@]+}}@test1 32; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR1:[0-9]+]] { 33; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) 34; IS__CGSCC____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]] 35; IS__CGSCC____-NEXT: ret i32 [[TMP2]] 36; 37 %1 = call i32 @test_range(i32 %unknown) 38 %2 = sub nsw i32 %1, %b 39 ret i32 %2 40} 41 42define i32 @test2(i32 %unknown, i32 %b) { 43; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 44; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { 45; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) 46; IS__TUNIT____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]] 47; IS__TUNIT____-NEXT: ret i32 [[TMP2]] 48; 49; IS__CGSCC____-LABEL: define {{[^@]+}}@test2 50; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR1]] { 51; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) 52; IS__CGSCC____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]] 53; IS__CGSCC____-NEXT: ret i32 [[TMP2]] 54; 55 %1 = call i32 @test_range(i32 %unknown) 56 %2 = add nsw i32 %1, %b 57 ret i32 %2 58} 59 60; Positive checks 61 62; FIXME: AAValueSimplify preserves the context but simplifies to a value in the other function, I think. 63; Either way, as we settle on the new AAValueSimplifyReturned scheme that replaces AAReturnedValues 64; we need to look into this again. For the purpose of making some progress we take this regression 65; for now, call site contexts are not on by default anyway (yet). 66define i32 @test1_pcheck(i32 %unknown) { 67; IS__TUNIT____-LABEL: define {{[^@]+}}@test1_pcheck 68; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 69; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) 70; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 90 71; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 72; IS__TUNIT____-NEXT: ret i32 [[TMP3]] 73; 74; IS__CGSCC____-LABEL: define {{[^@]+}}@test1_pcheck 75; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR1]] { 76; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) 77; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 90 78; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 79; IS__CGSCC____-NEXT: ret i32 [[TMP3]] 80; 81 %1 = call i32 @test1(i32 %unknown, i32 20) 82 %2 = icmp sle i32 %1, 90 83 %3 = zext i1 %2 to i32 84 ret i32 %3 85} 86 87define i32 @test2_pcheck(i32 %unknown) { 88; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_pcheck 89; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 90; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) 91; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 20 92; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 93; IS__TUNIT____-NEXT: ret i32 [[TMP3]] 94; 95; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_pcheck 96; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR1]] { 97; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) 98; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 20 99; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 100; IS__CGSCC____-NEXT: ret i32 [[TMP3]] 101; 102 %1 = call i32 @test2(i32 %unknown, i32 20) 103 %2 = icmp sge i32 %1, 20 104 %3 = zext i1 %2 to i32 105 ret i32 %3 106} 107 108; Negative checks 109 110define i32 @test1_ncheck(i32 %unknown) { 111; IS__TUNIT____-LABEL: define {{[^@]+}}@test1_ncheck 112; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 113; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) 114; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10 115; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 116; IS__TUNIT____-NEXT: ret i32 [[TMP3]] 117; 118; IS__CGSCC____-LABEL: define {{[^@]+}}@test1_ncheck 119; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR1]] { 120; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) 121; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10 122; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 123; IS__CGSCC____-NEXT: ret i32 [[TMP3]] 124; 125 %1 = call i32 @test1(i32 %unknown, i32 20) 126 %2 = icmp sle i32 %1, 10 127 %3 = zext i1 %2 to i32 128 ret i32 %3 129} 130 131define i32 @test2_ncheck(i32 %unknown) { 132; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_ncheck 133; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { 134; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) 135; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30 136; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 137; IS__TUNIT____-NEXT: ret i32 [[TMP3]] 138; 139; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_ncheck 140; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR1]] { 141; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) 142; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30 143; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 144; IS__CGSCC____-NEXT: ret i32 [[TMP3]] 145; 146 %1 = call i32 @test2(i32 %unknown, i32 20) 147 %2 = icmp sge i32 %1, 30 148 %3 = zext i1 %2 to i32 149 ret i32 %3 150} 151;. 152; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } 153; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone willreturn } 154;. 155; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } 156; IS__CGSCC____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } 157; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { readnone willreturn } 158;. 159