1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -mtriple=hexagon-- -atomic-expand %s | FileCheck %s
3
4define float @test_atomicrmw_fadd_f32(float* %ptr, float %value) {
5; CHECK-LABEL: @test_atomicrmw_fadd_f32(
6; CHECK-NEXT:    br label [[ATOMICRMW_START:%.*]]
7; CHECK:       atomicrmw.start:
8; CHECK-NEXT:    [[TMP1:%.*]] = bitcast float* [[PTR:%.*]] to i32*
9; CHECK-NEXT:    [[LARX:%.*]] = call i32 @llvm.hexagon.L2.loadw.locked(i32* [[TMP1]])
10; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32 [[LARX]] to float
11; CHECK-NEXT:    [[NEW:%.*]] = fadd float [[TMP2]], [[VALUE:%.*]]
12; CHECK-NEXT:    [[TMP3:%.*]] = bitcast float* [[PTR]] to i32*
13; CHECK-NEXT:    [[TMP4:%.*]] = bitcast float [[NEW]] to i32
14; CHECK-NEXT:    [[STCX:%.*]] = call i32 @llvm.hexagon.S2.storew.locked(i32* [[TMP3]], i32 [[TMP4]])
15; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i32 [[STCX]], 0
16; CHECK-NEXT:    [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
17; CHECK-NEXT:    [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP6]], 0
18; CHECK-NEXT:    br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
19; CHECK:       atomicrmw.end:
20; CHECK-NEXT:    ret float [[TMP2]]
21;
22  %res = atomicrmw fadd float* %ptr, float %value seq_cst
23  ret float %res
24}
25
26define float @test_atomicrmw_fsub_f32(float* %ptr, float %value) {
27; CHECK-LABEL: @test_atomicrmw_fsub_f32(
28; CHECK-NEXT:    br label [[ATOMICRMW_START:%.*]]
29; CHECK:       atomicrmw.start:
30; CHECK-NEXT:    [[TMP1:%.*]] = bitcast float* [[PTR:%.*]] to i32*
31; CHECK-NEXT:    [[LARX:%.*]] = call i32 @llvm.hexagon.L2.loadw.locked(i32* [[TMP1]])
32; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32 [[LARX]] to float
33; CHECK-NEXT:    [[NEW:%.*]] = fsub float [[TMP2]], [[VALUE:%.*]]
34; CHECK-NEXT:    [[TMP3:%.*]] = bitcast float* [[PTR]] to i32*
35; CHECK-NEXT:    [[TMP4:%.*]] = bitcast float [[NEW]] to i32
36; CHECK-NEXT:    [[STCX:%.*]] = call i32 @llvm.hexagon.S2.storew.locked(i32* [[TMP3]], i32 [[TMP4]])
37; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i32 [[STCX]], 0
38; CHECK-NEXT:    [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
39; CHECK-NEXT:    [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP6]], 0
40; CHECK-NEXT:    br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
41; CHECK:       atomicrmw.end:
42; CHECK-NEXT:    ret float [[TMP2]]
43;
44  %res = atomicrmw fsub float* %ptr, float %value seq_cst
45  ret float %res
46}
47
48