1 2; RUN: opt < %s -msan-check-access-address=0 -msan-track-origins=1 -S -passes='module(msan-module),function(msan)' 2>&1 | \ 3; RUN: FileCheck -allow-deprecated-dag-overlap --check-prefix=CHECK %s 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 6target triple = "x86_64-unknown-linux-gnu" 7 8declare i32 @llvm.vector.reduce.add(<3 x i32>) 9declare i32 @llvm.vector.reduce.and(<3 x i32>) 10declare i32 @llvm.vector.reduce.or(<3 x i32>) 11 12; CHECK-LABEL: @reduce_add 13define i32 @reduce_add() sanitize_memory { 14; CHECK: [[P:%.*]] = inttoptr i64 0 to <3 x i32>* 15 %p = inttoptr i64 0 to <3 x i32> * 16; CHECK: [[O:%.*]] = load <3 x i32>, <3 x i32>* [[P]] 17 %o = load <3 x i32>, <3 x i32> *%p 18; CHECK: [[O_SHADOW:%.*]] = load <3 x i32>, <3 x i32>* 19; CHECK: [[O_ORIGIN:%.*]] = load i32, i32* 20; CHECK: [[R_SHADOW:%.*]] = call i32 @llvm.vector.reduce.or.v3i32(<3 x i32> [[O_SHADOW]]) 21; CHECK: [[R:%.*]] = call i32 @llvm.vector.reduce.add.v3i32(<3 x i32> [[O]]) 22 %r = call i32 @llvm.vector.reduce.add(<3 x i32> %o) 23; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls 24; CHECK: store i32 [[O_ORIGIN]], {{.*}} @__msan_retval_origin_tls 25; CHECK: ret i32 [[R]] 26 ret i32 %r 27} 28 29; CHECK-LABEL: @reduce_and 30define i32 @reduce_and() sanitize_memory { 31; CHECK: [[P:%.*]] = inttoptr i64 0 to <3 x i32>* 32 %p = inttoptr i64 0 to <3 x i32> * 33; CHECK: [[O:%.*]] = load <3 x i32>, <3 x i32>* [[P]] 34 %o = load <3 x i32>, <3 x i32> *%p 35; CHECK: [[O_SHADOW:%.*]] = load <3 x i32>, <3 x i32>* 36; CHECK: [[O_ORIGIN:%.*]] = load i32, i32* 37; CHECK: [[O_SHADOW_1:%.*]] = or <3 x i32> [[O]], [[O_SHADOW]] 38; CHECK: [[O_SHADOW_2:%.*]] = call i32 @llvm.vector.reduce.and.v3i32(<3 x i32> [[O_SHADOW_1]] 39; CHECK: [[O_SHADOW_3:%.*]] = call i32 @llvm.vector.reduce.or.v3i32(<3 x i32> [[O_SHADOW]]) 40; CHECK: [[R_SHADOW:%.*]] = and i32 [[O_SHADOW_2]], [[O_SHADOW_3]] 41; CHECK: [[R:%.*]] = call i32 @llvm.vector.reduce.and.v3i32(<3 x i32> [[O]]) 42 %r = call i32 @llvm.vector.reduce.and(<3 x i32> %o) 43; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls 44; CHECK: store i32 [[O_ORIGIN]], {{.*}} @__msan_retval_origin_tls 45; CHECK: ret i32 [[R]] 46 ret i32 %r 47} 48 49; CHECK-LABEL: @reduce_or 50define i32 @reduce_or() sanitize_memory { 51; CHECK: [[P:%.*]] = inttoptr i64 0 to <3 x i32>* 52 %p = inttoptr i64 0 to <3 x i32> * 53; CHECK: [[O:%.*]] = load <3 x i32>, <3 x i32>* [[P]] 54 %o = load <3 x i32>, <3 x i32> *%p 55; CHECK: [[O_SHADOW:%.*]] = load <3 x i32>, <3 x i32>* 56; CHECK: [[O_ORIGIN:%.*]] = load i32, i32* 57; CHECK: [[NOT_O:%.*]] = xor <3 x i32> [[O]], <i32 -1, i32 -1, i32 -1> 58; CHECK: [[O_SHADOW_1:%.*]] = or <3 x i32> [[NOT_O]], [[O_SHADOW]] 59; CHECK: [[O_SHADOW_2:%.*]] = call i32 @llvm.vector.reduce.and.v3i32(<3 x i32> [[O_SHADOW_1]] 60; CHECK: [[O_SHADOW_3:%.*]] = call i32 @llvm.vector.reduce.or.v3i32(<3 x i32> [[O_SHADOW]]) 61; CHECK: [[R_SHADOW:%.*]] = and i32 [[O_SHADOW_2]], [[O_SHADOW_3]] 62; CHECK: [[R:%.*]] = call i32 @llvm.vector.reduce.or.v3i32(<3 x i32> [[O]]) 63 %r = call i32 @llvm.vector.reduce.or(<3 x i32> %o) 64; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls 65; CHECK: store i32 [[O_ORIGIN]], {{.*}} @__msan_retval_origin_tls 66; CHECK: ret i32 [[R]] 67 ret i32 %r 68} 69