1; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck \ 2; RUN: %s 3; REQUIRES: x86-registered-target 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 6target triple = "x86_64-unknown-linux-gnu" 7 8declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) 9declare i32 @llvm.x86.bmi.bextr.32(i32, i32) 10declare i32 @llvm.x86.bmi.pdep.32(i32, i32) 11declare i32 @llvm.x86.bmi.pext.32(i32, i32) 12 13declare i64 @llvm.x86.bmi.bzhi.64(i64, i64) 14declare i64 @llvm.x86.bmi.bextr.64(i64, i64) 15declare i64 @llvm.x86.bmi.pdep.64(i64, i64) 16declare i64 @llvm.x86.bmi.pext.64(i64, i64) 17 18define i32 @Test_bzhi_32(i32 %a, i32 %b) sanitize_memory { 19entry: 20 %c = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %a, i32 %b) 21 ret i32 %c 22} 23 24; CHECK-LABEL: @Test_bzhi_32( 25; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls 26; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8) 27; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0 28; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32 29; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.bzhi.32(i32 %[[SA]], i32 %b) 30; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]] 31; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls 32; CHECK: ret i32 33 34define i64 @Test_bzhi_64(i64 %a, i64 %b) sanitize_memory { 35entry: 36 %c = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %a, i64 %b) 37 ret i64 %c 38} 39 40; CHECK-LABEL: @Test_bzhi_64( 41; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls 42; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8) 43; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0 44; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64 45; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.bzhi.64(i64 %[[SA]], i64 %b) 46; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]] 47; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls 48; CHECK: ret i64 49 50 51define i32 @Test_bextr_32(i32 %a, i32 %b) sanitize_memory { 52entry: 53 %c = tail call i32 @llvm.x86.bmi.bextr.32(i32 %a, i32 %b) 54 ret i32 %c 55} 56 57; CHECK-LABEL: @Test_bextr_32( 58; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls 59; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8) 60; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0 61; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32 62; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.bextr.32(i32 %[[SA]], i32 %b) 63; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]] 64; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls 65; CHECK: ret i32 66 67define i64 @Test_bextr_64(i64 %a, i64 %b) sanitize_memory { 68entry: 69 %c = tail call i64 @llvm.x86.bmi.bextr.64(i64 %a, i64 %b) 70 ret i64 %c 71} 72 73; CHECK-LABEL: @Test_bextr_64( 74; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls 75; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8) 76; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0 77; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64 78; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.bextr.64(i64 %[[SA]], i64 %b) 79; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]] 80; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls 81; CHECK: ret i64 82 83 84define i32 @Test_pdep_32(i32 %a, i32 %b) sanitize_memory { 85entry: 86 %c = tail call i32 @llvm.x86.bmi.pdep.32(i32 %a, i32 %b) 87 ret i32 %c 88} 89 90; CHECK-LABEL: @Test_pdep_32( 91; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls 92; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8) 93; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0 94; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32 95; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.pdep.32(i32 %[[SA]], i32 %b) 96; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]] 97; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls 98; CHECK: ret i32 99 100define i64 @Test_pdep_64(i64 %a, i64 %b) sanitize_memory { 101entry: 102 %c = tail call i64 @llvm.x86.bmi.pdep.64(i64 %a, i64 %b) 103 ret i64 %c 104} 105 106; CHECK-LABEL: @Test_pdep_64( 107; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls 108; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8) 109; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0 110; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64 111; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.pdep.64(i64 %[[SA]], i64 %b) 112; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]] 113; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls 114; CHECK: ret i64 115 116define i32 @Test_pext_32(i32 %a, i32 %b) sanitize_memory { 117entry: 118 %c = tail call i32 @llvm.x86.bmi.pext.32(i32 %a, i32 %b) 119 ret i32 %c 120} 121 122; CHECK-LABEL: @Test_pext_32( 123; CHECK-DAG: %[[SA:.*]] = load i32, ptr @__msan_param_tls 124; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8) 125; CHECK-DAG: %[[SB0:.*]] = icmp ne i32 %[[SB]], 0 126; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i32 127; CHECK-DAG: %[[X:.*]] = call i32 @llvm.x86.bmi.pext.32(i32 %[[SA]], i32 %b) 128; CHECK-DAG: %[[S:.*]] = or i32 %[[SB1]], %[[X]] 129; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls 130; CHECK: ret i32 131 132define i64 @Test_pext_64(i64 %a, i64 %b) sanitize_memory { 133entry: 134 %c = tail call i64 @llvm.x86.bmi.pext.64(i64 %a, i64 %b) 135 ret i64 %c 136} 137 138; CHECK-LABEL: @Test_pext_64( 139; CHECK-DAG: %[[SA:.*]] = load i64, ptr @__msan_param_tls 140; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8) 141; CHECK-DAG: %[[SB0:.*]] = icmp ne i64 %[[SB]], 0 142; CHECK-DAG: %[[SB1:.*]] = sext i1 %[[SB0]] to i64 143; CHECK-DAG: %[[X:.*]] = call i64 @llvm.x86.bmi.pext.64(i64 %[[SA]], i64 %b) 144; CHECK-DAG: %[[S:.*]] = or i64 %[[SB1]], %[[X]] 145; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls 146; CHECK: ret i64 147