1# RUN: llc -mtriple=x86_64-- -run-pass=regallocfast -o - %s | FileCheck %s 2 3# Check that fastregalloc does not displace register assigned to tied def when 4# RegMask operand is present. STATEPOINT is an example of such instruction. 5# Tied def/use must be assigned to the same register. 6--- 7name: test_relocate 8tracksRegLiveness: true 9body: | 10 bb.0.entry: 11 liveins: $rdi 12 13 ; CHECK: renamable [[REG:\$[a-z0-9]+]] = STATEPOINT 0, 0, 0, target-flags(x86-plt) 0, 2, 0, 2, 0, 2, 0, 2, 1, renamable [[REG]](tied-def 0) 14 15 %1:gr64 = COPY $rdi 16 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp 17 %1:gr64 = STATEPOINT 0, 0, 0, target-flags(x86-plt) 0, 2, 0, 2, 0, 2, 0, 2, 1, %1(tied-def 0), 2, 0, 2, 1, 0, 0, csr_64, implicit-def $rsp, implicit-def $ssp 18 ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp 19 $rax = COPY %1 20 RET 0, killed $rax 21... 22 23# Same as above but with multiple RegMask operands per instruction. 24# These regmasks have no real meaning and chosen to allow only single register to be assignable ($r12) 25--- 26name: test_relocate_multi_regmasks 27tracksRegLiveness: true 28body: | 29 bb.0.entry: 30 liveins: $rdi 31 32 ; CHECK: renamable $r12 = STATEPOINT 0, 0, 0, target-flags(x86-plt) 0, 2, 0, 2, 0, 2, 0, 2, 1, renamable $r12(tied-def 0) 33 34 %1:gr64 = COPY $rdi 35 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp 36 %1:gr64 = STATEPOINT 0, 0, 0, target-flags(x86-plt) 0, 2, 0, 2, 0, 2, 0, 2, 1, %1(tied-def 0), 2, 0, 2, 1, 0, 0, csr_64_rt_allregs, csr_64_hhvm, implicit-def $rsp, implicit-def $ssp 37 ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp 38 $rax = COPY %1 39 RET 0, killed $rax 40... 41