1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom    | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4; RUN: llc < %s -mtriple=i386-intel-elfiamcu                 | FileCheck %s --check-prefix=MCU
5
6; PR5757
7%0 = type { i64, i32 }
8
9define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind {
10; CHECK-LABEL: test1:
11; CHECK:       ## BB#0:
12; CHECK-NEXT:    addq $8, %rdi
13; CHECK-NEXT:    addq $8, %rsi
14; CHECK-NEXT:    testb $1, %dl
15; CHECK-NEXT:    cmovneq %rdi, %rsi
16; CHECK-NEXT:    movl (%rsi), %eax
17; CHECK-NEXT:    retq
18;
19; MCU-LABEL: test1:
20; MCU:       # BB#0:
21; MCU-NEXT:    testb $1, %cl
22; MCU-NEXT:    jne .LBB0_1
23; MCU-NEXT:  # BB#2:
24; MCU-NEXT:    addl $8, %edx
25; MCU-NEXT:    movl %edx, %eax
26; MCU-NEXT:    movl (%eax), %eax
27; MCU-NEXT:    retl
28; MCU-NEXT:  .LBB0_1:
29; MCU-NEXT:    addl $8, %eax
30; MCU-NEXT:    movl (%eax), %eax
31; MCU-NEXT:    retl
32  %t0 = load %0, %0* %p
33  %t1 = load %0, %0* %q
34  %t4 = select i1 %r, %0 %t0, %0 %t1
35  %t5 = extractvalue %0 %t4, 1
36  ret i32 %t5
37}
38
39; PR2139
40define i32 @test2() nounwind {
41; GENERIC-LABEL: test2:
42; GENERIC:       ## BB#0: ## %entry
43; GENERIC-NEXT:    pushq %rax
44; GENERIC-NEXT:    callq _return_false
45; GENERIC-NEXT:    xorl %ecx, %ecx
46; GENERIC-NEXT:    testb $1, %al
47; GENERIC-NEXT:    movl $-480, %eax ## imm = 0xFE20
48; GENERIC-NEXT:    cmovnel %ecx, %eax
49; GENERIC-NEXT:    shll $3, %eax
50; GENERIC-NEXT:    cmpl $32768, %eax ## imm = 0x8000
51; GENERIC-NEXT:    jge LBB1_1
52; GENERIC-NEXT:  ## BB#2: ## %bb91
53; GENERIC-NEXT:    xorl %eax, %eax
54; GENERIC-NEXT:    popq %rcx
55; GENERIC-NEXT:    retq
56; GENERIC-NEXT:  LBB1_1: ## %bb90
57;
58; ATOM-LABEL: test2:
59; ATOM:       ## BB#0: ## %entry
60; ATOM-NEXT:    pushq %rax
61; ATOM-NEXT:    callq _return_false
62; ATOM-NEXT:    xorl %ecx, %ecx
63; ATOM-NEXT:    movl $-480, %edx ## imm = 0xFE20
64; ATOM-NEXT:    testb $1, %al
65; ATOM-NEXT:    cmovnel %ecx, %edx
66; ATOM-NEXT:    shll $3, %edx
67; ATOM-NEXT:    cmpl $32768, %edx ## imm = 0x8000
68; ATOM-NEXT:    jge LBB1_1
69; ATOM-NEXT:  ## BB#2: ## %bb91
70; ATOM-NEXT:    xorl %eax, %eax
71; ATOM-NEXT:    popq %rcx
72; ATOM-NEXT:    retq
73; ATOM-NEXT:  LBB1_1: ## %bb90
74;
75; MCU-LABEL: test2:
76; MCU:       # BB#0: # %entry
77; MCU-NEXT:    calll return_false
78; MCU-NEXT:    xorl %ecx, %ecx
79; MCU-NEXT:    testb $1, %al
80; MCU-NEXT:    jne .LBB1_2
81; MCU-NEXT:  # BB#1: # %entry
82; MCU-NEXT:    movl $-480, %ecx # imm = 0xFE20
83; MCU-NEXT:  .LBB1_2: # %entry
84; MCU-NEXT:    shll $3, %ecx
85; MCU-NEXT:    cmpl $32768, %ecx # imm = 0x8000
86; MCU-NEXT:    jge .LBB1_3
87; MCU-NEXT:  # BB#4: # %bb91
88; MCU-NEXT:    xorl %eax, %eax
89; MCU-NEXT:    retl
90; MCU-NEXT:  .LBB1_3: # %bb90
91entry:
92  %tmp73 = tail call i1 @return_false()
93  %g.0 = select i1 %tmp73, i16 0, i16 -480
94  %tmp7778 = sext i16 %g.0 to i32
95  %tmp80 = shl i32 %tmp7778, 3
96  %tmp87 = icmp sgt i32 %tmp80, 32767
97  br i1 %tmp87, label %bb90, label %bb91
98bb90:
99  unreachable
100bb91:
101  ret i32 0
102}
103
104declare i1 @return_false()
105
106;; Select between two floating point constants.
107define float @test3(i32 %x) nounwind readnone {
108; CHECK-LABEL: test3:
109; CHECK:       ## BB#0: ## %entry
110; CHECK-NEXT:    xorl %eax, %eax
111; CHECK-NEXT:    testl %edi, %edi
112; CHECK-NEXT:    sete %al
113; CHECK-NEXT:    leaq {{.*}}(%rip), %rcx
114; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
115; CHECK-NEXT:    retq
116;
117; MCU-LABEL: test3:
118; MCU:       # BB#0: # %entry
119; MCU-NEXT:    xorl %ecx, %ecx
120; MCU-NEXT:    testl %eax, %eax
121; MCU-NEXT:    sete %cl
122; MCU-NEXT:    flds {{\.LCPI.*}}(,%ecx,4)
123; MCU-NEXT:    retl
124entry:
125  %0 = icmp eq i32 %x, 0
126  %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
127  ret float %iftmp.0.0
128}
129
130define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly {
131; CHECK-LABEL: test4:
132; CHECK:       ## BB#0: ## %entry
133; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
134; CHECK-NEXT:    xorl %eax, %eax
135; CHECK-NEXT:    ucomisd %xmm0, %xmm1
136; CHECK-NEXT:    seta %al
137; CHECK-NEXT:    movsbl (%rdi,%rax,4), %eax
138; CHECK-NEXT:    retq
139;
140; MCU-LABEL: test4:
141; MCU:       # BB#0: # %entry
142; MCU-NEXT:    movl %eax, %ecx
143; MCU-NEXT:    fldl {{[0-9]+}}(%esp)
144; MCU-NEXT:    flds {{\.LCPI.*}}
145; MCU-NEXT:    fucompp
146; MCU-NEXT:    fnstsw %ax
147; MCU-NEXT:    xorl %edx, %edx
148; MCU-NEXT:    # kill: %AH<def> %AH<kill> %AX<kill>
149; MCU-NEXT:    sahf
150; MCU-NEXT:    seta %dl
151; MCU-NEXT:    movb (%ecx,%edx,4), %al
152; MCU-NEXT:    retl
153entry:
154  %0 = fcmp olt double %F, 4.200000e+01
155  %iftmp.0.0 = select i1 %0, i32 4, i32 0
156  %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0
157  %2 = load i8, i8* %1, align 1
158  ret i8 %2
159}
160
161define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind {
162; CHECK-LABEL: test5:
163; CHECK:       ## BB#0:
164; CHECK-NEXT:    testb $1, %dil
165; CHECK-NEXT:    jne LBB4_2
166; CHECK-NEXT:  ## BB#1:
167; CHECK-NEXT:    movdqa %xmm1, %xmm0
168; CHECK-NEXT:  LBB4_2:
169; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
170; CHECK-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
171; CHECK-NEXT:    movd %xmm0, (%rsi)
172; CHECK-NEXT:    retq
173;
174; MCU-LABEL: test5:
175; MCU:       # BB#0:
176; MCU-NEXT:    pushl %esi
177; MCU-NEXT:    movl {{[0-9]+}}(%esp), %esi
178; MCU-NEXT:    testb $1, %al
179; MCU-NEXT:    jne .LBB4_2
180; MCU-NEXT:  # BB#1:
181; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
182; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %edx
183; MCU-NEXT:  .LBB4_2:
184; MCU-NEXT:    movw %cx, 2(%esi)
185; MCU-NEXT:    movw %dx, (%esi)
186; MCU-NEXT:    popl %esi
187; MCU-NEXT:    retl
188  %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
189  store <2 x i16> %x, <2 x i16>* %p
190  ret void
191}
192
193; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
194define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
195; CHECK-LABEL: test6:
196; CHECK:       ## BB#0:
197; CHECK-NEXT:    testl %edi, %edi
198; CHECK-NEXT:    je LBB5_1
199; CHECK-NEXT:  ## BB#2:
200; CHECK-NEXT:    movaps (%rsi), %xmm0
201; CHECK-NEXT:    movaps %xmm0, (%rsi)
202; CHECK-NEXT:    retq
203; CHECK-NEXT:  LBB5_1:
204; CHECK-NEXT:    movaps (%rdx), %xmm0
205; CHECK-NEXT:    mulps %xmm0, %xmm0
206; CHECK-NEXT:    movaps %xmm0, (%rsi)
207; CHECK-NEXT:    retq
208;
209; MCU-LABEL: test6:
210; MCU:       # BB#0:
211; MCU-NEXT:    pushl %eax
212; MCU-NEXT:    flds 12(%edx)
213; MCU-NEXT:    fstps (%esp) # 4-byte Folded Spill
214; MCU-NEXT:    flds 8(%edx)
215; MCU-NEXT:    flds 4(%edx)
216; MCU-NEXT:    flds (%ecx)
217; MCU-NEXT:    flds 4(%ecx)
218; MCU-NEXT:    flds 8(%ecx)
219; MCU-NEXT:    flds 12(%ecx)
220; MCU-NEXT:    fmul %st(0), %st(0)
221; MCU-NEXT:    fxch %st(1)
222; MCU-NEXT:    fmul %st(0), %st(0)
223; MCU-NEXT:    fxch %st(2)
224; MCU-NEXT:    fmul %st(0), %st(0)
225; MCU-NEXT:    fxch %st(3)
226; MCU-NEXT:    fmul %st(0), %st(0)
227; MCU-NEXT:    testl %eax, %eax
228; MCU-NEXT:    flds (%edx)
229; MCU-NEXT:    je .LBB5_2
230; MCU-NEXT:  # BB#1:
231; MCU-NEXT:    fstp %st(1)
232; MCU-NEXT:    fstp %st(3)
233; MCU-NEXT:    fstp %st(1)
234; MCU-NEXT:    fstp %st(0)
235; MCU-NEXT:    flds (%esp) # 4-byte Folded Reload
236; MCU-NEXT:    fldz
237; MCU-NEXT:    fldz
238; MCU-NEXT:    fldz
239; MCU-NEXT:    fxch %st(1)
240; MCU-NEXT:    fxch %st(6)
241; MCU-NEXT:    fxch %st(1)
242; MCU-NEXT:    fxch %st(5)
243; MCU-NEXT:    fxch %st(4)
244; MCU-NEXT:    fxch %st(1)
245; MCU-NEXT:    fxch %st(3)
246; MCU-NEXT:    fxch %st(2)
247; MCU-NEXT:  .LBB5_2:
248; MCU-NEXT:    fstp %st(0)
249; MCU-NEXT:    fstp %st(5)
250; MCU-NEXT:    fstp %st(3)
251; MCU-NEXT:    fxch %st(2)
252; MCU-NEXT:    fstps 12(%edx)
253; MCU-NEXT:    fxch %st(1)
254; MCU-NEXT:    fstps 8(%edx)
255; MCU-NEXT:    fstps 4(%edx)
256; MCU-NEXT:    fstps (%edx)
257; MCU-NEXT:    popl %eax
258; MCU-NEXT:    retl
259  %tmp = load <4 x float>, <4 x float>* %A
260  %tmp3 = load <4 x float>, <4 x float>* %B
261  %tmp9 = fmul <4 x float> %tmp3, %tmp3
262  %tmp.upgrd.1 = icmp eq i32 %C, 0
263  %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
264  store <4 x float> %iftmp.38.0, <4 x float>* %A
265  ret void
266}
267
268; Select with fp80's
269define x86_fp80 @test7(i32 %tmp8) nounwind {
270; CHECK-LABEL: test7:
271; CHECK:       ## BB#0:
272; CHECK-NEXT:    xorl %eax, %eax
273; CHECK-NEXT:    testl %edi, %edi
274; CHECK-NEXT:    setns %al
275; CHECK-NEXT:    shlq $4, %rax
276; CHECK-NEXT:    leaq {{.*}}(%rip), %rcx
277; CHECK-NEXT:    fldt (%rax,%rcx)
278; CHECK-NEXT:    retq
279;
280; MCU-LABEL: test7:
281; MCU:       # BB#0:
282; MCU-NEXT:    xorl %ecx, %ecx
283; MCU-NEXT:    testl %eax, %eax
284; MCU-NEXT:    setns %cl
285; MCU-NEXT:    shll $4, %ecx
286; MCU-NEXT:    fldt {{\.LCPI.*}}(%ecx)
287; MCU-NEXT:    retl
288  %tmp9 = icmp sgt i32 %tmp8, -1
289  %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
290  ret x86_fp80 %retval
291}
292
293; widening select v6i32 and then a sub
294define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
295; GENERIC-LABEL: test8:
296; GENERIC:       ## BB#0:
297; GENERIC-NEXT:    testb $1, %dil
298; GENERIC-NEXT:    jne LBB7_1
299; GENERIC-NEXT:  ## BB#2:
300; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
301; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
302; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
303; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
304; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
305; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
306; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
307; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
308; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
309; GENERIC-NEXT:    jmp LBB7_3
310; GENERIC-NEXT:  LBB7_1:
311; GENERIC-NEXT:    movd %r9d, %xmm0
312; GENERIC-NEXT:    movd %r8d, %xmm1
313; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
314; GENERIC-NEXT:    movd %ecx, %xmm2
315; GENERIC-NEXT:    movd %edx, %xmm0
316; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
317; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
318; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
319; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
320; GENERIC-NEXT:  LBB7_3:
321; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
322; GENERIC-NEXT:    pcmpeqd %xmm2, %xmm2
323; GENERIC-NEXT:    paddd %xmm2, %xmm0
324; GENERIC-NEXT:    paddd %xmm2, %xmm1
325; GENERIC-NEXT:    movq %xmm1, 16(%rsi)
326; GENERIC-NEXT:    movdqa %xmm0, (%rsi)
327; GENERIC-NEXT:    retq
328;
329; ATOM-LABEL: test8:
330; ATOM:       ## BB#0:
331; ATOM-NEXT:    testb $1, %dil
332; ATOM-NEXT:    jne LBB7_1
333; ATOM-NEXT:  ## BB#2:
334; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
335; ATOM-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
336; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
337; ATOM-NEXT:    movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
338; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
339; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
340; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
341; ATOM-NEXT:    jmp LBB7_3
342; ATOM-NEXT:  LBB7_1:
343; ATOM-NEXT:    movd %r9d, %xmm0
344; ATOM-NEXT:    movd %r8d, %xmm2
345; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
346; ATOM-NEXT:    movd %ecx, %xmm3
347; ATOM-NEXT:    movd %edx, %xmm0
348; ATOM-NEXT:    movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
349; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
350; ATOM-NEXT:  LBB7_3:
351; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
352; ATOM-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
353; ATOM-NEXT:    pcmpeqd %xmm2, %xmm2
354; ATOM-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1]
355; ATOM-NEXT:    paddd %xmm2, %xmm0
356; ATOM-NEXT:    paddd %xmm2, %xmm1
357; ATOM-NEXT:    movdqa %xmm0, (%rsi)
358; ATOM-NEXT:    movq %xmm1, 16(%rsi)
359; ATOM-NEXT:    retq
360;
361; MCU-LABEL: test8:
362; MCU:       # BB#0:
363; MCU-NEXT:    pushl %ebp
364; MCU-NEXT:    pushl %ebx
365; MCU-NEXT:    pushl %edi
366; MCU-NEXT:    pushl %esi
367; MCU-NEXT:    testb $1, %al
368; MCU-NEXT:    jne .LBB7_1
369; MCU-NEXT:  # BB#2:
370; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
371; MCU-NEXT:    movl (%eax), %eax
372; MCU-NEXT:    je .LBB7_5
373; MCU-NEXT:  .LBB7_4:
374; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
375; MCU-NEXT:    movl (%ecx), %ecx
376; MCU-NEXT:    je .LBB7_8
377; MCU-NEXT:  .LBB7_7:
378; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
379; MCU-NEXT:    movl (%esi), %esi
380; MCU-NEXT:    je .LBB7_11
381; MCU-NEXT:  .LBB7_10:
382; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
383; MCU-NEXT:    movl (%edi), %edi
384; MCU-NEXT:    je .LBB7_14
385; MCU-NEXT:  .LBB7_13:
386; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebx
387; MCU-NEXT:    movl (%ebx), %ebx
388; MCU-NEXT:    je .LBB7_17
389; MCU-NEXT:  .LBB7_16:
390; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
391; MCU-NEXT:    jmp .LBB7_18
392; MCU-NEXT:  .LBB7_1:
393; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
394; MCU-NEXT:    movl (%eax), %eax
395; MCU-NEXT:    jne .LBB7_4
396; MCU-NEXT:  .LBB7_5:
397; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
398; MCU-NEXT:    movl (%ecx), %ecx
399; MCU-NEXT:    jne .LBB7_7
400; MCU-NEXT:  .LBB7_8:
401; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
402; MCU-NEXT:    movl (%esi), %esi
403; MCU-NEXT:    jne .LBB7_10
404; MCU-NEXT:  .LBB7_11:
405; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
406; MCU-NEXT:    movl (%edi), %edi
407; MCU-NEXT:    jne .LBB7_13
408; MCU-NEXT:  .LBB7_14:
409; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebx
410; MCU-NEXT:    movl (%ebx), %ebx
411; MCU-NEXT:    jne .LBB7_16
412; MCU-NEXT:  .LBB7_17:
413; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
414; MCU-NEXT:  .LBB7_18:
415; MCU-NEXT:    movl (%ebp), %ebp
416; MCU-NEXT:    decl %ebp
417; MCU-NEXT:    decl %ebx
418; MCU-NEXT:    decl %edi
419; MCU-NEXT:    decl %esi
420; MCU-NEXT:    decl %ecx
421; MCU-NEXT:    decl %eax
422; MCU-NEXT:    movl %eax, 20(%edx)
423; MCU-NEXT:    movl %ecx, 16(%edx)
424; MCU-NEXT:    movl %esi, 12(%edx)
425; MCU-NEXT:    movl %edi, 8(%edx)
426; MCU-NEXT:    movl %ebx, 4(%edx)
427; MCU-NEXT:    movl %ebp, (%edx)
428; MCU-NEXT:    popl %esi
429; MCU-NEXT:    popl %edi
430; MCU-NEXT:    popl %ebx
431; MCU-NEXT:    popl %ebp
432; MCU-NEXT:    retl
433  %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
434  %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
435  store <6 x i32> %val, <6 x i32>* %dst.addr
436  ret void
437}
438
439
440;; Test integer select between values and constants.
441
442define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
443; GENERIC-LABEL: test9:
444; GENERIC:       ## BB#0:
445; GENERIC-NEXT:    cmpq $1, %rdi
446; GENERIC-NEXT:    sbbq %rax, %rax
447; GENERIC-NEXT:    orq %rsi, %rax
448; GENERIC-NEXT:    retq
449;
450; ATOM-LABEL: test9:
451; ATOM:       ## BB#0:
452; ATOM-NEXT:    cmpq $1, %rdi
453; ATOM-NEXT:    sbbq %rax, %rax
454; ATOM-NEXT:    orq %rsi, %rax
455; ATOM-NEXT:    nop
456; ATOM-NEXT:    nop
457; ATOM-NEXT:    retq
458;
459; MCU-LABEL: test9:
460; MCU:       # BB#0:
461; MCU-NEXT:    orl %edx, %eax
462; MCU-NEXT:    jne .LBB8_1
463; MCU-NEXT:  # BB#2:
464; MCU-NEXT:    movl $-1, %eax
465; MCU-NEXT:    movl $-1, %edx
466; MCU-NEXT:    retl
467; MCU-NEXT:  .LBB8_1:
468; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
469; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
470; MCU-NEXT:    retl
471  %cmp = icmp ne i64 %x, 0
472  %cond = select i1 %cmp, i64 %y, i64 -1
473  ret i64 %cond
474}
475
476;; Same as test9
477define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
478; GENERIC-LABEL: test9a:
479; GENERIC:       ## BB#0:
480; GENERIC-NEXT:    cmpq $1, %rdi
481; GENERIC-NEXT:    sbbq %rax, %rax
482; GENERIC-NEXT:    orq %rsi, %rax
483; GENERIC-NEXT:    retq
484;
485; ATOM-LABEL: test9a:
486; ATOM:       ## BB#0:
487; ATOM-NEXT:    cmpq $1, %rdi
488; ATOM-NEXT:    sbbq %rax, %rax
489; ATOM-NEXT:    orq %rsi, %rax
490; ATOM-NEXT:    nop
491; ATOM-NEXT:    nop
492; ATOM-NEXT:    retq
493;
494; MCU-LABEL: test9a:
495; MCU:       # BB#0:
496; MCU-NEXT:    orl %edx, %eax
497; MCU-NEXT:    movl $-1, %eax
498; MCU-NEXT:    movl $-1, %edx
499; MCU-NEXT:    je .LBB9_2
500; MCU-NEXT:  # BB#1:
501; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
502; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
503; MCU-NEXT:  .LBB9_2:
504; MCU-NEXT:    retl
505  %cmp = icmp eq i64 %x, 0
506  %cond = select i1 %cmp, i64 -1, i64 %y
507  ret i64 %cond
508}
509
510define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
511; GENERIC-LABEL: test9b:
512; GENERIC:       ## BB#0:
513; GENERIC-NEXT:    cmpq $1, %rdi
514; GENERIC-NEXT:    sbbq %rax, %rax
515; GENERIC-NEXT:    orq %rsi, %rax
516; GENERIC-NEXT:    retq
517;
518; ATOM-LABEL: test9b:
519; ATOM:       ## BB#0:
520; ATOM-NEXT:    cmpq $1, %rdi
521; ATOM-NEXT:    sbbq %rax, %rax
522; ATOM-NEXT:    orq %rsi, %rax
523; ATOM-NEXT:    nop
524; ATOM-NEXT:    nop
525; ATOM-NEXT:    retq
526;
527; MCU-LABEL: test9b:
528; MCU:       # BB#0:
529; MCU-NEXT:    movl %edx, %ecx
530; MCU-NEXT:    xorl %edx, %edx
531; MCU-NEXT:    orl %ecx, %eax
532; MCU-NEXT:    sete %dl
533; MCU-NEXT:    negl %edx
534; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
535; MCU-NEXT:    orl %edx, %eax
536; MCU-NEXT:    orl {{[0-9]+}}(%esp), %edx
537; MCU-NEXT:    retl
538  %cmp = icmp eq i64 %x, 0
539  %A = sext i1 %cmp to i64
540  %cond = or i64 %y, %A
541  ret i64 %cond
542}
543
544;; Select between -1 and 1.
545define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
546; CHECK-LABEL: test10:
547; CHECK:       ## BB#0:
548; CHECK-NEXT:    xorl %eax, %eax
549; CHECK-NEXT:    testq %rdi, %rdi
550; CHECK-NEXT:    setne %al
551; CHECK-NEXT:    leaq -1(%rax,%rax), %rax
552; CHECK-NEXT:    retq
553;
554; MCU-LABEL: test10:
555; MCU:       # BB#0:
556; MCU-NEXT:    orl %edx, %eax
557; MCU-NEXT:    movl $-1, %eax
558; MCU-NEXT:    movl $-1, %edx
559; MCU-NEXT:    je .LBB11_2
560; MCU-NEXT:  # BB#1:
561; MCU-NEXT:    xorl %edx, %edx
562; MCU-NEXT:    movl $1, %eax
563; MCU-NEXT:  .LBB11_2:
564; MCU-NEXT:    retl
565  %cmp = icmp eq i64 %x, 0
566  %cond = select i1 %cmp, i64 -1, i64 1
567  ret i64 %cond
568}
569
570define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
571; CHECK-LABEL: test11:
572; CHECK:       ## BB#0:
573; CHECK-NEXT:    cmpq $1, %rdi
574; CHECK-NEXT:    sbbq %rax, %rax
575; CHECK-NEXT:    notq %rax
576; CHECK-NEXT:    orq %rsi, %rax
577; CHECK-NEXT:    retq
578;
579; MCU-LABEL: test11:
580; MCU:       # BB#0:
581; MCU-NEXT:    orl %edx, %eax
582; MCU-NEXT:    je .LBB12_1
583; MCU-NEXT:  # BB#2:
584; MCU-NEXT:    movl $-1, %eax
585; MCU-NEXT:    movl $-1, %edx
586; MCU-NEXT:    retl
587; MCU-NEXT:  .LBB12_1:
588; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
589; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
590; MCU-NEXT:    retl
591  %cmp = icmp eq i64 %x, 0
592  %cond = select i1 %cmp, i64 %y, i64 -1
593  ret i64 %cond
594}
595
596define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
597; CHECK-LABEL: test11a:
598; CHECK:       ## BB#0:
599; CHECK-NEXT:    cmpq $1, %rdi
600; CHECK-NEXT:    sbbq %rax, %rax
601; CHECK-NEXT:    notq %rax
602; CHECK-NEXT:    orq %rsi, %rax
603; CHECK-NEXT:    retq
604;
605; MCU-LABEL: test11a:
606; MCU:       # BB#0:
607; MCU-NEXT:    orl %edx, %eax
608; MCU-NEXT:    movl $-1, %eax
609; MCU-NEXT:    movl $-1, %edx
610; MCU-NEXT:    jne .LBB13_2
611; MCU-NEXT:  # BB#1:
612; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
613; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
614; MCU-NEXT:  .LBB13_2:
615; MCU-NEXT:    retl
616  %cmp = icmp ne i64 %x, 0
617  %cond = select i1 %cmp, i64 -1, i64 %y
618  ret i64 %cond
619}
620
621
622declare noalias i8* @_Znam(i64) noredzone
623
624define noalias i8* @test12(i64 %count) nounwind ssp noredzone {
625; GENERIC-LABEL: test12:
626; GENERIC:       ## BB#0: ## %entry
627; GENERIC-NEXT:    movl $4, %ecx
628; GENERIC-NEXT:    movq %rdi, %rax
629; GENERIC-NEXT:    mulq %rcx
630; GENERIC-NEXT:    movq $-1, %rdi
631; GENERIC-NEXT:    cmovnoq %rax, %rdi
632; GENERIC-NEXT:    jmp __Znam ## TAILCALL
633;
634; ATOM-LABEL: test12:
635; ATOM:       ## BB#0: ## %entry
636; ATOM-NEXT:    movq %rdi, %rax
637; ATOM-NEXT:    movl $4, %ecx
638; ATOM-NEXT:    mulq %rcx
639; ATOM-NEXT:    movq $-1, %rdi
640; ATOM-NEXT:    cmovnoq %rax, %rdi
641; ATOM-NEXT:    jmp __Znam ## TAILCALL
642;
643; MCU-LABEL: test12:
644; MCU:       # BB#0: # %entry
645; MCU-NEXT:    pushl %ebp
646; MCU-NEXT:    pushl %ebx
647; MCU-NEXT:    pushl %edi
648; MCU-NEXT:    pushl %esi
649; MCU-NEXT:    movl %edx, %ebx
650; MCU-NEXT:    movl %eax, %ebp
651; MCU-NEXT:    movl $4, %ecx
652; MCU-NEXT:    mull %ecx
653; MCU-NEXT:    movl %eax, %esi
654; MCU-NEXT:    leal (%edx,%ebx,4), %edi
655; MCU-NEXT:    movl %edi, %edx
656; MCU-NEXT:    pushl $0
657; MCU-NEXT:    pushl $4
658; MCU-NEXT:    calll __udivdi3
659; MCU-NEXT:    addl $8, %esp
660; MCU-NEXT:    xorl %ebx, %edx
661; MCU-NEXT:    xorl %ebp, %eax
662; MCU-NEXT:    orl %edx, %eax
663; MCU-NEXT:    movl $-1, %eax
664; MCU-NEXT:    movl $-1, %edx
665; MCU-NEXT:    jne .LBB14_2
666; MCU-NEXT:  # BB#1: # %entry
667; MCU-NEXT:    movl %esi, %eax
668; MCU-NEXT:    movl %edi, %edx
669; MCU-NEXT:  .LBB14_2: # %entry
670; MCU-NEXT:    popl %esi
671; MCU-NEXT:    popl %edi
672; MCU-NEXT:    popl %ebx
673; MCU-NEXT:    popl %ebp
674; MCU-NEXT:    jmp _Znam # TAILCALL
675entry:
676  %A = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %count, i64 4)
677  %B = extractvalue { i64, i1 } %A, 1
678  %C = extractvalue { i64, i1 } %A, 0
679  %D = select i1 %B, i64 -1, i64 %C
680  %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone
681  ret i8* %call
682}
683
684declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone
685
686define i32 @test13(i32 %a, i32 %b) nounwind {
687; GENERIC-LABEL: test13:
688; GENERIC:       ## BB#0:
689; GENERIC-NEXT:    cmpl %esi, %edi
690; GENERIC-NEXT:    sbbl %eax, %eax
691; GENERIC-NEXT:    retq
692;
693; ATOM-LABEL: test13:
694; ATOM:       ## BB#0:
695; ATOM-NEXT:    cmpl %esi, %edi
696; ATOM-NEXT:    sbbl %eax, %eax
697; ATOM-NEXT:    nop
698; ATOM-NEXT:    nop
699; ATOM-NEXT:    nop
700; ATOM-NEXT:    nop
701; ATOM-NEXT:    retq
702;
703; MCU-LABEL: test13:
704; MCU:       # BB#0:
705; MCU-NEXT:    cmpl %edx, %eax
706; MCU-NEXT:    sbbl %eax, %eax
707; MCU-NEXT:    retl
708  %c = icmp ult i32 %a, %b
709  %d = sext i1 %c to i32
710  ret i32 %d
711}
712
713define i32 @test14(i32 %a, i32 %b) nounwind {
714; CHECK-LABEL: test14:
715; CHECK:       ## BB#0:
716; CHECK-NEXT:    xorl %eax, %eax
717; CHECK-NEXT:    cmpl %esi, %edi
718; CHECK-NEXT:    setae %al
719; CHECK-NEXT:    negl %eax
720; CHECK-NEXT:    retq
721;
722; MCU-LABEL: test14:
723; MCU:       # BB#0:
724; MCU-NEXT:    xorl %ecx, %ecx
725; MCU-NEXT:    cmpl %edx, %eax
726; MCU-NEXT:    setae %cl
727; MCU-NEXT:    negl %ecx
728; MCU-NEXT:    movl %ecx, %eax
729; MCU-NEXT:    retl
730  %c = icmp uge i32 %a, %b
731  %d = sext i1 %c to i32
732  ret i32 %d
733}
734
735; rdar://10961709
736define i32 @test15(i32 %x) nounwind {
737; GENERIC-LABEL: test15:
738; GENERIC:       ## BB#0: ## %entry
739; GENERIC-NEXT:    negl %edi
740; GENERIC-NEXT:    sbbl %eax, %eax
741; GENERIC-NEXT:    retq
742;
743; ATOM-LABEL: test15:
744; ATOM:       ## BB#0: ## %entry
745; ATOM-NEXT:    negl %edi
746; ATOM-NEXT:    sbbl %eax, %eax
747; ATOM-NEXT:    nop
748; ATOM-NEXT:    nop
749; ATOM-NEXT:    nop
750; ATOM-NEXT:    nop
751; ATOM-NEXT:    retq
752;
753; MCU-LABEL: test15:
754; MCU:       # BB#0: # %entry
755; MCU-NEXT:    negl %eax
756; MCU-NEXT:    sbbl %eax, %eax
757; MCU-NEXT:    retl
758entry:
759  %cmp = icmp ne i32 %x, 0
760  %sub = sext i1 %cmp to i32
761  ret i32 %sub
762}
763
764define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
765; GENERIC-LABEL: test16:
766; GENERIC:       ## BB#0: ## %entry
767; GENERIC-NEXT:    negq %rdi
768; GENERIC-NEXT:    sbbq %rax, %rax
769; GENERIC-NEXT:    retq
770;
771; ATOM-LABEL: test16:
772; ATOM:       ## BB#0: ## %entry
773; ATOM-NEXT:    negq %rdi
774; ATOM-NEXT:    sbbq %rax, %rax
775; ATOM-NEXT:    nop
776; ATOM-NEXT:    nop
777; ATOM-NEXT:    nop
778; ATOM-NEXT:    nop
779; ATOM-NEXT:    retq
780;
781; MCU-LABEL: test16:
782; MCU:       # BB#0: # %entry
783; MCU-NEXT:    movl %eax, %ecx
784; MCU-NEXT:    xorl %eax, %eax
785; MCU-NEXT:    orl %edx, %ecx
786; MCU-NEXT:    setne %al
787; MCU-NEXT:    negl %eax
788; MCU-NEXT:    movl %eax, %edx
789; MCU-NEXT:    retl
790entry:
791  %cmp = icmp ne i64 %x, 0
792  %conv1 = sext i1 %cmp to i64
793  ret i64 %conv1
794}
795
796define i16 @test17(i16 %x) nounwind {
797; GENERIC-LABEL: test17:
798; GENERIC:       ## BB#0: ## %entry
799; GENERIC-NEXT:    negw %di
800; GENERIC-NEXT:    sbbl %eax, %eax
801; GENERIC-NEXT:    ## kill: %AX<def> %AX<kill> %EAX<kill>
802; GENERIC-NEXT:    retq
803;
804; ATOM-LABEL: test17:
805; ATOM:       ## BB#0: ## %entry
806; ATOM-NEXT:    negw %di
807; ATOM-NEXT:    sbbl %eax, %eax
808; ATOM-NEXT:    ## kill: %AX<def> %AX<kill> %EAX<kill>
809; ATOM-NEXT:    nop
810; ATOM-NEXT:    nop
811; ATOM-NEXT:    nop
812; ATOM-NEXT:    nop
813; ATOM-NEXT:    retq
814;
815; MCU-LABEL: test17:
816; MCU:       # BB#0: # %entry
817; MCU-NEXT:    negw %ax
818; MCU-NEXT:    sbbl %eax, %eax
819; MCU-NEXT:    # kill: %AX<def> %AX<kill> %EAX<kill>
820; MCU-NEXT:    retl
821entry:
822  %cmp = icmp ne i16 %x, 0
823  %sub = sext i1 %cmp to i16
824  ret i16 %sub
825}
826
827define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
828; GENERIC-LABEL: test18:
829; GENERIC:       ## BB#0:
830; GENERIC-NEXT:    cmpl $15, %edi
831; GENERIC-NEXT:    cmovgel %edx, %esi
832; GENERIC-NEXT:    movl %esi, %eax
833; GENERIC-NEXT:    retq
834;
835; ATOM-LABEL: test18:
836; ATOM:       ## BB#0:
837; ATOM-NEXT:    cmpl $15, %edi
838; ATOM-NEXT:    cmovgel %edx, %esi
839; ATOM-NEXT:    movl %esi, %eax
840; ATOM-NEXT:    nop
841; ATOM-NEXT:    nop
842; ATOM-NEXT:    retq
843;
844; MCU-LABEL: test18:
845; MCU:       # BB#0:
846; MCU-NEXT:    cmpl $15, %eax
847; MCU-NEXT:    jl .LBB20_2
848; MCU-NEXT:  # BB#1:
849; MCU-NEXT:    movl %ecx, %edx
850; MCU-NEXT:  .LBB20_2:
851; MCU-NEXT:    movl %edx, %eax
852; MCU-NEXT:    retl
853  %cmp = icmp slt i32 %x, 15
854  %sel = select i1 %cmp, i8 %a, i8 %b
855  ret i8 %sel
856}
857
858define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
859; CHECK-LABEL: trunc_select_miscompile:
860; CHECK:       ## BB#0:
861; CHECK-NEXT:    orb $2, %sil
862; CHECK-NEXT:    movl %esi, %ecx
863; CHECK-NEXT:    shll %cl, %edi
864; CHECK-NEXT:    movl %edi, %eax
865; CHECK-NEXT:    retq
866;
867; MCU-LABEL: trunc_select_miscompile:
868; MCU:       # BB#0:
869; MCU-NEXT:    orb $2, %dl
870; MCU-NEXT:    movl %edx, %ecx
871; MCU-NEXT:    shll %cl, %eax
872; MCU-NEXT:    retl
873  %tmp1 = select i1 %cc, i32 3, i32 2
874  %tmp2 = shl i32 %a, %tmp1
875  ret i32 %tmp2
876}
877
878; reproducer for pr29002
879define void @clamp_i8(i32 %src, i8* %dst) {
880; GENERIC-LABEL: clamp_i8:
881; GENERIC:       ## BB#0:
882; GENERIC-NEXT:    cmpl $127, %edi
883; GENERIC-NEXT:    movl $127, %eax
884; GENERIC-NEXT:    cmovlel %edi, %eax
885; GENERIC-NEXT:    cmpl $-128, %eax
886; GENERIC-NEXT:    movb $-128, %cl
887; GENERIC-NEXT:    jl LBB22_2
888; GENERIC-NEXT:  ## BB#1:
889; GENERIC-NEXT:    movl %eax, %ecx
890; GENERIC-NEXT:  LBB22_2:
891; GENERIC-NEXT:    movb %cl, (%rsi)
892; GENERIC-NEXT:    retq
893;
894; ATOM-LABEL: clamp_i8:
895; ATOM:       ## BB#0:
896; ATOM-NEXT:    cmpl $127, %edi
897; ATOM-NEXT:    movl $127, %eax
898; ATOM-NEXT:    cmovlel %edi, %eax
899; ATOM-NEXT:    movb $-128, %cl
900; ATOM-NEXT:    cmpl $-128, %eax
901; ATOM-NEXT:    jl LBB22_2
902; ATOM-NEXT:  ## BB#1:
903; ATOM-NEXT:    movl %eax, %ecx
904; ATOM-NEXT:  LBB22_2:
905; ATOM-NEXT:    movb %cl, (%rsi)
906; ATOM-NEXT:    retq
907;
908; MCU-LABEL: clamp_i8:
909; MCU:       # BB#0:
910; MCU-NEXT:    cmpl $127, %eax
911; MCU-NEXT:    movl $127, %ecx
912; MCU-NEXT:    jg .LBB22_2
913; MCU-NEXT:  # BB#1:
914; MCU-NEXT:    movl %eax, %ecx
915; MCU-NEXT:  .LBB22_2:
916; MCU-NEXT:    cmpl $-128, %ecx
917; MCU-NEXT:    movb $-128, %al
918; MCU-NEXT:    jl .LBB22_4
919; MCU-NEXT:  # BB#3:
920; MCU-NEXT:    movl %ecx, %eax
921; MCU-NEXT:  .LBB22_4:
922; MCU-NEXT:    movb %al, (%edx)
923; MCU-NEXT:    retl
924  %cmp = icmp sgt i32 %src, 127
925  %sel1 = select i1 %cmp, i32 127, i32 %src
926  %cmp1 = icmp slt i32 %sel1, -128
927  %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
928  %conv = trunc i32 %sel2 to i8
929  store i8 %conv, i8* %dst, align 2
930  ret void
931}
932
933; reproducer for pr29002
934define void @clamp(i32 %src, i16* %dst) {
935; GENERIC-LABEL: clamp:
936; GENERIC:       ## BB#0:
937; GENERIC-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
938; GENERIC-NEXT:    movl $32767, %eax ## imm = 0x7FFF
939; GENERIC-NEXT:    cmovlel %edi, %eax
940; GENERIC-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
941; GENERIC-NEXT:    movw $-32768, %cx ## imm = 0x8000
942; GENERIC-NEXT:    cmovgew %ax, %cx
943; GENERIC-NEXT:    movw %cx, (%rsi)
944; GENERIC-NEXT:    retq
945;
946; ATOM-LABEL: clamp:
947; ATOM:       ## BB#0:
948; ATOM-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
949; ATOM-NEXT:    movl $32767, %eax ## imm = 0x7FFF
950; ATOM-NEXT:    cmovlel %edi, %eax
951; ATOM-NEXT:    movw $-32768, %cx ## imm = 0x8000
952; ATOM-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
953; ATOM-NEXT:    cmovgew %ax, %cx
954; ATOM-NEXT:    movw %cx, (%rsi)
955; ATOM-NEXT:    retq
956;
957; MCU-LABEL: clamp:
958; MCU:       # BB#0:
959; MCU-NEXT:    cmpl $32767, %eax # imm = 0x7FFF
960; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
961; MCU-NEXT:    jg .LBB23_2
962; MCU-NEXT:  # BB#1:
963; MCU-NEXT:    movl %eax, %ecx
964; MCU-NEXT:  .LBB23_2:
965; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
966; MCU-NEXT:    movw $-32768, %ax # imm = 0x8000
967; MCU-NEXT:    jl .LBB23_4
968; MCU-NEXT:  # BB#3:
969; MCU-NEXT:    movl %ecx, %eax
970; MCU-NEXT:  .LBB23_4:
971; MCU-NEXT:    movw %ax, (%edx)
972; MCU-NEXT:    retl
973  %cmp = icmp sgt i32 %src, 32767
974  %sel1 = select i1 %cmp, i32 32767, i32 %src
975  %cmp1 = icmp slt i32 %sel1, -32768
976  %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
977  %conv = trunc i32 %sel2 to i16
978  store i16 %conv, i16* %dst, align 2
979  ret void
980}
981
982define void @test19() {
983; This is a massive reduction of an llvm-stress test case that generates
984; interesting chains feeding setcc and eventually a f32 select operation. This
985; is intended to exercise the SELECT formation in the DAG combine simplifying
986; a simplified select_cc node. If it it regresses and is no longer triggering
987; that code path, it can be deleted.
988;
989; CHECK-LABEL: test19:
990; CHECK:       ## BB#0: ## %BB
991; CHECK-NEXT:    movl $-1, %eax
992; CHECK-NEXT:    movb $1, %cl
993; CHECK-NEXT:    .p2align 4, 0x90
994; CHECK-NEXT:  LBB24_1: ## %CF
995; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
996; CHECK-NEXT:    testb %cl, %cl
997; CHECK-NEXT:    jne LBB24_1
998; CHECK-NEXT:  ## BB#2: ## %CF250
999; CHECK-NEXT:    ## in Loop: Header=BB24_1 Depth=1
1000; CHECK-NEXT:    jne LBB24_1
1001; CHECK-NEXT:    .p2align 4, 0x90
1002; CHECK-NEXT:  LBB24_3: ## %CF242
1003; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
1004; CHECK-NEXT:    cmpl %eax, %eax
1005; CHECK-NEXT:    ucomiss %xmm0, %xmm0
1006; CHECK-NEXT:    jp LBB24_3
1007; CHECK-NEXT:  ## BB#4: ## %CF244
1008; CHECK-NEXT:    retq
1009;
1010; MCU-LABEL: test19:
1011; MCU:       # BB#0: # %BB
1012; MCU-NEXT:    movl $-1, %ecx
1013; MCU-NEXT:    movb $1, %al
1014; MCU-NEXT:    .p2align 4, 0x90
1015; MCU-NEXT:  .LBB24_1: # %CF
1016; MCU-NEXT:    # =>This Inner Loop Header: Depth=1
1017; MCU-NEXT:    testb %al, %al
1018; MCU-NEXT:    jne .LBB24_1
1019; MCU-NEXT:  # BB#2: # %CF250
1020; MCU-NEXT:    # in Loop: Header=BB24_1 Depth=1
1021; MCU-NEXT:    jne .LBB24_1
1022; MCU-NEXT:  # BB#3: # %CF242.preheader
1023; MCU-NEXT:    fldz
1024; MCU-NEXT:    .p2align 4, 0x90
1025; MCU-NEXT:  .LBB24_4: # %CF242
1026; MCU-NEXT:    # =>This Inner Loop Header: Depth=1
1027; MCU-NEXT:    cmpl %eax, %ecx
1028; MCU-NEXT:    fucom %st(0)
1029; MCU-NEXT:    fnstsw %ax
1030; MCU-NEXT:    # kill: %AH<def> %AH<kill> %AX<kill>
1031; MCU-NEXT:    sahf
1032; MCU-NEXT:    jp .LBB24_4
1033; MCU-NEXT:  # BB#5: # %CF244
1034; MCU-NEXT:    fstp %st(0)
1035; MCU-NEXT:    retl
1036BB:
1037  br label %CF
1038
1039CF:
1040  %Cmp10 = icmp ule i8 undef, undef
1041  br i1 %Cmp10, label %CF, label %CF250
1042
1043CF250:
1044  %E12 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 2
1045  %Cmp32 = icmp ugt i1 %Cmp10, false
1046  br i1 %Cmp32, label %CF, label %CF242
1047
1048CF242:
1049  %Cmp38 = icmp uge i32 %E12, undef
1050  %FC = uitofp i1 %Cmp38 to float
1051  %Sl59 = select i1 %Cmp32, float %FC, float undef
1052  %Cmp60 = fcmp ugt float undef, undef
1053  br i1 %Cmp60, label %CF242, label %CF244
1054
1055CF244:
1056  %B122 = fadd float %Sl59, undef
1057  ret void
1058}
1059
1060define i16 @select_xor_1(i16 %A, i8 %cond) {
1061; CHECK-LABEL: select_xor_1:
1062; CHECK:       ## BB#0: ## %entry
1063; CHECK-NEXT:    movl %edi, %eax
1064; CHECK-NEXT:    xorl $43, %eax
1065; CHECK-NEXT:    testb $1, %sil
1066; CHECK-NEXT:    cmovnew %ax, %di
1067; CHECK-NEXT:    movl %edi, %eax
1068; CHECK-NEXT:    retq
1069;
1070; MCU-LABEL: select_xor_1:
1071; MCU:       # BB#0: # %entry
1072; MCU-NEXT:    andl $1, %edx
1073; MCU-NEXT:    negl %edx
1074; MCU-NEXT:    andl $43, %edx
1075; MCU-NEXT:    xorl %edx, %eax
1076; MCU-NEXT:    # kill: %AX<def> %AX<kill> %EAX<kill>
1077; MCU-NEXT:    retl
1078entry:
1079 %and = and i8 %cond, 1
1080 %cmp10 = icmp eq i8 %and, 0
1081 %0 = xor i16 %A, 43
1082 %1 = select i1 %cmp10, i16 %A, i16 %0
1083 ret i16 %1
1084}
1085
1086define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1087; CHECK-LABEL: select_xor_2:
1088; CHECK:       ## BB#0: ## %entry
1089; CHECK-NEXT:    xorl %edi, %esi
1090; CHECK-NEXT:    testb $1, %dl
1091; CHECK-NEXT:    cmovel %edi, %esi
1092; CHECK-NEXT:    movl %esi, %eax
1093; CHECK-NEXT:    retq
1094;
1095; MCU-LABEL: select_xor_2:
1096; MCU:       # BB#0: # %entry
1097; MCU-NEXT:    andl $1, %ecx
1098; MCU-NEXT:    negl %ecx
1099; MCU-NEXT:    andl %edx, %ecx
1100; MCU-NEXT:    xorl %ecx, %eax
1101; MCU-NEXT:    retl
1102entry:
1103 %and = and i8 %cond, 1
1104 %cmp10 = icmp eq i8 %and, 0
1105 %0 = xor i32 %B, %A
1106 %1 = select i1 %cmp10, i32 %A, i32 %0
1107 ret i32 %1
1108}
1109
1110define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1111; CHECK-LABEL: select_or:
1112; CHECK:       ## BB#0: ## %entry
1113; CHECK-NEXT:    orl %edi, %esi
1114; CHECK-NEXT:    testb $1, %dl
1115; CHECK-NEXT:    cmovel %edi, %esi
1116; CHECK-NEXT:    movl %esi, %eax
1117; CHECK-NEXT:    retq
1118;
1119; MCU-LABEL: select_or:
1120; MCU:       # BB#0: # %entry
1121; MCU-NEXT:    andl $1, %ecx
1122; MCU-NEXT:    negl %ecx
1123; MCU-NEXT:    andl %edx, %ecx
1124; MCU-NEXT:    orl %ecx, %eax
1125; MCU-NEXT:    retl
1126entry:
1127 %and = and i8 %cond, 1
1128 %cmp10 = icmp eq i8 %and, 0
1129 %0 = or i32 %B, %A
1130 %1 = select i1 %cmp10, i32 %A, i32 %0
1131 ret i32 %1
1132}
1133
1134define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1135; CHECK-LABEL: select_or_1:
1136; CHECK:       ## BB#0: ## %entry
1137; CHECK-NEXT:    orl %edi, %esi
1138; CHECK-NEXT:    testb $1, %dl
1139; CHECK-NEXT:    cmovel %edi, %esi
1140; CHECK-NEXT:    movl %esi, %eax
1141; CHECK-NEXT:    retq
1142;
1143; MCU-LABEL: select_or_1:
1144; MCU:       # BB#0: # %entry
1145; MCU-NEXT:    andl $1, %ecx
1146; MCU-NEXT:    negl %ecx
1147; MCU-NEXT:    andl %edx, %ecx
1148; MCU-NEXT:    orl %ecx, %eax
1149; MCU-NEXT:    retl
1150entry:
1151 %and = and i32 %cond, 1
1152 %cmp10 = icmp eq i32 %and, 0
1153 %0 = or i32 %B, %A
1154 %1 = select i1 %cmp10, i32 %A, i32 %0
1155 ret i32 %1
1156}
1157