1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin10               | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom    | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon    | FileCheck %s --check-prefix=ATHLON
5; RUN: llc < %s -mtriple=i386-intel-elfiamcu                 | FileCheck %s --check-prefix=MCU
6
7; PR5757
8%0 = type { i64, i32 }
9
10define i32 @test1(ptr %p, ptr %q, i1 %r) nounwind {
11; GENERIC-LABEL: test1:
12; GENERIC:       ## %bb.0:
13; GENERIC-NEXT:    testb $1, %dl
14; GENERIC-NEXT:    cmoveq %rsi, %rdi
15; GENERIC-NEXT:    movl 8(%rdi), %eax
16; GENERIC-NEXT:    retq
17;
18; ATOM-LABEL: test1:
19; ATOM:       ## %bb.0:
20; ATOM-NEXT:    testb $1, %dl
21; ATOM-NEXT:    cmoveq %rsi, %rdi
22; ATOM-NEXT:    movl 8(%rdi), %eax
23; ATOM-NEXT:    nop
24; ATOM-NEXT:    nop
25; ATOM-NEXT:    retq
26;
27; ATHLON-LABEL: test1:
28; ATHLON:       ## %bb.0:
29; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
30; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
31; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
32; ATHLON-NEXT:    cmovnel %eax, %ecx
33; ATHLON-NEXT:    movl (%ecx), %eax
34; ATHLON-NEXT:    movl 8(%eax), %eax
35; ATHLON-NEXT:    retl
36;
37; MCU-LABEL: test1:
38; MCU:       # %bb.0:
39; MCU-NEXT:    testb $1, %cl
40; MCU-NEXT:    jne .LBB0_2
41; MCU-NEXT:  # %bb.1:
42; MCU-NEXT:    movl %edx, %eax
43; MCU-NEXT:  .LBB0_2:
44; MCU-NEXT:    movl 8(%eax), %eax
45; MCU-NEXT:    retl
46  %t0 = load %0, ptr %p
47  %t1 = load %0, ptr %q
48  %t4 = select i1 %r, %0 %t0, %0 %t1
49  %t5 = extractvalue %0 %t4, 1
50  ret i32 %t5
51}
52
53; PR2139
54define i32 @test2() nounwind {
55; GENERIC-LABEL: test2:
56; GENERIC:       ## %bb.0: ## %entry
57; GENERIC-NEXT:    pushq %rax
58; GENERIC-NEXT:    callq _return_false
59; GENERIC-NEXT:    xorl %ecx, %ecx
60; GENERIC-NEXT:    testb $1, %al
61; GENERIC-NEXT:    movl $-3840, %eax ## imm = 0xF100
62; GENERIC-NEXT:    cmovnel %ecx, %eax
63; GENERIC-NEXT:    cmpl $32768, %eax ## imm = 0x8000
64; GENERIC-NEXT:    jge LBB1_1
65; GENERIC-NEXT:  ## %bb.2: ## %bb91
66; GENERIC-NEXT:    xorl %eax, %eax
67; GENERIC-NEXT:    popq %rcx
68; GENERIC-NEXT:    retq
69; GENERIC-NEXT:  LBB1_1: ## %bb90
70; GENERIC-NEXT:    ud2
71;
72; ATOM-LABEL: test2:
73; ATOM:       ## %bb.0: ## %entry
74; ATOM-NEXT:    pushq %rax
75; ATOM-NEXT:    callq _return_false
76; ATOM-NEXT:    xorl %ecx, %ecx
77; ATOM-NEXT:    movl $-3840, %edx ## imm = 0xF100
78; ATOM-NEXT:    testb $1, %al
79; ATOM-NEXT:    cmovnel %ecx, %edx
80; ATOM-NEXT:    cmpl $32768, %edx ## imm = 0x8000
81; ATOM-NEXT:    jge LBB1_1
82; ATOM-NEXT:  ## %bb.2: ## %bb91
83; ATOM-NEXT:    xorl %eax, %eax
84; ATOM-NEXT:    popq %rcx
85; ATOM-NEXT:    retq
86; ATOM-NEXT:  LBB1_1: ## %bb90
87; ATOM-NEXT:    ud2
88;
89; ATHLON-LABEL: test2:
90; ATHLON:       ## %bb.0: ## %entry
91; ATHLON-NEXT:    subl $12, %esp
92; ATHLON-NEXT:    calll _return_false
93; ATHLON-NEXT:    xorl %ecx, %ecx
94; ATHLON-NEXT:    testb $1, %al
95; ATHLON-NEXT:    movl $-3840, %eax ## imm = 0xF100
96; ATHLON-NEXT:    cmovnel %ecx, %eax
97; ATHLON-NEXT:    cmpl $32768, %eax ## imm = 0x8000
98; ATHLON-NEXT:    jge LBB1_1
99; ATHLON-NEXT:  ## %bb.2: ## %bb91
100; ATHLON-NEXT:    xorl %eax, %eax
101; ATHLON-NEXT:    addl $12, %esp
102; ATHLON-NEXT:    retl
103; ATHLON-NEXT:  LBB1_1: ## %bb90
104; ATHLON-NEXT:    ud2
105;
106; MCU-LABEL: test2:
107; MCU:       # %bb.0: # %entry
108; MCU-NEXT:    calll return_false@PLT
109; MCU-NEXT:    xorl %ecx, %ecx
110; MCU-NEXT:    testb $1, %al
111; MCU-NEXT:    jne .LBB1_2
112; MCU-NEXT:  # %bb.1: # %entry
113; MCU-NEXT:    movl $-3840, %ecx # imm = 0xF100
114; MCU-NEXT:  .LBB1_2: # %entry
115; MCU-NEXT:    cmpl $32768, %ecx # imm = 0x8000
116; MCU-NEXT:    jge .LBB1_3
117; MCU-NEXT:  # %bb.4: # %bb91
118; MCU-NEXT:    xorl %eax, %eax
119; MCU-NEXT:    retl
120; MCU-NEXT:  .LBB1_3: # %bb90
121entry:
122  %tmp73 = tail call i1 @return_false()
123  %g.0 = select i1 %tmp73, i16 0, i16 -480
124  %tmp7778 = sext i16 %g.0 to i32
125  %tmp80 = shl i32 %tmp7778, 3
126  %tmp87 = icmp sgt i32 %tmp80, 32767
127  br i1 %tmp87, label %bb90, label %bb91
128bb90:
129  unreachable
130bb91:
131  ret i32 0
132}
133
134declare i1 @return_false()
135
136;; Select between two floating point constants.
137define float @test3(i32 %x) nounwind readnone {
138; GENERIC-LABEL: test3:
139; GENERIC:       ## %bb.0: ## %entry
140; GENERIC-NEXT:    xorl %eax, %eax
141; GENERIC-NEXT:    testl %edi, %edi
142; GENERIC-NEXT:    sete %al
143; GENERIC-NEXT:    leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx
144; GENERIC-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
145; GENERIC-NEXT:    retq
146;
147; ATOM-LABEL: test3:
148; ATOM:       ## %bb.0: ## %entry
149; ATOM-NEXT:    xorl %eax, %eax
150; ATOM-NEXT:    leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx
151; ATOM-NEXT:    testl %edi, %edi
152; ATOM-NEXT:    sete %al
153; ATOM-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
154; ATOM-NEXT:    retq
155;
156; ATHLON-LABEL: test3:
157; ATHLON:       ## %bb.0: ## %entry
158; ATHLON-NEXT:    xorl %eax, %eax
159; ATHLON-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
160; ATHLON-NEXT:    sete %al
161; ATHLON-NEXT:    flds {{\.?LCPI[0-9]+_[0-9]+}}(,%eax,4)
162; ATHLON-NEXT:    retl
163;
164; MCU-LABEL: test3:
165; MCU:       # %bb.0: # %entry
166; MCU-NEXT:    xorl %ecx, %ecx
167; MCU-NEXT:    testl %eax, %eax
168; MCU-NEXT:    sete %cl
169; MCU-NEXT:    flds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)
170; MCU-NEXT:    retl
171entry:
172  %0 = icmp eq i32 %x, 0
173  %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
174  ret float %iftmp.0.0
175}
176
177define signext i8 @test4(ptr nocapture %P, double %F) nounwind readonly {
178; CHECK-LABEL: test4:
179; CHECK:       ## %bb.0: ## %entry
180; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
181; CHECK-NEXT:    xorl %eax, %eax
182; CHECK-NEXT:    ucomisd %xmm0, %xmm1
183; CHECK-NEXT:    seta %al
184; CHECK-NEXT:    movsbl (%rdi,%rax,4), %eax
185; CHECK-NEXT:    retq
186;
187; ATHLON-LABEL: test4:
188; ATHLON:       ## %bb.0: ## %entry
189; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
190; ATHLON-NEXT:    fldl {{[0-9]+}}(%esp)
191; ATHLON-NEXT:    flds {{\.?LCPI[0-9]+_[0-9]+}}
192; ATHLON-NEXT:    xorl %ecx, %ecx
193; ATHLON-NEXT:    fucompi %st(1), %st
194; ATHLON-NEXT:    fstp %st(0)
195; ATHLON-NEXT:    seta %cl
196; ATHLON-NEXT:    movsbl (%eax,%ecx,4), %eax
197; ATHLON-NEXT:    retl
198;
199; MCU-LABEL: test4:
200; MCU:       # %bb.0: # %entry
201; MCU-NEXT:    movl %eax, %ecx
202; MCU-NEXT:    fldl {{[0-9]+}}(%esp)
203; MCU-NEXT:    flds {{\.?LCPI[0-9]+_[0-9]+}}
204; MCU-NEXT:    fucompp
205; MCU-NEXT:    fnstsw %ax
206; MCU-NEXT:    xorl %edx, %edx
207; MCU-NEXT:    # kill: def $ah killed $ah killed $ax
208; MCU-NEXT:    sahf
209; MCU-NEXT:    seta %dl
210; MCU-NEXT:    movzbl (%ecx,%edx,4), %eax
211; MCU-NEXT:    retl
212entry:
213  %0 = fcmp olt double %F, 4.200000e+01
214  %iftmp.0.0 = select i1 %0, i32 4, i32 0
215  %1 = getelementptr i8, ptr %P, i32 %iftmp.0.0
216  %2 = load i8, ptr %1, align 1
217  ret i8 %2
218}
219
220define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, ptr %p) nounwind {
221; GENERIC-LABEL: test5:
222; GENERIC:       ## %bb.0:
223; GENERIC-NEXT:    testb $1, %dil
224; GENERIC-NEXT:    jne LBB4_2
225; GENERIC-NEXT:  ## %bb.1:
226; GENERIC-NEXT:    movaps %xmm1, %xmm0
227; GENERIC-NEXT:  LBB4_2:
228; GENERIC-NEXT:    movss %xmm0, (%rsi)
229; GENERIC-NEXT:    retq
230;
231; ATOM-LABEL: test5:
232; ATOM:       ## %bb.0:
233; ATOM-NEXT:    testb $1, %dil
234; ATOM-NEXT:    jne LBB4_2
235; ATOM-NEXT:  ## %bb.1:
236; ATOM-NEXT:    movaps %xmm1, %xmm0
237; ATOM-NEXT:  LBB4_2:
238; ATOM-NEXT:    movss %xmm0, (%rsi)
239; ATOM-NEXT:    nop
240; ATOM-NEXT:    nop
241; ATOM-NEXT:    retq
242;
243; ATHLON-LABEL: test5:
244; ATHLON:       ## %bb.0:
245; ATHLON-NEXT:    pushl %esi
246; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
247; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
248; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
249; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
250; ATHLON-NEXT:    cmovnel %ecx, %edx
251; ATHLON-NEXT:    movzwl (%edx), %ecx
252; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
253; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %esi
254; ATHLON-NEXT:    cmovnel %edx, %esi
255; ATHLON-NEXT:    movzwl (%esi), %edx
256; ATHLON-NEXT:    movw %dx, 2(%eax)
257; ATHLON-NEXT:    movw %cx, (%eax)
258; ATHLON-NEXT:    popl %esi
259; ATHLON-NEXT:    retl
260;
261; MCU-LABEL: test5:
262; MCU:       # %bb.0:
263; MCU-NEXT:    pushl %esi
264; MCU-NEXT:    movl {{[0-9]+}}(%esp), %esi
265; MCU-NEXT:    testb $1, %al
266; MCU-NEXT:    jne .LBB4_2
267; MCU-NEXT:  # %bb.1:
268; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
269; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %edx
270; MCU-NEXT:  .LBB4_2:
271; MCU-NEXT:    movw %cx, 2(%esi)
272; MCU-NEXT:    movw %dx, (%esi)
273; MCU-NEXT:    popl %esi
274; MCU-NEXT:    retl
275  %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
276  store <2 x i16> %x, ptr %p
277  ret void
278}
279
280; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
281define void @test6(i32 %C, ptr %A, ptr %B) nounwind {
282; CHECK-LABEL: test6:
283; CHECK:       ## %bb.0:
284; CHECK-NEXT:    testl %edi, %edi
285; CHECK-NEXT:    je LBB5_1
286; CHECK-NEXT:  ## %bb.2:
287; CHECK-NEXT:    movaps (%rsi), %xmm0
288; CHECK-NEXT:    movaps %xmm0, (%rsi)
289; CHECK-NEXT:    retq
290; CHECK-NEXT:  LBB5_1:
291; CHECK-NEXT:    movaps (%rdx), %xmm0
292; CHECK-NEXT:    mulps %xmm0, %xmm0
293; CHECK-NEXT:    movaps %xmm0, (%rsi)
294; CHECK-NEXT:    retq
295;
296; ATHLON-LABEL: test6:
297; ATHLON:       ## %bb.0:
298; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
299; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
300; ATHLON-NEXT:    flds 12(%eax)
301; ATHLON-NEXT:    flds 8(%eax)
302; ATHLON-NEXT:    flds 4(%eax)
303; ATHLON-NEXT:    flds (%eax)
304; ATHLON-NEXT:    flds (%ecx)
305; ATHLON-NEXT:    fmul %st, %st(0)
306; ATHLON-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
307; ATHLON-NEXT:    fxch %st(1)
308; ATHLON-NEXT:    fcmove %st(1), %st
309; ATHLON-NEXT:    fstp %st(1)
310; ATHLON-NEXT:    flds 4(%ecx)
311; ATHLON-NEXT:    fmul %st, %st(0)
312; ATHLON-NEXT:    fxch %st(2)
313; ATHLON-NEXT:    fcmove %st(2), %st
314; ATHLON-NEXT:    fstp %st(2)
315; ATHLON-NEXT:    flds 8(%ecx)
316; ATHLON-NEXT:    fmul %st, %st(0)
317; ATHLON-NEXT:    fxch %st(3)
318; ATHLON-NEXT:    fcmove %st(3), %st
319; ATHLON-NEXT:    fstp %st(3)
320; ATHLON-NEXT:    flds 12(%ecx)
321; ATHLON-NEXT:    fmul %st, %st(0)
322; ATHLON-NEXT:    fxch %st(4)
323; ATHLON-NEXT:    fcmove %st(4), %st
324; ATHLON-NEXT:    fstp %st(4)
325; ATHLON-NEXT:    fxch %st(3)
326; ATHLON-NEXT:    fstps 12(%eax)
327; ATHLON-NEXT:    fxch %st(1)
328; ATHLON-NEXT:    fstps 8(%eax)
329; ATHLON-NEXT:    fstps 4(%eax)
330; ATHLON-NEXT:    fstps (%eax)
331; ATHLON-NEXT:    retl
332;
333; MCU-LABEL: test6:
334; MCU:       # %bb.0:
335; MCU-NEXT:    pushl %eax
336; MCU-NEXT:    flds 12(%edx)
337; MCU-NEXT:    fstps (%esp) # 4-byte Folded Spill
338; MCU-NEXT:    flds 8(%edx)
339; MCU-NEXT:    flds 4(%edx)
340; MCU-NEXT:    flds (%ecx)
341; MCU-NEXT:    flds 4(%ecx)
342; MCU-NEXT:    flds 8(%ecx)
343; MCU-NEXT:    flds 12(%ecx)
344; MCU-NEXT:    fmul %st, %st(0)
345; MCU-NEXT:    fxch %st(1)
346; MCU-NEXT:    fmul %st, %st(0)
347; MCU-NEXT:    fxch %st(2)
348; MCU-NEXT:    fmul %st, %st(0)
349; MCU-NEXT:    fxch %st(3)
350; MCU-NEXT:    fmul %st, %st(0)
351; MCU-NEXT:    testl %eax, %eax
352; MCU-NEXT:    flds (%edx)
353; MCU-NEXT:    je .LBB5_2
354; MCU-NEXT:  # %bb.1:
355; MCU-NEXT:    fstp %st(1)
356; MCU-NEXT:    fstp %st(3)
357; MCU-NEXT:    fstp %st(1)
358; MCU-NEXT:    fstp %st(0)
359; MCU-NEXT:    flds (%esp) # 4-byte Folded Reload
360; MCU-NEXT:    fldz
361; MCU-NEXT:    fldz
362; MCU-NEXT:    fldz
363; MCU-NEXT:    fxch %st(1)
364; MCU-NEXT:    fxch %st(6)
365; MCU-NEXT:    fxch %st(1)
366; MCU-NEXT:    fxch %st(5)
367; MCU-NEXT:    fxch %st(4)
368; MCU-NEXT:    fxch %st(1)
369; MCU-NEXT:    fxch %st(3)
370; MCU-NEXT:    fxch %st(2)
371; MCU-NEXT:  .LBB5_2:
372; MCU-NEXT:    fstp %st(0)
373; MCU-NEXT:    fstp %st(5)
374; MCU-NEXT:    fstp %st(3)
375; MCU-NEXT:    fxch %st(2)
376; MCU-NEXT:    fstps 12(%edx)
377; MCU-NEXT:    fxch %st(1)
378; MCU-NEXT:    fstps 8(%edx)
379; MCU-NEXT:    fstps 4(%edx)
380; MCU-NEXT:    fstps (%edx)
381; MCU-NEXT:    popl %eax
382; MCU-NEXT:    retl
383  %tmp = load <4 x float>, ptr %A
384  %tmp3 = load <4 x float>, ptr %B
385  %tmp9 = fmul <4 x float> %tmp3, %tmp3
386  %tmp.upgrd.1 = icmp eq i32 %C, 0
387  %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
388  store <4 x float> %iftmp.38.0, ptr %A
389  ret void
390}
391
392; Select with fp80's
393define x86_fp80 @test7(i32 %tmp8) nounwind {
394; GENERIC-LABEL: test7:
395; GENERIC:       ## %bb.0:
396; GENERIC-NEXT:    xorl %eax, %eax
397; GENERIC-NEXT:    testl %edi, %edi
398; GENERIC-NEXT:    setns %al
399; GENERIC-NEXT:    shlq $4, %rax
400; GENERIC-NEXT:    leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx
401; GENERIC-NEXT:    fldt (%rax,%rcx)
402; GENERIC-NEXT:    retq
403;
404; ATOM-LABEL: test7:
405; ATOM:       ## %bb.0:
406; ATOM-NEXT:    xorl %eax, %eax
407; ATOM-NEXT:    leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx
408; ATOM-NEXT:    testl %edi, %edi
409; ATOM-NEXT:    setns %al
410; ATOM-NEXT:    shlq $4, %rax
411; ATOM-NEXT:    fldt (%rax,%rcx)
412; ATOM-NEXT:    retq
413;
414; ATHLON-LABEL: test7:
415; ATHLON:       ## %bb.0:
416; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
417; ATHLON-NEXT:    notl %eax
418; ATHLON-NEXT:    shrl $27, %eax
419; ATHLON-NEXT:    andl $-16, %eax
420; ATHLON-NEXT:    fldt {{\.?LCPI[0-9]+_[0-9]+}}(%eax)
421; ATHLON-NEXT:    retl
422;
423; MCU-LABEL: test7:
424; MCU:       # %bb.0:
425; MCU-NEXT:    notl %eax
426; MCU-NEXT:    shrl $27, %eax
427; MCU-NEXT:    andl $-16, %eax
428; MCU-NEXT:    fldt {{\.?LCPI[0-9]+_[0-9]+}}(%eax)
429; MCU-NEXT:    retl
430  %tmp9 = icmp sgt i32 %tmp8, -1
431  %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
432  ret x86_fp80 %retval
433}
434
435; widening select v6i32 and then a sub
436define void @test8(i1 %c, ptr %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
437; GENERIC-LABEL: test8:
438; GENERIC:       ## %bb.0:
439; GENERIC-NEXT:    testb $1, %dil
440; GENERIC-NEXT:    jne LBB7_1
441; GENERIC-NEXT:  ## %bb.2:
442; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
443; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
444; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
445; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
446; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
447; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
448; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
449; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
450; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
451; GENERIC-NEXT:    jmp LBB7_3
452; GENERIC-NEXT:  LBB7_1:
453; GENERIC-NEXT:    movd %r9d, %xmm0
454; GENERIC-NEXT:    movd %r8d, %xmm1
455; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
456; GENERIC-NEXT:    movd %ecx, %xmm2
457; GENERIC-NEXT:    movd %edx, %xmm0
458; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
459; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
460; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
461; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
462; GENERIC-NEXT:  LBB7_3:
463; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
464; GENERIC-NEXT:    pcmpeqd %xmm2, %xmm2
465; GENERIC-NEXT:    paddd %xmm2, %xmm0
466; GENERIC-NEXT:    paddd %xmm2, %xmm1
467; GENERIC-NEXT:    movq %xmm1, 16(%rsi)
468; GENERIC-NEXT:    movdqa %xmm0, (%rsi)
469; GENERIC-NEXT:    retq
470;
471; ATOM-LABEL: test8:
472; ATOM:       ## %bb.0:
473; ATOM-NEXT:    testb $1, %dil
474; ATOM-NEXT:    jne LBB7_1
475; ATOM-NEXT:  ## %bb.2:
476; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
477; ATOM-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
478; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
479; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
480; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
481; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
482; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
483; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
484; ATOM-NEXT:    jmp LBB7_3
485; ATOM-NEXT:  LBB7_1:
486; ATOM-NEXT:    movd %r9d, %xmm1
487; ATOM-NEXT:    movd %r8d, %xmm2
488; ATOM-NEXT:    movd %ecx, %xmm3
489; ATOM-NEXT:    movd %edx, %xmm0
490; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
491; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
492; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
493; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
494; ATOM-NEXT:  LBB7_3:
495; ATOM-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
496; ATOM-NEXT:    pcmpeqd %xmm2, %xmm2
497; ATOM-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
498; ATOM-NEXT:    paddd %xmm2, %xmm0
499; ATOM-NEXT:    paddd %xmm2, %xmm1
500; ATOM-NEXT:    movq %xmm1, 16(%rsi)
501; ATOM-NEXT:    movdqa %xmm0, (%rsi)
502; ATOM-NEXT:    retq
503;
504; ATHLON-LABEL: test8:
505; ATHLON:       ## %bb.0:
506; ATHLON-NEXT:    pushl %ebp
507; ATHLON-NEXT:    pushl %ebx
508; ATHLON-NEXT:    pushl %edi
509; ATHLON-NEXT:    pushl %esi
510; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
511; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
512; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
513; ATHLON-NEXT:    cmovnel %ecx, %eax
514; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
515; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
516; ATHLON-NEXT:    cmovnel %edx, %ecx
517; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
518; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %esi
519; ATHLON-NEXT:    cmovnel %edx, %esi
520; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
521; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edi
522; ATHLON-NEXT:    cmovnel %edx, %edi
523; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
524; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ebx
525; ATHLON-NEXT:    cmovnel %edx, %ebx
526; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
527; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ebp
528; ATHLON-NEXT:    cmovnel %edx, %ebp
529; ATHLON-NEXT:    movl (%eax), %eax
530; ATHLON-NEXT:    movl (%ecx), %ecx
531; ATHLON-NEXT:    movl (%esi), %edx
532; ATHLON-NEXT:    movl (%edi), %esi
533; ATHLON-NEXT:    movl (%ebx), %ebx
534; ATHLON-NEXT:    movl (%ebp), %edi
535; ATHLON-NEXT:    decl %eax
536; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ebp
537; ATHLON-NEXT:    movl %eax, 20(%ebp)
538; ATHLON-NEXT:    decl %ecx
539; ATHLON-NEXT:    movl %ecx, 16(%ebp)
540; ATHLON-NEXT:    decl %edx
541; ATHLON-NEXT:    movl %edx, 12(%ebp)
542; ATHLON-NEXT:    decl %esi
543; ATHLON-NEXT:    movl %esi, 8(%ebp)
544; ATHLON-NEXT:    decl %ebx
545; ATHLON-NEXT:    movl %ebx, 4(%ebp)
546; ATHLON-NEXT:    decl %edi
547; ATHLON-NEXT:    movl %edi, (%ebp)
548; ATHLON-NEXT:    popl %esi
549; ATHLON-NEXT:    popl %edi
550; ATHLON-NEXT:    popl %ebx
551; ATHLON-NEXT:    popl %ebp
552; ATHLON-NEXT:    retl
553;
554; MCU-LABEL: test8:
555; MCU:       # %bb.0:
556; MCU-NEXT:    pushl %ebp
557; MCU-NEXT:    pushl %ebx
558; MCU-NEXT:    pushl %edi
559; MCU-NEXT:    pushl %esi
560; MCU-NEXT:    testb $1, %al
561; MCU-NEXT:    jne .LBB7_1
562; MCU-NEXT:  # %bb.2:
563; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
564; MCU-NEXT:    je .LBB7_5
565; MCU-NEXT:  .LBB7_4:
566; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
567; MCU-NEXT:    je .LBB7_8
568; MCU-NEXT:  .LBB7_7:
569; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
570; MCU-NEXT:    je .LBB7_11
571; MCU-NEXT:  .LBB7_10:
572; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
573; MCU-NEXT:    je .LBB7_14
574; MCU-NEXT:  .LBB7_13:
575; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
576; MCU-NEXT:    jmp .LBB7_15
577; MCU-NEXT:  .LBB7_1:
578; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
579; MCU-NEXT:    jne .LBB7_4
580; MCU-NEXT:  .LBB7_5:
581; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
582; MCU-NEXT:    jne .LBB7_7
583; MCU-NEXT:  .LBB7_8:
584; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
585; MCU-NEXT:    jne .LBB7_10
586; MCU-NEXT:  .LBB7_11:
587; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
588; MCU-NEXT:    jne .LBB7_13
589; MCU-NEXT:  .LBB7_14:
590; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
591; MCU-NEXT:  .LBB7_15:
592; MCU-NEXT:    movl (%edi), %ebx
593; MCU-NEXT:    movl (%ecx), %edi
594; MCU-NEXT:    movl (%esi), %esi
595; MCU-NEXT:    movl (%ebp), %ecx
596; MCU-NEXT:    movl (%eax), %eax
597; MCU-NEXT:    jne .LBB7_16
598; MCU-NEXT:  # %bb.17:
599; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
600; MCU-NEXT:    jmp .LBB7_18
601; MCU-NEXT:  .LBB7_16:
602; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
603; MCU-NEXT:  .LBB7_18:
604; MCU-NEXT:    movl (%ebp), %ebp
605; MCU-NEXT:    decl %ebp
606; MCU-NEXT:    decl %eax
607; MCU-NEXT:    decl %ecx
608; MCU-NEXT:    decl %esi
609; MCU-NEXT:    decl %edi
610; MCU-NEXT:    decl %ebx
611; MCU-NEXT:    movl %ebx, 20(%edx)
612; MCU-NEXT:    movl %edi, 16(%edx)
613; MCU-NEXT:    movl %esi, 12(%edx)
614; MCU-NEXT:    movl %ecx, 8(%edx)
615; MCU-NEXT:    movl %eax, 4(%edx)
616; MCU-NEXT:    movl %ebp, (%edx)
617; MCU-NEXT:    popl %esi
618; MCU-NEXT:    popl %edi
619; MCU-NEXT:    popl %ebx
620; MCU-NEXT:    popl %ebp
621; MCU-NEXT:    retl
622  %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
623  %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
624  store <6 x i32> %val, ptr %dst.addr
625  ret void
626}
627
628
629;; Test integer select between values and constants.
630
631define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
632; CHECK-LABEL: test9:
633; CHECK:       ## %bb.0:
634; CHECK-NEXT:    xorl %eax, %eax
635; CHECK-NEXT:    cmpq $1, %rdi
636; CHECK-NEXT:    sbbq %rax, %rax
637; CHECK-NEXT:    orq %rsi, %rax
638; CHECK-NEXT:    retq
639;
640; ATHLON-LABEL: test9:
641; ATHLON:       ## %bb.0:
642; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
643; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
644; ATHLON-NEXT:    movl $-1, %eax
645; ATHLON-NEXT:    movl $-1, %edx
646; ATHLON-NEXT:    je LBB8_2
647; ATHLON-NEXT:  ## %bb.1:
648; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
649; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
650; ATHLON-NEXT:  LBB8_2:
651; ATHLON-NEXT:    retl
652;
653; MCU-LABEL: test9:
654; MCU:       # %bb.0:
655; MCU-NEXT:    orl %edx, %eax
656; MCU-NEXT:    jne .LBB8_1
657; MCU-NEXT:  # %bb.2:
658; MCU-NEXT:    movl $-1, %eax
659; MCU-NEXT:    movl $-1, %edx
660; MCU-NEXT:    retl
661; MCU-NEXT:  .LBB8_1:
662; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
663; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
664; MCU-NEXT:    retl
665  %cmp = icmp ne i64 %x, 0
666  %cond = select i1 %cmp, i64 %y, i64 -1
667  ret i64 %cond
668}
669
670;; Same as test9
671define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
672; CHECK-LABEL: test9a:
673; CHECK:       ## %bb.0:
674; CHECK-NEXT:    xorl %eax, %eax
675; CHECK-NEXT:    cmpq $1, %rdi
676; CHECK-NEXT:    sbbq %rax, %rax
677; CHECK-NEXT:    orq %rsi, %rax
678; CHECK-NEXT:    retq
679;
680; ATHLON-LABEL: test9a:
681; ATHLON:       ## %bb.0:
682; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
683; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
684; ATHLON-NEXT:    movl $-1, %eax
685; ATHLON-NEXT:    movl $-1, %edx
686; ATHLON-NEXT:    je LBB9_2
687; ATHLON-NEXT:  ## %bb.1:
688; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
689; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
690; ATHLON-NEXT:  LBB9_2:
691; ATHLON-NEXT:    retl
692;
693; MCU-LABEL: test9a:
694; MCU:       # %bb.0:
695; MCU-NEXT:    orl %edx, %eax
696; MCU-NEXT:    movl $-1, %eax
697; MCU-NEXT:    movl $-1, %edx
698; MCU-NEXT:    je .LBB9_2
699; MCU-NEXT:  # %bb.1:
700; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
701; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
702; MCU-NEXT:  .LBB9_2:
703; MCU-NEXT:    retl
704  %cmp = icmp eq i64 %x, 0
705  %cond = select i1 %cmp, i64 -1, i64 %y
706  ret i64 %cond
707}
708
709define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
710; CHECK-LABEL: test9b:
711; CHECK:       ## %bb.0:
712; CHECK-NEXT:    xorl %eax, %eax
713; CHECK-NEXT:    cmpq $1, %rdi
714; CHECK-NEXT:    sbbq %rax, %rax
715; CHECK-NEXT:    orq %rsi, %rax
716; CHECK-NEXT:    retq
717;
718; ATHLON-LABEL: test9b:
719; ATHLON:       ## %bb.0:
720; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
721; ATHLON-NEXT:    xorl %edx, %edx
722; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
723; ATHLON-NEXT:    sete %dl
724; ATHLON-NEXT:    negl %edx
725; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
726; ATHLON-NEXT:    orl %edx, %eax
727; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %edx
728; ATHLON-NEXT:    retl
729;
730; MCU-LABEL: test9b:
731; MCU:       # %bb.0:
732; MCU-NEXT:    movl %edx, %ecx
733; MCU-NEXT:    xorl %edx, %edx
734; MCU-NEXT:    orl %ecx, %eax
735; MCU-NEXT:    sete %dl
736; MCU-NEXT:    negl %edx
737; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
738; MCU-NEXT:    orl %edx, %eax
739; MCU-NEXT:    orl {{[0-9]+}}(%esp), %edx
740; MCU-NEXT:    retl
741  %cmp = icmp eq i64 %x, 0
742  %A = sext i1 %cmp to i64
743  %cond = or i64 %y, %A
744  ret i64 %cond
745}
746
747;; Select between -1 and 1.
748define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
749; CHECK-LABEL: test10:
750; CHECK:       ## %bb.0:
751; CHECK-NEXT:    xorl %eax, %eax
752; CHECK-NEXT:    cmpq $1, %rdi
753; CHECK-NEXT:    sbbq %rax, %rax
754; CHECK-NEXT:    orq $1, %rax
755; CHECK-NEXT:    retq
756;
757; ATHLON-LABEL: test10:
758; ATHLON:       ## %bb.0:
759; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
760; ATHLON-NEXT:    xorl %edx, %edx
761; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
762; ATHLON-NEXT:    movl $-1, %ecx
763; ATHLON-NEXT:    movl $1, %eax
764; ATHLON-NEXT:    cmovel %ecx, %eax
765; ATHLON-NEXT:    cmovel %ecx, %edx
766; ATHLON-NEXT:    retl
767;
768; MCU-LABEL: test10:
769; MCU:       # %bb.0:
770; MCU-NEXT:    orl %edx, %eax
771; MCU-NEXT:    movl $-1, %eax
772; MCU-NEXT:    movl $-1, %edx
773; MCU-NEXT:    je .LBB11_2
774; MCU-NEXT:  # %bb.1:
775; MCU-NEXT:    xorl %edx, %edx
776; MCU-NEXT:    movl $1, %eax
777; MCU-NEXT:  .LBB11_2:
778; MCU-NEXT:    retl
779  %cmp = icmp eq i64 %x, 0
780  %cond = select i1 %cmp, i64 -1, i64 1
781  ret i64 %cond
782}
783
784define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
785; CHECK-LABEL: test11:
786; CHECK:       ## %bb.0:
787; CHECK-NEXT:    xorl %eax, %eax
788; CHECK-NEXT:    negq %rdi
789; CHECK-NEXT:    sbbq %rax, %rax
790; CHECK-NEXT:    orq %rsi, %rax
791; CHECK-NEXT:    retq
792;
793; ATHLON-LABEL: test11:
794; ATHLON:       ## %bb.0:
795; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
796; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
797; ATHLON-NEXT:    movl $-1, %eax
798; ATHLON-NEXT:    movl $-1, %edx
799; ATHLON-NEXT:    jne LBB12_2
800; ATHLON-NEXT:  ## %bb.1:
801; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
802; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
803; ATHLON-NEXT:  LBB12_2:
804; ATHLON-NEXT:    retl
805;
806; MCU-LABEL: test11:
807; MCU:       # %bb.0:
808; MCU-NEXT:    orl %edx, %eax
809; MCU-NEXT:    je .LBB12_1
810; MCU-NEXT:  # %bb.2:
811; MCU-NEXT:    movl $-1, %eax
812; MCU-NEXT:    movl $-1, %edx
813; MCU-NEXT:    retl
814; MCU-NEXT:  .LBB12_1:
815; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
816; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
817; MCU-NEXT:    retl
818  %cmp = icmp eq i64 %x, 0
819  %cond = select i1 %cmp, i64 %y, i64 -1
820  ret i64 %cond
821}
822
823define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
824; CHECK-LABEL: test11a:
825; CHECK:       ## %bb.0:
826; CHECK-NEXT:    xorl %eax, %eax
827; CHECK-NEXT:    negq %rdi
828; CHECK-NEXT:    sbbq %rax, %rax
829; CHECK-NEXT:    orq %rsi, %rax
830; CHECK-NEXT:    retq
831;
832; ATHLON-LABEL: test11a:
833; ATHLON:       ## %bb.0:
834; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
835; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
836; ATHLON-NEXT:    movl $-1, %eax
837; ATHLON-NEXT:    movl $-1, %edx
838; ATHLON-NEXT:    jne LBB13_2
839; ATHLON-NEXT:  ## %bb.1:
840; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
841; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
842; ATHLON-NEXT:  LBB13_2:
843; ATHLON-NEXT:    retl
844;
845; MCU-LABEL: test11a:
846; MCU:       # %bb.0:
847; MCU-NEXT:    orl %edx, %eax
848; MCU-NEXT:    movl $-1, %eax
849; MCU-NEXT:    movl $-1, %edx
850; MCU-NEXT:    jne .LBB13_2
851; MCU-NEXT:  # %bb.1:
852; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
853; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
854; MCU-NEXT:  .LBB13_2:
855; MCU-NEXT:    retl
856  %cmp = icmp ne i64 %x, 0
857  %cond = select i1 %cmp, i64 -1, i64 %y
858  ret i64 %cond
859}
860
861define i32 @eqzero_const_or_all_ones(i32 %x) {
862; CHECK-LABEL: eqzero_const_or_all_ones:
863; CHECK:       ## %bb.0:
864; CHECK-NEXT:    xorl %eax, %eax
865; CHECK-NEXT:    negl %edi
866; CHECK-NEXT:    sbbl %eax, %eax
867; CHECK-NEXT:    orl $42, %eax
868; CHECK-NEXT:    retq
869;
870; ATHLON-LABEL: eqzero_const_or_all_ones:
871; ATHLON:       ## %bb.0:
872; ATHLON-NEXT:    xorl %eax, %eax
873; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %eax
874; ATHLON-NEXT:    sbbl %eax, %eax
875; ATHLON-NEXT:    orl $42, %eax
876; ATHLON-NEXT:    retl
877;
878; MCU-LABEL: eqzero_const_or_all_ones:
879; MCU:       # %bb.0:
880; MCU-NEXT:    xorl %ecx, %ecx
881; MCU-NEXT:    negl %eax
882; MCU-NEXT:    sbbl %ecx, %ecx
883; MCU-NEXT:    orl $42, %ecx
884; MCU-NEXT:    movl %ecx, %eax
885; MCU-NEXT:    retl
886  %z = icmp eq i32 %x, 0
887  %r = select i1 %z, i32 42, i32 -1
888  ret i32 %r
889}
890
891define i32 @nezero_const_or_all_ones(i32 %x) {
892; CHECK-LABEL: nezero_const_or_all_ones:
893; CHECK:       ## %bb.0:
894; CHECK-NEXT:    xorl %eax, %eax
895; CHECK-NEXT:    cmpl $1, %edi
896; CHECK-NEXT:    sbbl %eax, %eax
897; CHECK-NEXT:    orl $42, %eax
898; CHECK-NEXT:    retq
899;
900; ATHLON-LABEL: nezero_const_or_all_ones:
901; ATHLON:       ## %bb.0:
902; ATHLON-NEXT:    xorl %eax, %eax
903; ATHLON-NEXT:    cmpl $1, {{[0-9]+}}(%esp)
904; ATHLON-NEXT:    sbbl %eax, %eax
905; ATHLON-NEXT:    orl $42, %eax
906; ATHLON-NEXT:    retl
907;
908; MCU-LABEL: nezero_const_or_all_ones:
909; MCU:       # %bb.0:
910; MCU-NEXT:    xorl %ecx, %ecx
911; MCU-NEXT:    cmpl $1, %eax
912; MCU-NEXT:    sbbl %ecx, %ecx
913; MCU-NEXT:    orl $42, %ecx
914; MCU-NEXT:    movl %ecx, %eax
915; MCU-NEXT:    retl
916  %z = icmp ne i32 %x, 0
917  %r = select i1 %z, i32 42, i32 -1
918  ret i32 %r
919}
920
921define i64 @eqzero_all_ones_or_const(i64 %x) {
922; CHECK-LABEL: eqzero_all_ones_or_const:
923; CHECK:       ## %bb.0:
924; CHECK-NEXT:    xorl %eax, %eax
925; CHECK-NEXT:    cmpq $1, %rdi
926; CHECK-NEXT:    sbbq %rax, %rax
927; CHECK-NEXT:    orq $42, %rax
928; CHECK-NEXT:    retq
929;
930; ATHLON-LABEL: eqzero_all_ones_or_const:
931; ATHLON:       ## %bb.0:
932; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
933; ATHLON-NEXT:    xorl %edx, %edx
934; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
935; ATHLON-NEXT:    movl $-1, %ecx
936; ATHLON-NEXT:    movl $42, %eax
937; ATHLON-NEXT:    cmovel %ecx, %eax
938; ATHLON-NEXT:    cmovel %ecx, %edx
939; ATHLON-NEXT:    retl
940;
941; MCU-LABEL: eqzero_all_ones_or_const:
942; MCU:       # %bb.0:
943; MCU-NEXT:    orl %edx, %eax
944; MCU-NEXT:    movl $-1, %eax
945; MCU-NEXT:    movl $-1, %edx
946; MCU-NEXT:    je .LBB16_2
947; MCU-NEXT:  # %bb.1:
948; MCU-NEXT:    xorl %edx, %edx
949; MCU-NEXT:    movl $42, %eax
950; MCU-NEXT:  .LBB16_2:
951; MCU-NEXT:    retl
952  %z = icmp eq i64 %x, 0
953  %r = select i1 %z, i64 -1, i64 42
954  ret i64 %r
955}
956
957define i8 @nezero_all_ones_or_const(i8 %x) {
958; CHECK-LABEL: nezero_all_ones_or_const:
959; CHECK:       ## %bb.0:
960; CHECK-NEXT:    xorl %eax, %eax
961; CHECK-NEXT:    negb %dil
962; CHECK-NEXT:    sbbl %eax, %eax
963; CHECK-NEXT:    orb $42, %al
964; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
965; CHECK-NEXT:    retq
966;
967; ATHLON-LABEL: nezero_all_ones_or_const:
968; ATHLON:       ## %bb.0:
969; ATHLON-NEXT:    xorl %eax, %eax
970; ATHLON-NEXT:    cmpb {{[0-9]+}}(%esp), %al
971; ATHLON-NEXT:    sbbl %eax, %eax
972; ATHLON-NEXT:    orb $42, %al
973; ATHLON-NEXT:    ## kill: def $al killed $al killed $eax
974; ATHLON-NEXT:    retl
975;
976; MCU-LABEL: nezero_all_ones_or_const:
977; MCU:       # %bb.0:
978; MCU-NEXT:    xorl %ecx, %ecx
979; MCU-NEXT:    negb %al
980; MCU-NEXT:    sbbl %ecx, %ecx
981; MCU-NEXT:    orb $42, %cl
982; MCU-NEXT:    movl %ecx, %eax
983; MCU-NEXT:    retl
984  %z = icmp ne i8 %x, 0
985  %r = select i1 %z, i8 -1, i8 42
986  ret i8 %r
987}
988
989define i32 @PR53006(i32 %x) {
990; CHECK-LABEL: PR53006:
991; CHECK:       ## %bb.0:
992; CHECK-NEXT:    xorl %eax, %eax
993; CHECK-NEXT:    negl %edi
994; CHECK-NEXT:    sbbl %eax, %eax
995; CHECK-NEXT:    orl $1, %eax
996; CHECK-NEXT:    retq
997;
998; ATHLON-LABEL: PR53006:
999; ATHLON:       ## %bb.0:
1000; ATHLON-NEXT:    xorl %eax, %eax
1001; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %eax
1002; ATHLON-NEXT:    sbbl %eax, %eax
1003; ATHLON-NEXT:    orl $1, %eax
1004; ATHLON-NEXT:    retl
1005;
1006; MCU-LABEL: PR53006:
1007; MCU:       # %bb.0:
1008; MCU-NEXT:    xorl %ecx, %ecx
1009; MCU-NEXT:    negl %eax
1010; MCU-NEXT:    sbbl %ecx, %ecx
1011; MCU-NEXT:    orl $1, %ecx
1012; MCU-NEXT:    movl %ecx, %eax
1013; MCU-NEXT:    retl
1014  %z = icmp eq i32 %x, 0
1015  %r = select i1 %z, i32 1, i32 -1
1016  ret i32 %r
1017}
1018
1019define i32 @test13(i32 %a, i32 %b) nounwind {
1020; GENERIC-LABEL: test13:
1021; GENERIC:       ## %bb.0:
1022; GENERIC-NEXT:    xorl %eax, %eax
1023; GENERIC-NEXT:    cmpl %esi, %edi
1024; GENERIC-NEXT:    sbbl %eax, %eax
1025; GENERIC-NEXT:    retq
1026;
1027; ATOM-LABEL: test13:
1028; ATOM:       ## %bb.0:
1029; ATOM-NEXT:    xorl %eax, %eax
1030; ATOM-NEXT:    cmpl %esi, %edi
1031; ATOM-NEXT:    sbbl %eax, %eax
1032; ATOM-NEXT:    nop
1033; ATOM-NEXT:    nop
1034; ATOM-NEXT:    retq
1035;
1036; ATHLON-LABEL: test13:
1037; ATHLON:       ## %bb.0:
1038; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1039; ATHLON-NEXT:    xorl %eax, %eax
1040; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %ecx
1041; ATHLON-NEXT:    sbbl %eax, %eax
1042; ATHLON-NEXT:    retl
1043;
1044; MCU-LABEL: test13:
1045; MCU:       # %bb.0:
1046; MCU-NEXT:    xorl %ecx, %ecx
1047; MCU-NEXT:    cmpl %edx, %eax
1048; MCU-NEXT:    sbbl %ecx, %ecx
1049; MCU-NEXT:    movl %ecx, %eax
1050; MCU-NEXT:    retl
1051  %c = icmp ult i32 %a, %b
1052  %d = sext i1 %c to i32
1053  ret i32 %d
1054}
1055
1056define i32 @test14(i32 %a, i32 %b) nounwind {
1057; GENERIC-LABEL: test14:
1058; GENERIC:       ## %bb.0:
1059; GENERIC-NEXT:    xorl %eax, %eax
1060; GENERIC-NEXT:    cmpl %esi, %edi
1061; GENERIC-NEXT:    adcl $-1, %eax
1062; GENERIC-NEXT:    retq
1063;
1064; ATOM-LABEL: test14:
1065; ATOM:       ## %bb.0:
1066; ATOM-NEXT:    xorl %eax, %eax
1067; ATOM-NEXT:    cmpl %esi, %edi
1068; ATOM-NEXT:    adcl $-1, %eax
1069; ATOM-NEXT:    nop
1070; ATOM-NEXT:    nop
1071; ATOM-NEXT:    retq
1072;
1073; ATHLON-LABEL: test14:
1074; ATHLON:       ## %bb.0:
1075; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1076; ATHLON-NEXT:    xorl %eax, %eax
1077; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %ecx
1078; ATHLON-NEXT:    adcl $-1, %eax
1079; ATHLON-NEXT:    retl
1080;
1081; MCU-LABEL: test14:
1082; MCU:       # %bb.0:
1083; MCU-NEXT:    xorl %ecx, %ecx
1084; MCU-NEXT:    cmpl %edx, %eax
1085; MCU-NEXT:    adcl $-1, %ecx
1086; MCU-NEXT:    movl %ecx, %eax
1087; MCU-NEXT:    retl
1088  %c = icmp uge i32 %a, %b
1089  %d = sext i1 %c to i32
1090  ret i32 %d
1091}
1092
1093; rdar://10961709
1094define i32 @test15(i32 %x) nounwind {
1095; GENERIC-LABEL: test15:
1096; GENERIC:       ## %bb.0: ## %entry
1097; GENERIC-NEXT:    xorl %eax, %eax
1098; GENERIC-NEXT:    negl %edi
1099; GENERIC-NEXT:    sbbl %eax, %eax
1100; GENERIC-NEXT:    retq
1101;
1102; ATOM-LABEL: test15:
1103; ATOM:       ## %bb.0: ## %entry
1104; ATOM-NEXT:    xorl %eax, %eax
1105; ATOM-NEXT:    negl %edi
1106; ATOM-NEXT:    sbbl %eax, %eax
1107; ATOM-NEXT:    nop
1108; ATOM-NEXT:    nop
1109; ATOM-NEXT:    retq
1110;
1111; ATHLON-LABEL: test15:
1112; ATHLON:       ## %bb.0: ## %entry
1113; ATHLON-NEXT:    xorl %eax, %eax
1114; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %eax
1115; ATHLON-NEXT:    sbbl %eax, %eax
1116; ATHLON-NEXT:    retl
1117;
1118; MCU-LABEL: test15:
1119; MCU:       # %bb.0: # %entry
1120; MCU-NEXT:    xorl %ecx, %ecx
1121; MCU-NEXT:    negl %eax
1122; MCU-NEXT:    sbbl %ecx, %ecx
1123; MCU-NEXT:    movl %ecx, %eax
1124; MCU-NEXT:    retl
1125entry:
1126  %cmp = icmp ne i32 %x, 0
1127  %sub = sext i1 %cmp to i32
1128  ret i32 %sub
1129}
1130
1131define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
1132; GENERIC-LABEL: test16:
1133; GENERIC:       ## %bb.0: ## %entry
1134; GENERIC-NEXT:    xorl %eax, %eax
1135; GENERIC-NEXT:    negq %rdi
1136; GENERIC-NEXT:    sbbq %rax, %rax
1137; GENERIC-NEXT:    retq
1138;
1139; ATOM-LABEL: test16:
1140; ATOM:       ## %bb.0: ## %entry
1141; ATOM-NEXT:    xorl %eax, %eax
1142; ATOM-NEXT:    negq %rdi
1143; ATOM-NEXT:    sbbq %rax, %rax
1144; ATOM-NEXT:    nop
1145; ATOM-NEXT:    nop
1146; ATOM-NEXT:    retq
1147;
1148; ATHLON-LABEL: test16:
1149; ATHLON:       ## %bb.0: ## %entry
1150; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1151; ATHLON-NEXT:    xorl %eax, %eax
1152; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %ecx
1153; ATHLON-NEXT:    setne %al
1154; ATHLON-NEXT:    negl %eax
1155; ATHLON-NEXT:    movl %eax, %edx
1156; ATHLON-NEXT:    retl
1157;
1158; MCU-LABEL: test16:
1159; MCU:       # %bb.0: # %entry
1160; MCU-NEXT:    movl %eax, %ecx
1161; MCU-NEXT:    xorl %eax, %eax
1162; MCU-NEXT:    orl %edx, %ecx
1163; MCU-NEXT:    setne %al
1164; MCU-NEXT:    negl %eax
1165; MCU-NEXT:    movl %eax, %edx
1166; MCU-NEXT:    retl
1167entry:
1168  %cmp = icmp ne i64 %x, 0
1169  %conv1 = sext i1 %cmp to i64
1170  ret i64 %conv1
1171}
1172
1173define i16 @test17(i16 %x) nounwind {
1174; GENERIC-LABEL: test17:
1175; GENERIC:       ## %bb.0: ## %entry
1176; GENERIC-NEXT:    xorl %eax, %eax
1177; GENERIC-NEXT:    negw %di
1178; GENERIC-NEXT:    sbbl %eax, %eax
1179; GENERIC-NEXT:    ## kill: def $ax killed $ax killed $eax
1180; GENERIC-NEXT:    retq
1181;
1182; ATOM-LABEL: test17:
1183; ATOM:       ## %bb.0: ## %entry
1184; ATOM-NEXT:    xorl %eax, %eax
1185; ATOM-NEXT:    negw %di
1186; ATOM-NEXT:    sbbl %eax, %eax
1187; ATOM-NEXT:    ## kill: def $ax killed $ax killed $eax
1188; ATOM-NEXT:    nop
1189; ATOM-NEXT:    nop
1190; ATOM-NEXT:    retq
1191;
1192; ATHLON-LABEL: test17:
1193; ATHLON:       ## %bb.0: ## %entry
1194; ATHLON-NEXT:    xorl %eax, %eax
1195; ATHLON-NEXT:    cmpw {{[0-9]+}}(%esp), %ax
1196; ATHLON-NEXT:    sbbl %eax, %eax
1197; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1198; ATHLON-NEXT:    retl
1199;
1200; MCU-LABEL: test17:
1201; MCU:       # %bb.0: # %entry
1202; MCU-NEXT:    xorl %ecx, %ecx
1203; MCU-NEXT:    negw %ax
1204; MCU-NEXT:    sbbl %ecx, %ecx
1205; MCU-NEXT:    movl %ecx, %eax
1206; MCU-NEXT:    retl
1207entry:
1208  %cmp = icmp ne i16 %x, 0
1209  %sub = sext i1 %cmp to i16
1210  ret i16 %sub
1211}
1212
1213define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
1214; GENERIC-LABEL: test18:
1215; GENERIC:       ## %bb.0:
1216; GENERIC-NEXT:    movl %esi, %eax
1217; GENERIC-NEXT:    cmpl $15, %edi
1218; GENERIC-NEXT:    cmovgel %edx, %eax
1219; GENERIC-NEXT:    ## kill: def $al killed $al killed $eax
1220; GENERIC-NEXT:    retq
1221;
1222; ATOM-LABEL: test18:
1223; ATOM:       ## %bb.0:
1224; ATOM-NEXT:    movl %esi, %eax
1225; ATOM-NEXT:    cmpl $15, %edi
1226; ATOM-NEXT:    cmovgel %edx, %eax
1227; ATOM-NEXT:    ## kill: def $al killed $al killed $eax
1228; ATOM-NEXT:    nop
1229; ATOM-NEXT:    nop
1230; ATOM-NEXT:    retq
1231;
1232; ATHLON-LABEL: test18:
1233; ATHLON:       ## %bb.0:
1234; ATHLON-NEXT:    cmpl $15, {{[0-9]+}}(%esp)
1235; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
1236; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
1237; ATHLON-NEXT:    cmovll %eax, %ecx
1238; ATHLON-NEXT:    movzbl (%ecx), %eax
1239; ATHLON-NEXT:    retl
1240;
1241; MCU-LABEL: test18:
1242; MCU:       # %bb.0:
1243; MCU-NEXT:    cmpl $15, %eax
1244; MCU-NEXT:    jl .LBB24_2
1245; MCU-NEXT:  # %bb.1:
1246; MCU-NEXT:    movl %ecx, %edx
1247; MCU-NEXT:  .LBB24_2:
1248; MCU-NEXT:    movl %edx, %eax
1249; MCU-NEXT:    retl
1250  %cmp = icmp slt i32 %x, 15
1251  %sel = select i1 %cmp, i8 %a, i8 %b
1252  ret i8 %sel
1253}
1254
1255define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
1256; GENERIC-LABEL: trunc_select_miscompile:
1257; GENERIC:       ## %bb.0:
1258; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1259; GENERIC-NEXT:    movl %edi, %eax
1260; GENERIC-NEXT:    leal 2(%rsi), %ecx
1261; GENERIC-NEXT:    ## kill: def $cl killed $cl killed $ecx
1262; GENERIC-NEXT:    shll %cl, %eax
1263; GENERIC-NEXT:    retq
1264;
1265; ATOM-LABEL: trunc_select_miscompile:
1266; ATOM:       ## %bb.0:
1267; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1268; ATOM-NEXT:    leal 2(%rsi), %ecx
1269; ATOM-NEXT:    movl %edi, %eax
1270; ATOM-NEXT:    ## kill: def $cl killed $cl killed $ecx
1271; ATOM-NEXT:    shll %cl, %eax
1272; ATOM-NEXT:    nop
1273; ATOM-NEXT:    nop
1274; ATOM-NEXT:    retq
1275;
1276; ATHLON-LABEL: trunc_select_miscompile:
1277; ATHLON:       ## %bb.0:
1278; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1279; ATHLON-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
1280; ATHLON-NEXT:    orb $2, %cl
1281; ATHLON-NEXT:    shll %cl, %eax
1282; ATHLON-NEXT:    retl
1283;
1284; MCU-LABEL: trunc_select_miscompile:
1285; MCU:       # %bb.0:
1286; MCU-NEXT:    movl %edx, %ecx
1287; MCU-NEXT:    orb $2, %cl
1288; MCU-NEXT:    # kill: def $cl killed $cl killed $ecx
1289; MCU-NEXT:    shll %cl, %eax
1290; MCU-NEXT:    retl
1291  %tmp1 = select i1 %cc, i32 3, i32 2
1292  %tmp2 = shl i32 %a, %tmp1
1293  ret i32 %tmp2
1294}
1295
1296; reproducer for pr29002
1297define void @clamp_i8(i32 %src, ptr %dst) {
1298; GENERIC-LABEL: clamp_i8:
1299; GENERIC:       ## %bb.0:
1300; GENERIC-NEXT:    cmpl $127, %edi
1301; GENERIC-NEXT:    movl $127, %eax
1302; GENERIC-NEXT:    cmovlel %edi, %eax
1303; GENERIC-NEXT:    cmpl $-128, %eax
1304; GENERIC-NEXT:    movl $128, %ecx
1305; GENERIC-NEXT:    cmovgel %eax, %ecx
1306; GENERIC-NEXT:    movb %cl, (%rsi)
1307; GENERIC-NEXT:    retq
1308;
1309; ATOM-LABEL: clamp_i8:
1310; ATOM:       ## %bb.0:
1311; ATOM-NEXT:    cmpl $127, %edi
1312; ATOM-NEXT:    movl $127, %eax
1313; ATOM-NEXT:    movl $128, %ecx
1314; ATOM-NEXT:    cmovlel %edi, %eax
1315; ATOM-NEXT:    cmpl $-128, %eax
1316; ATOM-NEXT:    cmovgel %eax, %ecx
1317; ATOM-NEXT:    movb %cl, (%rsi)
1318; ATOM-NEXT:    retq
1319;
1320; ATHLON-LABEL: clamp_i8:
1321; ATHLON:       ## %bb.0:
1322; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1323; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1324; ATHLON-NEXT:    cmpl $127, %ecx
1325; ATHLON-NEXT:    movl $127, %edx
1326; ATHLON-NEXT:    cmovlel %ecx, %edx
1327; ATHLON-NEXT:    cmpl $-128, %edx
1328; ATHLON-NEXT:    movl $128, %ecx
1329; ATHLON-NEXT:    cmovgel %edx, %ecx
1330; ATHLON-NEXT:    movb %cl, (%eax)
1331; ATHLON-NEXT:    retl
1332;
1333; MCU-LABEL: clamp_i8:
1334; MCU:       # %bb.0:
1335; MCU-NEXT:    cmpl $127, %eax
1336; MCU-NEXT:    movl $127, %ecx
1337; MCU-NEXT:    jg .LBB26_2
1338; MCU-NEXT:  # %bb.1:
1339; MCU-NEXT:    movl %eax, %ecx
1340; MCU-NEXT:  .LBB26_2:
1341; MCU-NEXT:    cmpl $-128, %ecx
1342; MCU-NEXT:    movb $-128, %al
1343; MCU-NEXT:    jl .LBB26_4
1344; MCU-NEXT:  # %bb.3:
1345; MCU-NEXT:    movl %ecx, %eax
1346; MCU-NEXT:  .LBB26_4:
1347; MCU-NEXT:    movb %al, (%edx)
1348; MCU-NEXT:    retl
1349  %cmp = icmp sgt i32 %src, 127
1350  %sel1 = select i1 %cmp, i32 127, i32 %src
1351  %cmp1 = icmp slt i32 %sel1, -128
1352  %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
1353  %conv = trunc i32 %sel2 to i8
1354  store i8 %conv, ptr %dst, align 2
1355  ret void
1356}
1357
1358; reproducer for pr29002
1359define void @clamp(i32 %src, ptr %dst) {
1360; GENERIC-LABEL: clamp:
1361; GENERIC:       ## %bb.0:
1362; GENERIC-NEXT:    cmpl $32768, %edi ## imm = 0x8000
1363; GENERIC-NEXT:    movl $32767, %eax ## imm = 0x7FFF
1364; GENERIC-NEXT:    cmovll %edi, %eax
1365; GENERIC-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
1366; GENERIC-NEXT:    movl $32768, %ecx ## imm = 0x8000
1367; GENERIC-NEXT:    cmovgel %eax, %ecx
1368; GENERIC-NEXT:    movw %cx, (%rsi)
1369; GENERIC-NEXT:    retq
1370;
1371; ATOM-LABEL: clamp:
1372; ATOM:       ## %bb.0:
1373; ATOM-NEXT:    cmpl $32768, %edi ## imm = 0x8000
1374; ATOM-NEXT:    movl $32767, %eax ## imm = 0x7FFF
1375; ATOM-NEXT:    movl $32768, %ecx ## imm = 0x8000
1376; ATOM-NEXT:    cmovll %edi, %eax
1377; ATOM-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
1378; ATOM-NEXT:    cmovgel %eax, %ecx
1379; ATOM-NEXT:    movw %cx, (%rsi)
1380; ATOM-NEXT:    retq
1381;
1382; ATHLON-LABEL: clamp:
1383; ATHLON:       ## %bb.0:
1384; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1385; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1386; ATHLON-NEXT:    cmpl $32768, %ecx ## imm = 0x8000
1387; ATHLON-NEXT:    movl $32767, %edx ## imm = 0x7FFF
1388; ATHLON-NEXT:    cmovll %ecx, %edx
1389; ATHLON-NEXT:    cmpl $-32768, %edx ## imm = 0x8000
1390; ATHLON-NEXT:    movl $32768, %ecx ## imm = 0x8000
1391; ATHLON-NEXT:    cmovgel %edx, %ecx
1392; ATHLON-NEXT:    movw %cx, (%eax)
1393; ATHLON-NEXT:    retl
1394;
1395; MCU-LABEL: clamp:
1396; MCU:       # %bb.0:
1397; MCU-NEXT:    cmpl $32768, %eax # imm = 0x8000
1398; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
1399; MCU-NEXT:    jge .LBB27_2
1400; MCU-NEXT:  # %bb.1:
1401; MCU-NEXT:    movl %eax, %ecx
1402; MCU-NEXT:  .LBB27_2:
1403; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
1404; MCU-NEXT:    movl $32768, %eax # imm = 0x8000
1405; MCU-NEXT:    jl .LBB27_4
1406; MCU-NEXT:  # %bb.3:
1407; MCU-NEXT:    movl %ecx, %eax
1408; MCU-NEXT:  .LBB27_4:
1409; MCU-NEXT:    movw %ax, (%edx)
1410; MCU-NEXT:    retl
1411  %cmp = icmp sgt i32 %src, 32767
1412  %sel1 = select i1 %cmp, i32 32767, i32 %src
1413  %cmp1 = icmp slt i32 %sel1, -32768
1414  %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
1415  %conv = trunc i32 %sel2 to i16
1416  store i16 %conv, ptr %dst, align 2
1417  ret void
1418}
1419
1420define i16 @select_xor_1(i16 %A, i8 %cond) {
1421; CHECK-LABEL: select_xor_1:
1422; CHECK:       ## %bb.0: ## %entry
1423; CHECK-NEXT:    movl %edi, %eax
1424; CHECK-NEXT:    xorl $43, %eax
1425; CHECK-NEXT:    testb $1, %sil
1426; CHECK-NEXT:    cmovel %edi, %eax
1427; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
1428; CHECK-NEXT:    retq
1429;
1430; ATHLON-LABEL: select_xor_1:
1431; ATHLON:       ## %bb.0: ## %entry
1432; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1433; ATHLON-NEXT:    movl %ecx, %eax
1434; ATHLON-NEXT:    xorl $43, %eax
1435; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1436; ATHLON-NEXT:    cmovel %ecx, %eax
1437; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1438; ATHLON-NEXT:    retl
1439;
1440; MCU-LABEL: select_xor_1:
1441; MCU:       # %bb.0: # %entry
1442; MCU-NEXT:    andl $1, %edx
1443; MCU-NEXT:    negl %edx
1444; MCU-NEXT:    andl $43, %edx
1445; MCU-NEXT:    xorl %edx, %eax
1446; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1447; MCU-NEXT:    retl
1448entry:
1449 %and = and i8 %cond, 1
1450 %cmp10 = icmp eq i8 %and, 0
1451 %0 = xor i16 %A, 43
1452 %1 = select i1 %cmp10, i16 %A, i16 %0
1453 ret i16 %1
1454}
1455
1456; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1457; icmp eq (and %cond, 1), 0
1458define i16 @select_xor_1b(i16 %A, i8 %cond) {
1459; CHECK-LABEL: select_xor_1b:
1460; CHECK:       ## %bb.0: ## %entry
1461; CHECK-NEXT:    movl %edi, %eax
1462; CHECK-NEXT:    xorl $43, %eax
1463; CHECK-NEXT:    testb $1, %sil
1464; CHECK-NEXT:    cmovel %edi, %eax
1465; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
1466; CHECK-NEXT:    retq
1467;
1468; ATHLON-LABEL: select_xor_1b:
1469; ATHLON:       ## %bb.0: ## %entry
1470; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1471; ATHLON-NEXT:    movl %ecx, %eax
1472; ATHLON-NEXT:    xorl $43, %eax
1473; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1474; ATHLON-NEXT:    cmovel %ecx, %eax
1475; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1476; ATHLON-NEXT:    retl
1477;
1478; MCU-LABEL: select_xor_1b:
1479; MCU:       # %bb.0: # %entry
1480; MCU-NEXT:    testb $1, %dl
1481; MCU-NEXT:    je .LBB29_2
1482; MCU-NEXT:  # %bb.1:
1483; MCU-NEXT:    xorl $43, %eax
1484; MCU-NEXT:  .LBB29_2: # %entry
1485; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1486; MCU-NEXT:    retl
1487entry:
1488 %and = and i8 %cond, 1
1489 %cmp10 = icmp ne i8 %and, 1
1490 %0 = xor i16 %A, 43
1491 %1 = select i1 %cmp10, i16 %A, i16 %0
1492 ret i16 %1
1493}
1494
1495define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1496; CHECK-LABEL: select_xor_2:
1497; CHECK:       ## %bb.0: ## %entry
1498; CHECK-NEXT:    movl %esi, %eax
1499; CHECK-NEXT:    xorl %edi, %eax
1500; CHECK-NEXT:    testb $1, %dl
1501; CHECK-NEXT:    cmovel %edi, %eax
1502; CHECK-NEXT:    retq
1503;
1504; ATHLON-LABEL: select_xor_2:
1505; ATHLON:       ## %bb.0: ## %entry
1506; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1507; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1508; ATHLON-NEXT:    xorl %ecx, %eax
1509; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1510; ATHLON-NEXT:    cmovel %ecx, %eax
1511; ATHLON-NEXT:    retl
1512;
1513; MCU-LABEL: select_xor_2:
1514; MCU:       # %bb.0: # %entry
1515; MCU-NEXT:    andl $1, %ecx
1516; MCU-NEXT:    negl %ecx
1517; MCU-NEXT:    andl %edx, %ecx
1518; MCU-NEXT:    xorl %ecx, %eax
1519; MCU-NEXT:    retl
1520entry:
1521 %and = and i8 %cond, 1
1522 %cmp10 = icmp eq i8 %and, 0
1523 %0 = xor i32 %B, %A
1524 %1 = select i1 %cmp10, i32 %A, i32 %0
1525 ret i32 %1
1526}
1527
1528; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1529; icmp eq (and %cond, 1), 0
1530define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) {
1531; CHECK-LABEL: select_xor_2b:
1532; CHECK:       ## %bb.0: ## %entry
1533; CHECK-NEXT:    movl %esi, %eax
1534; CHECK-NEXT:    xorl %edi, %eax
1535; CHECK-NEXT:    testb $1, %dl
1536; CHECK-NEXT:    cmovel %edi, %eax
1537; CHECK-NEXT:    retq
1538;
1539; ATHLON-LABEL: select_xor_2b:
1540; ATHLON:       ## %bb.0: ## %entry
1541; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1542; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1543; ATHLON-NEXT:    xorl %ecx, %eax
1544; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1545; ATHLON-NEXT:    cmovel %ecx, %eax
1546; ATHLON-NEXT:    retl
1547;
1548; MCU-LABEL: select_xor_2b:
1549; MCU:       # %bb.0: # %entry
1550; MCU-NEXT:    testb $1, %cl
1551; MCU-NEXT:    je .LBB31_2
1552; MCU-NEXT:  # %bb.1:
1553; MCU-NEXT:    xorl %edx, %eax
1554; MCU-NEXT:  .LBB31_2: # %entry
1555; MCU-NEXT:    retl
1556entry:
1557 %and = and i8 %cond, 1
1558 %cmp10 = icmp ne i8 %and, 1
1559 %0 = xor i32 %B, %A
1560 %1 = select i1 %cmp10, i32 %A, i32 %0
1561 ret i32 %1
1562}
1563
1564define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1565; CHECK-LABEL: select_or:
1566; CHECK:       ## %bb.0: ## %entry
1567; CHECK-NEXT:    movl %esi, %eax
1568; CHECK-NEXT:    orl %edi, %eax
1569; CHECK-NEXT:    testb $1, %dl
1570; CHECK-NEXT:    cmovel %edi, %eax
1571; CHECK-NEXT:    retq
1572;
1573; ATHLON-LABEL: select_or:
1574; ATHLON:       ## %bb.0: ## %entry
1575; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1576; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1577; ATHLON-NEXT:    orl %ecx, %eax
1578; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1579; ATHLON-NEXT:    cmovel %ecx, %eax
1580; ATHLON-NEXT:    retl
1581;
1582; MCU-LABEL: select_or:
1583; MCU:       # %bb.0: # %entry
1584; MCU-NEXT:    andl $1, %ecx
1585; MCU-NEXT:    negl %ecx
1586; MCU-NEXT:    andl %edx, %ecx
1587; MCU-NEXT:    orl %ecx, %eax
1588; MCU-NEXT:    retl
1589entry:
1590 %and = and i8 %cond, 1
1591 %cmp10 = icmp eq i8 %and, 0
1592 %0 = or i32 %B, %A
1593 %1 = select i1 %cmp10, i32 %A, i32 %0
1594 ret i32 %1
1595}
1596
1597; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1598; icmp eq (and %cond, 1), 0
1599define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) {
1600; CHECK-LABEL: select_or_b:
1601; CHECK:       ## %bb.0: ## %entry
1602; CHECK-NEXT:    movl %esi, %eax
1603; CHECK-NEXT:    orl %edi, %eax
1604; CHECK-NEXT:    testb $1, %dl
1605; CHECK-NEXT:    cmovel %edi, %eax
1606; CHECK-NEXT:    retq
1607;
1608; ATHLON-LABEL: select_or_b:
1609; ATHLON:       ## %bb.0: ## %entry
1610; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1611; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1612; ATHLON-NEXT:    orl %ecx, %eax
1613; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1614; ATHLON-NEXT:    cmovel %ecx, %eax
1615; ATHLON-NEXT:    retl
1616;
1617; MCU-LABEL: select_or_b:
1618; MCU:       # %bb.0: # %entry
1619; MCU-NEXT:    testb $1, %cl
1620; MCU-NEXT:    je .LBB33_2
1621; MCU-NEXT:  # %bb.1:
1622; MCU-NEXT:    orl %edx, %eax
1623; MCU-NEXT:  .LBB33_2: # %entry
1624; MCU-NEXT:    retl
1625entry:
1626 %and = and i8 %cond, 1
1627 %cmp10 = icmp ne i8 %and, 1
1628 %0 = or i32 %B, %A
1629 %1 = select i1 %cmp10, i32 %A, i32 %0
1630 ret i32 %1
1631}
1632
1633define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1634; CHECK-LABEL: select_or_1:
1635; CHECK:       ## %bb.0: ## %entry
1636; CHECK-NEXT:    movl %esi, %eax
1637; CHECK-NEXT:    orl %edi, %eax
1638; CHECK-NEXT:    testb $1, %dl
1639; CHECK-NEXT:    cmovel %edi, %eax
1640; CHECK-NEXT:    retq
1641;
1642; ATHLON-LABEL: select_or_1:
1643; ATHLON:       ## %bb.0: ## %entry
1644; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1645; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1646; ATHLON-NEXT:    orl %ecx, %eax
1647; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1648; ATHLON-NEXT:    cmovel %ecx, %eax
1649; ATHLON-NEXT:    retl
1650;
1651; MCU-LABEL: select_or_1:
1652; MCU:       # %bb.0: # %entry
1653; MCU-NEXT:    andl $1, %ecx
1654; MCU-NEXT:    negl %ecx
1655; MCU-NEXT:    andl %edx, %ecx
1656; MCU-NEXT:    orl %ecx, %eax
1657; MCU-NEXT:    retl
1658entry:
1659 %and = and i32 %cond, 1
1660 %cmp10 = icmp eq i32 %and, 0
1661 %0 = or i32 %B, %A
1662 %1 = select i1 %cmp10, i32 %A, i32 %0
1663 ret i32 %1
1664}
1665
1666; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1667; icmp eq (and %cond, 1), 0
1668define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) {
1669; CHECK-LABEL: select_or_1b:
1670; CHECK:       ## %bb.0: ## %entry
1671; CHECK-NEXT:    movl %esi, %eax
1672; CHECK-NEXT:    orl %edi, %eax
1673; CHECK-NEXT:    testb $1, %dl
1674; CHECK-NEXT:    cmovel %edi, %eax
1675; CHECK-NEXT:    retq
1676;
1677; ATHLON-LABEL: select_or_1b:
1678; ATHLON:       ## %bb.0: ## %entry
1679; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1680; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1681; ATHLON-NEXT:    orl %ecx, %eax
1682; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1683; ATHLON-NEXT:    cmovel %ecx, %eax
1684; ATHLON-NEXT:    retl
1685;
1686; MCU-LABEL: select_or_1b:
1687; MCU:       # %bb.0: # %entry
1688; MCU-NEXT:    testb $1, %cl
1689; MCU-NEXT:    je .LBB35_2
1690; MCU-NEXT:  # %bb.1:
1691; MCU-NEXT:    orl %edx, %eax
1692; MCU-NEXT:  .LBB35_2: # %entry
1693; MCU-NEXT:    retl
1694entry:
1695 %and = and i32 %cond, 1
1696 %cmp10 = icmp ne i32 %and, 1
1697 %0 = or i32 %B, %A
1698 %1 = select i1 %cmp10, i32 %A, i32 %0
1699 ret i32 %1
1700}
1701
1702define i64 @PR51612(i64 %x, i64 %y) {
1703; CHECK-LABEL: PR51612:
1704; CHECK:       ## %bb.0:
1705; CHECK-NEXT:    leal 1(%rsi), %eax
1706; CHECK-NEXT:    incq %rdi
1707; CHECK-NEXT:    cmovnel %edi, %eax
1708; CHECK-NEXT:    andl 10, %eax
1709; CHECK-NEXT:    retq
1710;
1711; ATHLON-LABEL: PR51612:
1712; ATHLON:       ## %bb.0:
1713; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1714; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1715; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
1716; ATHLON-NEXT:    incl %edx
1717; ATHLON-NEXT:    addl $1, %eax
1718; ATHLON-NEXT:    adcl $0, %ecx
1719; ATHLON-NEXT:    cmovbl %edx, %eax
1720; ATHLON-NEXT:    andl 10, %eax
1721; ATHLON-NEXT:    xorl %edx, %edx
1722; ATHLON-NEXT:    retl
1723;
1724; MCU-LABEL: PR51612:
1725; MCU:       # %bb.0:
1726; MCU-NEXT:    addl $1, %eax
1727; MCU-NEXT:    adcl $0, %edx
1728; MCU-NEXT:    jae .LBB36_2
1729; MCU-NEXT:  # %bb.1:
1730; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
1731; MCU-NEXT:    incl %eax
1732; MCU-NEXT:  .LBB36_2:
1733; MCU-NEXT:    andl 10, %eax
1734; MCU-NEXT:    xorl %edx, %edx
1735; MCU-NEXT:    retl
1736  %add = add i64 %x, 1
1737  %inc = add i64 %y, 1
1738  %tobool = icmp eq i64 %add, 0
1739  %sel = select i1 %tobool, i64 %inc, i64 %add
1740  %i = load i32, ptr inttoptr (i32 10 to ptr), align 4
1741  %conv = zext i32 %i to i64
1742  %and = and i64 %sel, %conv
1743  ret i64 %and
1744}
1745
1746; The next 2 tests are for additional bugs based on PR51612.
1747
1748declare { i8, i1 } @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone
1749declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
1750
1751define i8 @select_uaddo_common_op0(i8 %a, i8 %b, i8 %c, i1 %cond) {
1752; GENERIC-LABEL: select_uaddo_common_op0:
1753; GENERIC:       ## %bb.0:
1754; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1755; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
1756; GENERIC-NEXT:    testb $1, %cl
1757; GENERIC-NEXT:    cmovel %edx, %esi
1758; GENERIC-NEXT:    leal (%rsi,%rdi), %eax
1759; GENERIC-NEXT:    ## kill: def $al killed $al killed $eax
1760; GENERIC-NEXT:    retq
1761;
1762; ATOM-LABEL: select_uaddo_common_op0:
1763; ATOM:       ## %bb.0:
1764; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1765; ATOM-NEXT:    testb $1, %cl
1766; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
1767; ATOM-NEXT:    cmovel %edx, %esi
1768; ATOM-NEXT:    leal (%rsi,%rdi), %eax
1769; ATOM-NEXT:    ## kill: def $al killed $al killed $eax
1770; ATOM-NEXT:    nop
1771; ATOM-NEXT:    nop
1772; ATOM-NEXT:    retq
1773;
1774; ATHLON-LABEL: select_uaddo_common_op0:
1775; ATHLON:       ## %bb.0:
1776; ATHLON-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
1777; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1778; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
1779; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
1780; ATHLON-NEXT:    cmovnel %ecx, %edx
1781; ATHLON-NEXT:    addb (%edx), %al
1782; ATHLON-NEXT:    retl
1783;
1784; MCU-LABEL: select_uaddo_common_op0:
1785; MCU:       # %bb.0:
1786; MCU-NEXT:    testb $1, {{[0-9]+}}(%esp)
1787; MCU-NEXT:    jne .LBB37_2
1788; MCU-NEXT:  # %bb.1:
1789; MCU-NEXT:    movl %ecx, %edx
1790; MCU-NEXT:  .LBB37_2:
1791; MCU-NEXT:    addb %dl, %al
1792; MCU-NEXT:    # kill: def $al killed $al killed $eax
1793; MCU-NEXT:    retl
1794  %ab = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %b)
1795  %ac = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %c)
1796  %ab0 = extractvalue { i8, i1 } %ab, 0
1797  %ac0 = extractvalue { i8, i1 } %ac, 0
1798  %sel = select i1 %cond, i8 %ab0, i8 %ac0
1799  ret i8 %sel
1800}
1801
1802define i32 @select_uaddo_common_op1(i32 %a, i32 %b, i32 %c, i1 %cond) {
1803; GENERIC-LABEL: select_uaddo_common_op1:
1804; GENERIC:       ## %bb.0:
1805; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1806; GENERIC-NEXT:    ## kill: def $edi killed $edi def $rdi
1807; GENERIC-NEXT:    testb $1, %cl
1808; GENERIC-NEXT:    cmovel %edx, %edi
1809; GENERIC-NEXT:    leal (%rdi,%rsi), %eax
1810; GENERIC-NEXT:    retq
1811;
1812; ATOM-LABEL: select_uaddo_common_op1:
1813; ATOM:       ## %bb.0:
1814; ATOM-NEXT:    ## kill: def $edi killed $edi def $rdi
1815; ATOM-NEXT:    testb $1, %cl
1816; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1817; ATOM-NEXT:    cmovel %edx, %edi
1818; ATOM-NEXT:    leal (%rdi,%rsi), %eax
1819; ATOM-NEXT:    nop
1820; ATOM-NEXT:    nop
1821; ATOM-NEXT:    retq
1822;
1823; ATHLON-LABEL: select_uaddo_common_op1:
1824; ATHLON:       ## %bb.0:
1825; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1826; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
1827; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
1828; ATHLON-NEXT:    cmovnel %eax, %ecx
1829; ATHLON-NEXT:    movl (%ecx), %eax
1830; ATHLON-NEXT:    addl {{[0-9]+}}(%esp), %eax
1831; ATHLON-NEXT:    retl
1832;
1833; MCU-LABEL: select_uaddo_common_op1:
1834; MCU:       # %bb.0:
1835; MCU-NEXT:    testb $1, {{[0-9]+}}(%esp)
1836; MCU-NEXT:    jne .LBB38_2
1837; MCU-NEXT:  # %bb.1:
1838; MCU-NEXT:    movl %ecx, %eax
1839; MCU-NEXT:  .LBB38_2:
1840; MCU-NEXT:    addl %edx, %eax
1841; MCU-NEXT:    retl
1842  %ab = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
1843  %cb = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %c, i32 %b)
1844  %ab0 = extractvalue { i32, i1 } %ab, 0
1845  %cb0 = extractvalue { i32, i1 } %cb, 0
1846  %sel = select i1 %cond, i32 %ab0, i32 %cb0
1847  ret i32 %sel
1848}
1849