1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom    | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4; RUN: llc < %s -mtriple=i386-intel-elfiamcu                 | FileCheck %s --check-prefix=MCU
5
6; PR5757
7%0 = type { i64, i32 }
8
9define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind {
10; CHECK-LABEL: test1:
11; CHECK:       ## BB#0:
12; CHECK-NEXT:    addq $8, %rdi
13; CHECK-NEXT:    addq $8, %rsi
14; CHECK-NEXT:    testb $1, %dl
15; CHECK-NEXT:    cmovneq %rdi, %rsi
16; CHECK-NEXT:    movl (%rsi), %eax
17; CHECK-NEXT:    retq
18; CHECK-NEXT:    ## -- End function
19;
20; MCU-LABEL: test1:
21; MCU:       # BB#0:
22; MCU-NEXT:    testb $1, %cl
23; MCU-NEXT:    jne .LBB0_1
24; MCU-NEXT:  # BB#2:
25; MCU-NEXT:    addl $8, %edx
26; MCU-NEXT:    movl %edx, %eax
27; MCU-NEXT:    movl (%eax), %eax
28; MCU-NEXT:    retl
29; MCU-NEXT:  .LBB0_1:
30; MCU-NEXT:    addl $8, %eax
31; MCU-NEXT:    movl (%eax), %eax
32; MCU-NEXT:    retl
33  %t0 = load %0, %0* %p
34  %t1 = load %0, %0* %q
35  %t4 = select i1 %r, %0 %t0, %0 %t1
36  %t5 = extractvalue %0 %t4, 1
37  ret i32 %t5
38}
39
40; PR2139
41define i32 @test2() nounwind {
42; CHECK-LABEL: test2:
43; CHECK:       ## BB#0: ## %entry
44; CHECK-NEXT:    pushq %rax
45; CHECK-NEXT:    callq _return_false
46; CHECK-NEXT:    xorl %ecx, %ecx
47; CHECK-NEXT:    testb $1, %al
48; CHECK-NEXT:    movw $-480, %ax ## imm = 0xFE20
49; CHECK-NEXT:    cmovnew %cx, %ax
50; CHECK-NEXT:    cwtl
51; CHECK-NEXT:    shll $3, %eax
52; CHECK-NEXT:    cmpl $32768, %eax ## imm = 0x8000
53; CHECK-NEXT:    jge LBB1_1
54; CHECK-NEXT:  ## BB#2: ## %bb91
55; CHECK-NEXT:    xorl %eax, %eax
56; CHECK-NEXT:    popq %rcx
57; CHECK-NEXT:    retq
58; CHECK-NEXT:  LBB1_1: ## %bb90
59; CHECK-NEXT:    ## -- End function
60;
61; MCU-LABEL: test2:
62; MCU:       # BB#0: # %entry
63; MCU-NEXT:    calll return_false
64; MCU-NEXT:    testb $1, %al
65; MCU-NEXT:    jne .LBB1_1
66; MCU-NEXT:  # BB#2: # %entry
67; MCU-NEXT:    movw $-480, %ax # imm = 0xFE20
68; MCU-NEXT:    jmp .LBB1_3
69; MCU-NEXT:  .LBB1_1:
70; MCU-NEXT:    xorl %eax, %eax
71; MCU-NEXT:  .LBB1_3: # %entry
72; MCU-NEXT:    cwtl
73; MCU-NEXT:    shll $3, %eax
74; MCU-NEXT:    cmpl $32768, %eax # imm = 0x8000
75; MCU-NEXT:    jge .LBB1_4
76; MCU-NEXT:  # BB#5: # %bb91
77; MCU-NEXT:    xorl %eax, %eax
78; MCU-NEXT:    retl
79; MCU-NEXT:  .LBB1_4: # %bb90
80entry:
81  %tmp73 = tail call i1 @return_false()
82  %g.0 = select i1 %tmp73, i16 0, i16 -480
83  %tmp7778 = sext i16 %g.0 to i32
84  %tmp80 = shl i32 %tmp7778, 3
85  %tmp87 = icmp sgt i32 %tmp80, 32767
86  br i1 %tmp87, label %bb90, label %bb91
87bb90:
88  unreachable
89bb91:
90  ret i32 0
91}
92
93declare i1 @return_false()
94
95;; Select between two floating point constants.
96define float @test3(i32 %x) nounwind readnone {
97; CHECK-LABEL: test3:
98; CHECK:       ## BB#0: ## %entry
99; CHECK-NEXT:    xorl %eax, %eax
100; CHECK-NEXT:    testl %edi, %edi
101; CHECK-NEXT:    sete %al
102; CHECK-NEXT:    leaq {{.*}}(%rip), %rcx
103; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
104; CHECK-NEXT:    retq
105; CHECK-NEXT:    ## -- End function
106;
107; MCU-LABEL: test3:
108; MCU:       # BB#0: # %entry
109; MCU-NEXT:    xorl %ecx, %ecx
110; MCU-NEXT:    testl %eax, %eax
111; MCU-NEXT:    sete %cl
112; MCU-NEXT:    flds {{\.LCPI.*}}(,%ecx,4)
113; MCU-NEXT:    retl
114entry:
115  %0 = icmp eq i32 %x, 0
116  %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
117  ret float %iftmp.0.0
118}
119
120define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly {
121; CHECK-LABEL: test4:
122; CHECK:       ## BB#0: ## %entry
123; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
124; CHECK-NEXT:    xorl %eax, %eax
125; CHECK-NEXT:    ucomisd %xmm0, %xmm1
126; CHECK-NEXT:    seta %al
127; CHECK-NEXT:    movsbl (%rdi,%rax,4), %eax
128; CHECK-NEXT:    retq
129; CHECK-NEXT:    ## -- End function
130;
131; MCU-LABEL: test4:
132; MCU:       # BB#0: # %entry
133; MCU-NEXT:    movl %eax, %ecx
134; MCU-NEXT:    fldl {{[0-9]+}}(%esp)
135; MCU-NEXT:    flds {{\.LCPI.*}}
136; MCU-NEXT:    fucompp
137; MCU-NEXT:    fnstsw %ax
138; MCU-NEXT:    xorl %edx, %edx
139; MCU-NEXT:    # kill: %AH<def> %AH<kill> %AX<kill>
140; MCU-NEXT:    sahf
141; MCU-NEXT:    seta %dl
142; MCU-NEXT:    movb (%ecx,%edx,4), %al
143; MCU-NEXT:    retl
144entry:
145  %0 = fcmp olt double %F, 4.200000e+01
146  %iftmp.0.0 = select i1 %0, i32 4, i32 0
147  %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0
148  %2 = load i8, i8* %1, align 1
149  ret i8 %2
150}
151
152define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind {
153; CHECK-LABEL: test5:
154; CHECK:       ## BB#0:
155; CHECK-NEXT:    testb $1, %dil
156; CHECK-NEXT:    jne LBB4_2
157; CHECK-NEXT:  ## BB#1:
158; CHECK-NEXT:    movdqa %xmm1, %xmm0
159; CHECK-NEXT:  LBB4_2:
160; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
161; CHECK-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
162; CHECK-NEXT:    movd %xmm0, (%rsi)
163; CHECK-NEXT:    retq
164; CHECK-NEXT:    ## -- End function
165;
166; MCU-LABEL: test5:
167; MCU:       # BB#0:
168; MCU-NEXT:    pushl %esi
169; MCU-NEXT:    movl {{[0-9]+}}(%esp), %esi
170; MCU-NEXT:    testb $1, %al
171; MCU-NEXT:    jne .LBB4_2
172; MCU-NEXT:  # BB#1:
173; MCU-NEXT:    movw {{[0-9]+}}(%esp), %cx
174; MCU-NEXT:    movw {{[0-9]+}}(%esp), %dx
175; MCU-NEXT:  .LBB4_2:
176; MCU-NEXT:    movw %cx, 2(%esi)
177; MCU-NEXT:    movw %dx, (%esi)
178; MCU-NEXT:    popl %esi
179; MCU-NEXT:    retl
180  %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
181  store <2 x i16> %x, <2 x i16>* %p
182  ret void
183}
184
185; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
186define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
187; CHECK-LABEL: test6:
188; CHECK:       ## BB#0:
189; CHECK-NEXT:    testl %edi, %edi
190; CHECK-NEXT:    je LBB5_1
191; CHECK-NEXT:  ## BB#2:
192; CHECK-NEXT:    movaps (%rsi), %xmm0
193; CHECK-NEXT:    movaps %xmm0, (%rsi)
194; CHECK-NEXT:    retq
195; CHECK-NEXT:  LBB5_1:
196; CHECK-NEXT:    movaps (%rdx), %xmm0
197; CHECK-NEXT:    mulps %xmm0, %xmm0
198; CHECK-NEXT:    movaps %xmm0, (%rsi)
199; CHECK-NEXT:    retq
200; CHECK-NEXT:    ## -- End function
201;
202; MCU-LABEL: test6:
203; MCU:       # BB#0:
204; MCU-NEXT:    pushl %eax
205; MCU-NEXT:    flds 12(%edx)
206; MCU-NEXT:    fstps (%esp) # 4-byte Folded Spill
207; MCU-NEXT:    flds 8(%edx)
208; MCU-NEXT:    flds 4(%edx)
209; MCU-NEXT:    flds (%ecx)
210; MCU-NEXT:    flds 4(%ecx)
211; MCU-NEXT:    flds 8(%ecx)
212; MCU-NEXT:    flds 12(%ecx)
213; MCU-NEXT:    fmul %st(0), %st(0)
214; MCU-NEXT:    fxch %st(1)
215; MCU-NEXT:    fmul %st(0), %st(0)
216; MCU-NEXT:    fxch %st(2)
217; MCU-NEXT:    fmul %st(0), %st(0)
218; MCU-NEXT:    fxch %st(3)
219; MCU-NEXT:    fmul %st(0), %st(0)
220; MCU-NEXT:    testl %eax, %eax
221; MCU-NEXT:    flds (%edx)
222; MCU-NEXT:    je .LBB5_2
223; MCU-NEXT:  # BB#1:
224; MCU-NEXT:    fstp %st(1)
225; MCU-NEXT:    fstp %st(3)
226; MCU-NEXT:    fstp %st(1)
227; MCU-NEXT:    fstp %st(0)
228; MCU-NEXT:    flds (%esp) # 4-byte Folded Reload
229; MCU-NEXT:    fldz
230; MCU-NEXT:    fldz
231; MCU-NEXT:    fldz
232; MCU-NEXT:    fxch %st(1)
233; MCU-NEXT:    fxch %st(6)
234; MCU-NEXT:    fxch %st(1)
235; MCU-NEXT:    fxch %st(5)
236; MCU-NEXT:    fxch %st(4)
237; MCU-NEXT:    fxch %st(1)
238; MCU-NEXT:    fxch %st(3)
239; MCU-NEXT:    fxch %st(2)
240; MCU-NEXT:  .LBB5_2:
241; MCU-NEXT:    fstp %st(0)
242; MCU-NEXT:    fstp %st(5)
243; MCU-NEXT:    fstp %st(3)
244; MCU-NEXT:    fxch %st(2)
245; MCU-NEXT:    fstps 12(%edx)
246; MCU-NEXT:    fxch %st(1)
247; MCU-NEXT:    fstps 8(%edx)
248; MCU-NEXT:    fstps 4(%edx)
249; MCU-NEXT:    fstps (%edx)
250; MCU-NEXT:    popl %eax
251; MCU-NEXT:    retl
252  %tmp = load <4 x float>, <4 x float>* %A
253  %tmp3 = load <4 x float>, <4 x float>* %B
254  %tmp9 = fmul <4 x float> %tmp3, %tmp3
255  %tmp.upgrd.1 = icmp eq i32 %C, 0
256  %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
257  store <4 x float> %iftmp.38.0, <4 x float>* %A
258  ret void
259}
260
261; Select with fp80's
262define x86_fp80 @test7(i32 %tmp8) nounwind {
263; CHECK-LABEL: test7:
264; CHECK:       ## BB#0:
265; CHECK-NEXT:    xorl %eax, %eax
266; CHECK-NEXT:    testl %edi, %edi
267; CHECK-NEXT:    setns %al
268; CHECK-NEXT:    shlq $4, %rax
269; CHECK-NEXT:    leaq {{.*}}(%rip), %rcx
270; CHECK-NEXT:    fldt (%rax,%rcx)
271; CHECK-NEXT:    retq
272; CHECK-NEXT:    ## -- End function
273;
274; MCU-LABEL: test7:
275; MCU:       # BB#0:
276; MCU-NEXT:    xorl %ecx, %ecx
277; MCU-NEXT:    testl %eax, %eax
278; MCU-NEXT:    setns %cl
279; MCU-NEXT:    shll $4, %ecx
280; MCU-NEXT:    fldt {{\.LCPI.*}}(%ecx)
281; MCU-NEXT:    retl
282  %tmp9 = icmp sgt i32 %tmp8, -1
283  %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
284  ret x86_fp80 %retval
285}
286
287; widening select v6i32 and then a sub
288define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
289; GENERIC-LABEL: test8:
290; GENERIC:       ## BB#0:
291; GENERIC-NEXT:    testb $1, %dil
292; GENERIC-NEXT:    jne LBB7_1
293; GENERIC-NEXT:  ## BB#2:
294; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
295; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
296; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
297; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
298; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
299; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
300; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
301; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
302; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
303; GENERIC-NEXT:    jmp LBB7_3
304; GENERIC-NEXT:  LBB7_1:
305; GENERIC-NEXT:    movd %r9d, %xmm0
306; GENERIC-NEXT:    movd %r8d, %xmm1
307; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
308; GENERIC-NEXT:    movd %ecx, %xmm2
309; GENERIC-NEXT:    movd %edx, %xmm0
310; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
311; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
312; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
313; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
314; GENERIC-NEXT:  LBB7_3:
315; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
316; GENERIC-NEXT:    pcmpeqd %xmm2, %xmm2
317; GENERIC-NEXT:    paddd %xmm2, %xmm0
318; GENERIC-NEXT:    paddd %xmm2, %xmm1
319; GENERIC-NEXT:    movq %xmm1, 16(%rsi)
320; GENERIC-NEXT:    movdqa %xmm0, (%rsi)
321; GENERIC-NEXT:    retq
322; GENERIC-NEXT:    ## -- End function
323;
324; ATOM-LABEL: test8:
325; ATOM:       ## BB#0:
326; ATOM-NEXT:    testb $1, %dil
327; ATOM-NEXT:    jne LBB7_1
328; ATOM-NEXT:  ## BB#2:
329; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
330; ATOM-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
331; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
332; ATOM-NEXT:    movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
333; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
334; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
335; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
336; ATOM-NEXT:    jmp LBB7_3
337; ATOM-NEXT:  LBB7_1:
338; ATOM-NEXT:    movd %r9d, %xmm0
339; ATOM-NEXT:    movd %r8d, %xmm2
340; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
341; ATOM-NEXT:    movd %ecx, %xmm3
342; ATOM-NEXT:    movd %edx, %xmm0
343; ATOM-NEXT:    movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
344; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
345; ATOM-NEXT:  LBB7_3:
346; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
347; ATOM-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
348; ATOM-NEXT:    pcmpeqd %xmm2, %xmm2
349; ATOM-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1]
350; ATOM-NEXT:    paddd %xmm2, %xmm0
351; ATOM-NEXT:    paddd %xmm2, %xmm1
352; ATOM-NEXT:    movdqa %xmm0, (%rsi)
353; ATOM-NEXT:    movq %xmm1, 16(%rsi)
354; ATOM-NEXT:    retq
355; ATOM-NEXT:    ## -- End function
356;
357; MCU-LABEL: test8:
358; MCU:       # BB#0:
359; MCU-NEXT:    pushl %ebp
360; MCU-NEXT:    pushl %ebx
361; MCU-NEXT:    pushl %edi
362; MCU-NEXT:    pushl %esi
363; MCU-NEXT:    testb $1, %al
364; MCU-NEXT:    jne .LBB7_1
365; MCU-NEXT:  # BB#2:
366; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
367; MCU-NEXT:    movl (%eax), %eax
368; MCU-NEXT:    je .LBB7_5
369; MCU-NEXT:  .LBB7_4:
370; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
371; MCU-NEXT:    movl (%ecx), %ecx
372; MCU-NEXT:    je .LBB7_8
373; MCU-NEXT:  .LBB7_7:
374; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
375; MCU-NEXT:    movl (%esi), %esi
376; MCU-NEXT:    je .LBB7_11
377; MCU-NEXT:  .LBB7_10:
378; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
379; MCU-NEXT:    movl (%edi), %edi
380; MCU-NEXT:    je .LBB7_14
381; MCU-NEXT:  .LBB7_13:
382; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebx
383; MCU-NEXT:    movl (%ebx), %ebx
384; MCU-NEXT:    je .LBB7_17
385; MCU-NEXT:  .LBB7_16:
386; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
387; MCU-NEXT:    jmp .LBB7_18
388; MCU-NEXT:  .LBB7_1:
389; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
390; MCU-NEXT:    movl (%eax), %eax
391; MCU-NEXT:    jne .LBB7_4
392; MCU-NEXT:  .LBB7_5:
393; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
394; MCU-NEXT:    movl (%ecx), %ecx
395; MCU-NEXT:    jne .LBB7_7
396; MCU-NEXT:  .LBB7_8:
397; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
398; MCU-NEXT:    movl (%esi), %esi
399; MCU-NEXT:    jne .LBB7_10
400; MCU-NEXT:  .LBB7_11:
401; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
402; MCU-NEXT:    movl (%edi), %edi
403; MCU-NEXT:    jne .LBB7_13
404; MCU-NEXT:  .LBB7_14:
405; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebx
406; MCU-NEXT:    movl (%ebx), %ebx
407; MCU-NEXT:    jne .LBB7_16
408; MCU-NEXT:  .LBB7_17:
409; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
410; MCU-NEXT:  .LBB7_18:
411; MCU-NEXT:    movl (%ebp), %ebp
412; MCU-NEXT:    decl %ebp
413; MCU-NEXT:    decl %ebx
414; MCU-NEXT:    decl %edi
415; MCU-NEXT:    decl %esi
416; MCU-NEXT:    decl %ecx
417; MCU-NEXT:    decl %eax
418; MCU-NEXT:    movl %eax, 20(%edx)
419; MCU-NEXT:    movl %ecx, 16(%edx)
420; MCU-NEXT:    movl %esi, 12(%edx)
421; MCU-NEXT:    movl %edi, 8(%edx)
422; MCU-NEXT:    movl %ebx, 4(%edx)
423; MCU-NEXT:    movl %ebp, (%edx)
424; MCU-NEXT:    popl %esi
425; MCU-NEXT:    popl %edi
426; MCU-NEXT:    popl %ebx
427; MCU-NEXT:    popl %ebp
428; MCU-NEXT:    retl
429  %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
430  %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
431  store <6 x i32> %val, <6 x i32>* %dst.addr
432  ret void
433}
434
435
436;; Test integer select between values and constants.
437
438define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
439; GENERIC-LABEL: test9:
440; GENERIC:       ## BB#0:
441; GENERIC-NEXT:    cmpq $1, %rdi
442; GENERIC-NEXT:    sbbq %rax, %rax
443; GENERIC-NEXT:    orq %rsi, %rax
444; GENERIC-NEXT:    retq
445; GENERIC-NEXT:    ## -- End function
446;
447; ATOM-LABEL: test9:
448; ATOM:       ## BB#0:
449; ATOM-NEXT:    cmpq $1, %rdi
450; ATOM-NEXT:    sbbq %rax, %rax
451; ATOM-NEXT:    orq %rsi, %rax
452; ATOM-NEXT:    nop
453; ATOM-NEXT:    nop
454; ATOM-NEXT:    retq
455; ATOM-NEXT:    ## -- End function
456;
457; MCU-LABEL: test9:
458; MCU:       # BB#0:
459; MCU-NEXT:    orl %edx, %eax
460; MCU-NEXT:    jne .LBB8_1
461; MCU-NEXT:  # BB#2:
462; MCU-NEXT:    movl $-1, %eax
463; MCU-NEXT:    movl $-1, %edx
464; MCU-NEXT:    retl
465; MCU-NEXT:  .LBB8_1:
466; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
467; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
468; MCU-NEXT:    retl
469  %cmp = icmp ne i64 %x, 0
470  %cond = select i1 %cmp, i64 %y, i64 -1
471  ret i64 %cond
472}
473
474;; Same as test9
475define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
476; GENERIC-LABEL: test9a:
477; GENERIC:       ## BB#0:
478; GENERIC-NEXT:    cmpq $1, %rdi
479; GENERIC-NEXT:    sbbq %rax, %rax
480; GENERIC-NEXT:    orq %rsi, %rax
481; GENERIC-NEXT:    retq
482; GENERIC-NEXT:    ## -- End function
483;
484; ATOM-LABEL: test9a:
485; ATOM:       ## BB#0:
486; ATOM-NEXT:    cmpq $1, %rdi
487; ATOM-NEXT:    sbbq %rax, %rax
488; ATOM-NEXT:    orq %rsi, %rax
489; ATOM-NEXT:    nop
490; ATOM-NEXT:    nop
491; ATOM-NEXT:    retq
492; ATOM-NEXT:    ## -- End function
493;
494; MCU-LABEL: test9a:
495; MCU:       # BB#0:
496; MCU-NEXT:    orl %edx, %eax
497; MCU-NEXT:    movl $-1, %eax
498; MCU-NEXT:    movl $-1, %edx
499; MCU-NEXT:    je .LBB9_2
500; MCU-NEXT:  # BB#1:
501; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
502; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
503; MCU-NEXT:  .LBB9_2:
504; MCU-NEXT:    retl
505  %cmp = icmp eq i64 %x, 0
506  %cond = select i1 %cmp, i64 -1, i64 %y
507  ret i64 %cond
508}
509
510define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
511; GENERIC-LABEL: test9b:
512; GENERIC:       ## BB#0:
513; GENERIC-NEXT:    cmpq $1, %rdi
514; GENERIC-NEXT:    sbbq %rax, %rax
515; GENERIC-NEXT:    orq %rsi, %rax
516; GENERIC-NEXT:    retq
517; GENERIC-NEXT:    ## -- End function
518;
519; ATOM-LABEL: test9b:
520; ATOM:       ## BB#0:
521; ATOM-NEXT:    cmpq $1, %rdi
522; ATOM-NEXT:    sbbq %rax, %rax
523; ATOM-NEXT:    orq %rsi, %rax
524; ATOM-NEXT:    nop
525; ATOM-NEXT:    nop
526; ATOM-NEXT:    retq
527; ATOM-NEXT:    ## -- End function
528;
529; MCU-LABEL: test9b:
530; MCU:       # BB#0:
531; MCU-NEXT:    movl %edx, %ecx
532; MCU-NEXT:    xorl %edx, %edx
533; MCU-NEXT:    orl %ecx, %eax
534; MCU-NEXT:    sete %dl
535; MCU-NEXT:    negl %edx
536; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
537; MCU-NEXT:    orl %edx, %eax
538; MCU-NEXT:    orl {{[0-9]+}}(%esp), %edx
539; MCU-NEXT:    retl
540  %cmp = icmp eq i64 %x, 0
541  %A = sext i1 %cmp to i64
542  %cond = or i64 %y, %A
543  ret i64 %cond
544}
545
546;; Select between -1 and 1.
547define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
548; CHECK-LABEL: test10:
549; CHECK:       ## BB#0:
550; CHECK-NEXT:    xorl %eax, %eax
551; CHECK-NEXT:    testq %rdi, %rdi
552; CHECK-NEXT:    setne %al
553; CHECK-NEXT:    leaq -1(%rax,%rax), %rax
554; CHECK-NEXT:    retq
555; CHECK-NEXT:    ## -- End function
556;
557; MCU-LABEL: test10:
558; MCU:       # BB#0:
559; MCU-NEXT:    orl %edx, %eax
560; MCU-NEXT:    movl $-1, %eax
561; MCU-NEXT:    movl $-1, %edx
562; MCU-NEXT:    je .LBB11_2
563; MCU-NEXT:  # BB#1:
564; MCU-NEXT:    xorl %edx, %edx
565; MCU-NEXT:    movl $1, %eax
566; MCU-NEXT:  .LBB11_2:
567; MCU-NEXT:    retl
568  %cmp = icmp eq i64 %x, 0
569  %cond = select i1 %cmp, i64 -1, i64 1
570  ret i64 %cond
571}
572
573define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
574; CHECK-LABEL: test11:
575; CHECK:       ## BB#0:
576; CHECK-NEXT:    cmpq $1, %rdi
577; CHECK-NEXT:    sbbq %rax, %rax
578; CHECK-NEXT:    notq %rax
579; CHECK-NEXT:    orq %rsi, %rax
580; CHECK-NEXT:    retq
581; CHECK-NEXT:    ## -- End function
582;
583; MCU-LABEL: test11:
584; MCU:       # BB#0:
585; MCU-NEXT:    orl %edx, %eax
586; MCU-NEXT:    je .LBB12_1
587; MCU-NEXT:  # BB#2:
588; MCU-NEXT:    movl $-1, %eax
589; MCU-NEXT:    movl $-1, %edx
590; MCU-NEXT:    retl
591; MCU-NEXT:  .LBB12_1:
592; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
593; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
594; MCU-NEXT:    retl
595  %cmp = icmp eq i64 %x, 0
596  %cond = select i1 %cmp, i64 %y, i64 -1
597  ret i64 %cond
598}
599
600define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
601; CHECK-LABEL: test11a:
602; CHECK:       ## BB#0:
603; CHECK-NEXT:    cmpq $1, %rdi
604; CHECK-NEXT:    sbbq %rax, %rax
605; CHECK-NEXT:    notq %rax
606; CHECK-NEXT:    orq %rsi, %rax
607; CHECK-NEXT:    retq
608; CHECK-NEXT:    ## -- End function
609;
610; MCU-LABEL: test11a:
611; MCU:       # BB#0:
612; MCU-NEXT:    orl %edx, %eax
613; MCU-NEXT:    movl $-1, %eax
614; MCU-NEXT:    movl $-1, %edx
615; MCU-NEXT:    jne .LBB13_2
616; MCU-NEXT:  # BB#1:
617; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
618; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
619; MCU-NEXT:  .LBB13_2:
620; MCU-NEXT:    retl
621  %cmp = icmp ne i64 %x, 0
622  %cond = select i1 %cmp, i64 -1, i64 %y
623  ret i64 %cond
624}
625
626
627declare noalias i8* @_Znam(i64) noredzone
628
629define noalias i8* @test12(i64 %count) nounwind ssp noredzone {
630; GENERIC-LABEL: test12:
631; GENERIC:       ## BB#0: ## %entry
632; GENERIC-NEXT:    movl $4, %ecx
633; GENERIC-NEXT:    movq %rdi, %rax
634; GENERIC-NEXT:    mulq %rcx
635; GENERIC-NEXT:    movq $-1, %rdi
636; GENERIC-NEXT:    cmovnoq %rax, %rdi
637; GENERIC-NEXT:    jmp __Znam ## TAILCALL
638; GENERIC-NEXT:    ## -- End function
639;
640; ATOM-LABEL: test12:
641; ATOM:       ## BB#0: ## %entry
642; ATOM-NEXT:    movq %rdi, %rax
643; ATOM-NEXT:    movl $4, %ecx
644; ATOM-NEXT:    mulq %rcx
645; ATOM-NEXT:    movq $-1, %rdi
646; ATOM-NEXT:    cmovnoq %rax, %rdi
647; ATOM-NEXT:    jmp __Znam ## TAILCALL
648; ATOM-NEXT:    ## -- End function
649;
650; MCU-LABEL: test12:
651; MCU:       # BB#0: # %entry
652; MCU-NEXT:    pushl %ebp
653; MCU-NEXT:    pushl %ebx
654; MCU-NEXT:    pushl %edi
655; MCU-NEXT:    pushl %esi
656; MCU-NEXT:    movl %edx, %ebx
657; MCU-NEXT:    movl %eax, %ebp
658; MCU-NEXT:    movl $4, %ecx
659; MCU-NEXT:    mull %ecx
660; MCU-NEXT:    movl %eax, %esi
661; MCU-NEXT:    leal (%edx,%ebx,4), %edi
662; MCU-NEXT:    movl %edi, %edx
663; MCU-NEXT:    pushl $0
664; MCU-NEXT:    pushl $4
665; MCU-NEXT:    calll __udivdi3
666; MCU-NEXT:    addl $8, %esp
667; MCU-NEXT:    xorl %ebx, %edx
668; MCU-NEXT:    xorl %ebp, %eax
669; MCU-NEXT:    orl %edx, %eax
670; MCU-NEXT:    movl $-1, %eax
671; MCU-NEXT:    movl $-1, %edx
672; MCU-NEXT:    jne .LBB14_2
673; MCU-NEXT:  # BB#1: # %entry
674; MCU-NEXT:    movl %esi, %eax
675; MCU-NEXT:    movl %edi, %edx
676; MCU-NEXT:  .LBB14_2: # %entry
677; MCU-NEXT:    popl %esi
678; MCU-NEXT:    popl %edi
679; MCU-NEXT:    popl %ebx
680; MCU-NEXT:    popl %ebp
681; MCU-NEXT:    jmp _Znam # TAILCALL
682entry:
683  %A = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %count, i64 4)
684  %B = extractvalue { i64, i1 } %A, 1
685  %C = extractvalue { i64, i1 } %A, 0
686  %D = select i1 %B, i64 -1, i64 %C
687  %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone
688  ret i8* %call
689}
690
691declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone
692
693define i32 @test13(i32 %a, i32 %b) nounwind {
694; GENERIC-LABEL: test13:
695; GENERIC:       ## BB#0:
696; GENERIC-NEXT:    cmpl %esi, %edi
697; GENERIC-NEXT:    sbbl %eax, %eax
698; GENERIC-NEXT:    retq
699; GENERIC-NEXT:    ## -- End function
700;
701; ATOM-LABEL: test13:
702; ATOM:       ## BB#0:
703; ATOM-NEXT:    cmpl %esi, %edi
704; ATOM-NEXT:    sbbl %eax, %eax
705; ATOM-NEXT:    nop
706; ATOM-NEXT:    nop
707; ATOM-NEXT:    nop
708; ATOM-NEXT:    nop
709; ATOM-NEXT:    retq
710; ATOM-NEXT:    ## -- End function
711;
712; MCU-LABEL: test13:
713; MCU:       # BB#0:
714; MCU-NEXT:    cmpl %edx, %eax
715; MCU-NEXT:    sbbl %eax, %eax
716; MCU-NEXT:    retl
717  %c = icmp ult i32 %a, %b
718  %d = sext i1 %c to i32
719  ret i32 %d
720}
721
722define i32 @test14(i32 %a, i32 %b) nounwind {
723; CHECK-LABEL: test14:
724; CHECK:       ## BB#0:
725; CHECK-NEXT:    xorl %eax, %eax
726; CHECK-NEXT:    cmpl %esi, %edi
727; CHECK-NEXT:    setae %al
728; CHECK-NEXT:    negl %eax
729; CHECK-NEXT:    retq
730; CHECK-NEXT:    ## -- End function
731;
732; MCU-LABEL: test14:
733; MCU:       # BB#0:
734; MCU-NEXT:    xorl %ecx, %ecx
735; MCU-NEXT:    cmpl %edx, %eax
736; MCU-NEXT:    setae %cl
737; MCU-NEXT:    negl %ecx
738; MCU-NEXT:    movl %ecx, %eax
739; MCU-NEXT:    retl
740  %c = icmp uge i32 %a, %b
741  %d = sext i1 %c to i32
742  ret i32 %d
743}
744
745; rdar://10961709
746define i32 @test15(i32 %x) nounwind {
747; GENERIC-LABEL: test15:
748; GENERIC:       ## BB#0: ## %entry
749; GENERIC-NEXT:    negl %edi
750; GENERIC-NEXT:    sbbl %eax, %eax
751; GENERIC-NEXT:    retq
752; GENERIC-NEXT:    ## -- End function
753;
754; ATOM-LABEL: test15:
755; ATOM:       ## BB#0: ## %entry
756; ATOM-NEXT:    negl %edi
757; ATOM-NEXT:    sbbl %eax, %eax
758; ATOM-NEXT:    nop
759; ATOM-NEXT:    nop
760; ATOM-NEXT:    nop
761; ATOM-NEXT:    nop
762; ATOM-NEXT:    retq
763; ATOM-NEXT:    ## -- End function
764;
765; MCU-LABEL: test15:
766; MCU:       # BB#0: # %entry
767; MCU-NEXT:    negl %eax
768; MCU-NEXT:    sbbl %eax, %eax
769; MCU-NEXT:    retl
770entry:
771  %cmp = icmp ne i32 %x, 0
772  %sub = sext i1 %cmp to i32
773  ret i32 %sub
774}
775
776define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
777; GENERIC-LABEL: test16:
778; GENERIC:       ## BB#0: ## %entry
779; GENERIC-NEXT:    negq %rdi
780; GENERIC-NEXT:    sbbq %rax, %rax
781; GENERIC-NEXT:    retq
782;
783; ATOM-LABEL: test16:
784; ATOM:       ## BB#0: ## %entry
785; ATOM-NEXT:    negq %rdi
786; ATOM-NEXT:    sbbq %rax, %rax
787; ATOM-NEXT:    nop
788; ATOM-NEXT:    nop
789; ATOM-NEXT:    nop
790; ATOM-NEXT:    nop
791; ATOM-NEXT:    retq
792;
793; MCU-LABEL: test16:
794; MCU:       # BB#0: # %entry
795; MCU-NEXT:    movl %eax, %ecx
796; MCU-NEXT:    xorl %eax, %eax
797; MCU-NEXT:    orl %edx, %ecx
798; MCU-NEXT:    setne %al
799; MCU-NEXT:    negl %eax
800; MCU-NEXT:    movl %eax, %edx
801; MCU-NEXT:    retl
802entry:
803  %cmp = icmp ne i64 %x, 0
804  %conv1 = sext i1 %cmp to i64
805  ret i64 %conv1
806}
807
808define i16 @test17(i16 %x) nounwind {
809; GENERIC-LABEL: test17:
810; GENERIC:       ## BB#0: ## %entry
811; GENERIC-NEXT:    negw %di
812; GENERIC-NEXT:    sbbl %eax, %eax
813; GENERIC-NEXT:    ## kill: %AX<def> %AX<kill> %EAX<kill>
814; GENERIC-NEXT:    retq
815; GENERIC-NEXT:    ## -- End function
816;
817; ATOM-LABEL: test17:
818; ATOM:       ## BB#0: ## %entry
819; ATOM-NEXT:    negw %di
820; ATOM-NEXT:    sbbl %eax, %eax
821; ATOM-NEXT:    ## kill: %AX<def> %AX<kill> %EAX<kill>
822; ATOM-NEXT:    nop
823; ATOM-NEXT:    nop
824; ATOM-NEXT:    nop
825; ATOM-NEXT:    nop
826; ATOM-NEXT:    retq
827; ATOM-NEXT:    ## -- End function
828;
829; MCU-LABEL: test17:
830; MCU:       # BB#0: # %entry
831; MCU-NEXT:    negw %ax
832; MCU-NEXT:    sbbl %eax, %eax
833; MCU-NEXT:    # kill: %AX<def> %AX<kill> %EAX<kill>
834; MCU-NEXT:    retl
835entry:
836  %cmp = icmp ne i16 %x, 0
837  %sub = sext i1 %cmp to i16
838  ret i16 %sub
839}
840
841define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
842; GENERIC-LABEL: test18:
843; GENERIC:       ## BB#0:
844; GENERIC-NEXT:    cmpl $15, %edi
845; GENERIC-NEXT:    cmovgel %edx, %esi
846; GENERIC-NEXT:    movl %esi, %eax
847; GENERIC-NEXT:    retq
848; GENERIC-NEXT:    ## -- End function
849;
850; ATOM-LABEL: test18:
851; ATOM:       ## BB#0:
852; ATOM-NEXT:    cmpl $15, %edi
853; ATOM-NEXT:    cmovgel %edx, %esi
854; ATOM-NEXT:    movl %esi, %eax
855; ATOM-NEXT:    nop
856; ATOM-NEXT:    nop
857; ATOM-NEXT:    retq
858; ATOM-NEXT:    ## -- End function
859;
860; MCU-LABEL: test18:
861; MCU:       # BB#0:
862; MCU-NEXT:    cmpl $15, %eax
863; MCU-NEXT:    jl .LBB20_2
864; MCU-NEXT:  # BB#1:
865; MCU-NEXT:    movl %ecx, %edx
866; MCU-NEXT:  .LBB20_2:
867; MCU-NEXT:    movl %edx, %eax
868; MCU-NEXT:    retl
869  %cmp = icmp slt i32 %x, 15
870  %sel = select i1 %cmp, i8 %a, i8 %b
871  ret i8 %sel
872}
873
874define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
875; CHECK-LABEL: trunc_select_miscompile:
876; CHECK:       ## BB#0:
877; CHECK-NEXT:    orb $2, %sil
878; CHECK-NEXT:    movl %esi, %ecx
879; CHECK-NEXT:    shll %cl, %edi
880; CHECK-NEXT:    movl %edi, %eax
881; CHECK-NEXT:    retq
882;
883; MCU-LABEL: trunc_select_miscompile:
884; MCU:       # BB#0:
885; MCU-NEXT:    orb $2, %dl
886; MCU-NEXT:    movl %edx, %ecx
887; MCU-NEXT:    shll %cl, %eax
888; MCU-NEXT:    retl
889  %tmp1 = select i1 %cc, i32 3, i32 2
890  %tmp2 = shl i32 %a, %tmp1
891  ret i32 %tmp2
892}
893
894; reproducer for pr29002
895define void @clamp_i8(i32 %src, i8* %dst) {
896; GENERIC-LABEL: clamp_i8:
897; GENERIC:       ## BB#0:
898; GENERIC-NEXT:    cmpl $127, %edi
899; GENERIC-NEXT:    movl $127, %eax
900; GENERIC-NEXT:    cmovlel %edi, %eax
901; GENERIC-NEXT:    cmpl $-128, %eax
902; GENERIC-NEXT:    movb $-128, %cl
903; GENERIC-NEXT:    jl LBB22_2
904; GENERIC-NEXT:  ## BB#1:
905; GENERIC-NEXT:    movl %eax, %ecx
906; GENERIC-NEXT:  LBB22_2:
907; GENERIC-NEXT:    movb %cl, (%rsi)
908; GENERIC-NEXT:    retq
909;
910; ATOM-LABEL: clamp_i8:
911; ATOM:       ## BB#0:
912; ATOM-NEXT:    cmpl $127, %edi
913; ATOM-NEXT:    movl $127, %eax
914; ATOM-NEXT:    cmovlel %edi, %eax
915; ATOM-NEXT:    movb $-128, %cl
916; ATOM-NEXT:    cmpl $-128, %eax
917; ATOM-NEXT:    jl LBB22_2
918; ATOM-NEXT:  ## BB#1:
919; ATOM-NEXT:    movl %eax, %ecx
920; ATOM-NEXT:  LBB22_2:
921; ATOM-NEXT:    movb %cl, (%rsi)
922; ATOM-NEXT:    retq
923;
924; MCU-LABEL: clamp_i8:
925; MCU:       # BB#0:
926; MCU-NEXT:    cmpl $127, %eax
927; MCU-NEXT:    movl $127, %ecx
928; MCU-NEXT:    jg .LBB22_2
929; MCU-NEXT:  # BB#1:
930; MCU-NEXT:    movl %eax, %ecx
931; MCU-NEXT:  .LBB22_2:
932; MCU-NEXT:    cmpl $-128, %ecx
933; MCU-NEXT:    movb $-128, %al
934; MCU-NEXT:    jl .LBB22_4
935; MCU-NEXT:  # BB#3:
936; MCU-NEXT:    movl %ecx, %eax
937; MCU-NEXT:  .LBB22_4:
938; MCU-NEXT:    movb %al, (%edx)
939; MCU-NEXT:    retl
940  %cmp = icmp sgt i32 %src, 127
941  %sel1 = select i1 %cmp, i32 127, i32 %src
942  %cmp1 = icmp slt i32 %sel1, -128
943  %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
944  %conv = trunc i32 %sel2 to i8
945  store i8 %conv, i8* %dst, align 2
946  ret void
947}
948
949; reproducer for pr29002
950define void @clamp(i32 %src, i16* %dst) {
951; GENERIC-LABEL: clamp:
952; GENERIC:       ## BB#0:
953; GENERIC-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
954; GENERIC-NEXT:    movl $32767, %eax ## imm = 0x7FFF
955; GENERIC-NEXT:    cmovlel %edi, %eax
956; GENERIC-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
957; GENERIC-NEXT:    movw $-32768, %cx ## imm = 0x8000
958; GENERIC-NEXT:    cmovgew %ax, %cx
959; GENERIC-NEXT:    movw %cx, (%rsi)
960; GENERIC-NEXT:    retq
961;
962; ATOM-LABEL: clamp:
963; ATOM:       ## BB#0:
964; ATOM-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
965; ATOM-NEXT:    movl $32767, %eax ## imm = 0x7FFF
966; ATOM-NEXT:    cmovlel %edi, %eax
967; ATOM-NEXT:    movw $-32768, %cx ## imm = 0x8000
968; ATOM-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
969; ATOM-NEXT:    cmovgew %ax, %cx
970; ATOM-NEXT:    movw %cx, (%rsi)
971; ATOM-NEXT:    retq
972;
973; MCU-LABEL: clamp:
974; MCU:       # BB#0:
975; MCU-NEXT:    cmpl $32767, %eax # imm = 0x7FFF
976; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
977; MCU-NEXT:    jg .LBB23_2
978; MCU-NEXT:  # BB#1:
979; MCU-NEXT:    movl %eax, %ecx
980; MCU-NEXT:  .LBB23_2:
981; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
982; MCU-NEXT:    movw $-32768, %ax # imm = 0x8000
983; MCU-NEXT:    jl .LBB23_4
984; MCU-NEXT:  # BB#3:
985; MCU-NEXT:    movl %ecx, %eax
986; MCU-NEXT:  .LBB23_4:
987; MCU-NEXT:    movw %ax, (%edx)
988; MCU-NEXT:    retl
989  %cmp = icmp sgt i32 %src, 32767
990  %sel1 = select i1 %cmp, i32 32767, i32 %src
991  %cmp1 = icmp slt i32 %sel1, -32768
992  %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
993  %conv = trunc i32 %sel2 to i16
994  store i16 %conv, i16* %dst, align 2
995  ret void
996}
997
998define void @test19() {
999; This is a massive reduction of an llvm-stress test case that generates
1000; interesting chains feeding setcc and eventually a f32 select operation. This
1001; is intended to exercise the SELECT formation in the DAG combine simplifying
1002; a simplified select_cc node. If it it regresses and is no longer triggering
1003; that code path, it can be deleted.
1004;
1005; CHECK-LABEL: test19:
1006; CHECK:       ## BB#0: ## %BB
1007; CHECK-NEXT:    movl $-1, %eax
1008; CHECK-NEXT:    movb $1, %cl
1009; CHECK-NEXT:    .p2align 4, 0x90
1010; CHECK-NEXT:  LBB24_1: ## %CF
1011; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
1012; CHECK-NEXT:    testb %cl, %cl
1013; CHECK-NEXT:    jne LBB24_1
1014; CHECK-NEXT:  ## BB#2: ## %CF250
1015; CHECK-NEXT:    ## in Loop: Header=BB24_1 Depth=1
1016; CHECK-NEXT:    jne LBB24_1
1017; CHECK-NEXT:    .p2align 4, 0x90
1018; CHECK-NEXT:  LBB24_3: ## %CF242
1019; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
1020; CHECK-NEXT:    cmpl %eax, %eax
1021; CHECK-NEXT:    ucomiss %xmm0, %xmm0
1022; CHECK-NEXT:    jp LBB24_3
1023; CHECK-NEXT:  ## BB#4: ## %CF244
1024; CHECK-NEXT:    retq
1025;
1026; MCU-LABEL: test19:
1027; MCU:       # BB#0: # %BB
1028; MCU-NEXT:    movl $-1, %ecx
1029; MCU-NEXT:    movb $1, %al
1030; MCU-NEXT:    .p2align 4, 0x90
1031; MCU-NEXT:  .LBB24_1: # %CF
1032; MCU-NEXT:    # =>This Inner Loop Header: Depth=1
1033; MCU-NEXT:    testb %al, %al
1034; MCU-NEXT:    jne .LBB24_1
1035; MCU-NEXT:  # BB#2: # %CF250
1036; MCU-NEXT:    # in Loop: Header=BB24_1 Depth=1
1037; MCU-NEXT:    jne .LBB24_1
1038; MCU-NEXT:  # BB#3: # %CF242.preheader
1039; MCU-NEXT:    fldz
1040; MCU-NEXT:    .p2align 4, 0x90
1041; MCU-NEXT:  .LBB24_4: # %CF242
1042; MCU-NEXT:    # =>This Inner Loop Header: Depth=1
1043; MCU-NEXT:    cmpl %eax, %ecx
1044; MCU-NEXT:    fucom %st(0)
1045; MCU-NEXT:    fnstsw %ax
1046; MCU-NEXT:    # kill: %AH<def> %AH<kill> %AX<kill>
1047; MCU-NEXT:    sahf
1048; MCU-NEXT:    jp .LBB24_4
1049; MCU-NEXT:  # BB#5: # %CF244
1050; MCU-NEXT:    fstp %st(0)
1051; MCU-NEXT:    retl
1052BB:
1053  br label %CF
1054
1055CF:
1056  %Cmp10 = icmp ule i8 undef, undef
1057  br i1 %Cmp10, label %CF, label %CF250
1058
1059CF250:
1060  %E12 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 2
1061  %Cmp32 = icmp ugt i1 %Cmp10, false
1062  br i1 %Cmp32, label %CF, label %CF242
1063
1064CF242:
1065  %Cmp38 = icmp uge i32 %E12, undef
1066  %FC = uitofp i1 %Cmp38 to float
1067  %Sl59 = select i1 %Cmp32, float %FC, float undef
1068  %Cmp60 = fcmp ugt float undef, undef
1069  br i1 %Cmp60, label %CF242, label %CF244
1070
1071CF244:
1072  %B122 = fadd float %Sl59, undef
1073  ret void
1074}
1075
1076define i16 @select_xor_1(i16 %A, i8 %cond) {
1077; CHECK-LABEL: select_xor_1:
1078; CHECK:       ## BB#0: ## %entry
1079; CHECK-NEXT:    movl %edi, %eax
1080; CHECK-NEXT:    xorl $43, %eax
1081; CHECK-NEXT:    testb $1, %sil
1082; CHECK-NEXT:    cmovnew %ax, %di
1083; CHECK-NEXT:    movl %edi, %eax
1084; CHECK-NEXT:    retq
1085;
1086; MCU-LABEL: select_xor_1:
1087; MCU:       # BB#0: # %entry
1088; MCU-NEXT:    andl $1, %edx
1089; MCU-NEXT:    negl %edx
1090; MCU-NEXT:    andl $43, %edx
1091; MCU-NEXT:    xorl %edx, %eax
1092; MCU-NEXT:    # kill: %AX<def> %AX<kill> %EAX<kill>
1093; MCU-NEXT:    retl
1094entry:
1095 %and = and i8 %cond, 1
1096 %cmp10 = icmp eq i8 %and, 0
1097 %0 = xor i16 %A, 43
1098 %1 = select i1 %cmp10, i16 %A, i16 %0
1099 ret i16 %1
1100}
1101
1102define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1103; CHECK-LABEL: select_xor_2:
1104; CHECK:       ## BB#0: ## %entry
1105; CHECK-NEXT:    xorl %edi, %esi
1106; CHECK-NEXT:    testb $1, %dl
1107; CHECK-NEXT:    cmovel %edi, %esi
1108; CHECK-NEXT:    movl %esi, %eax
1109; CHECK-NEXT:    retq
1110;
1111; MCU-LABEL: select_xor_2:
1112; MCU:       # BB#0: # %entry
1113; MCU-NEXT:    andl $1, %ecx
1114; MCU-NEXT:    negl %ecx
1115; MCU-NEXT:    andl %edx, %ecx
1116; MCU-NEXT:    xorl %ecx, %eax
1117; MCU-NEXT:    retl
1118entry:
1119 %and = and i8 %cond, 1
1120 %cmp10 = icmp eq i8 %and, 0
1121 %0 = xor i32 %B, %A
1122 %1 = select i1 %cmp10, i32 %A, i32 %0
1123 ret i32 %1
1124}
1125
1126define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1127; CHECK-LABEL: select_or:
1128; CHECK:       ## BB#0: ## %entry
1129; CHECK-NEXT:    orl %edi, %esi
1130; CHECK-NEXT:    testb $1, %dl
1131; CHECK-NEXT:    cmovel %edi, %esi
1132; CHECK-NEXT:    movl %esi, %eax
1133; CHECK-NEXT:    retq
1134;
1135; MCU-LABEL: select_or:
1136; MCU:       # BB#0: # %entry
1137; MCU-NEXT:    andl $1, %ecx
1138; MCU-NEXT:    negl %ecx
1139; MCU-NEXT:    andl %edx, %ecx
1140; MCU-NEXT:    orl %ecx, %eax
1141; MCU-NEXT:    retl
1142entry:
1143 %and = and i8 %cond, 1
1144 %cmp10 = icmp eq i8 %and, 0
1145 %0 = or i32 %B, %A
1146 %1 = select i1 %cmp10, i32 %A, i32 %0
1147 ret i32 %1
1148}
1149
1150define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1151; CHECK-LABEL: select_or_1:
1152; CHECK:       ## BB#0: ## %entry
1153; CHECK-NEXT:    orl %edi, %esi
1154; CHECK-NEXT:    testb $1, %dl
1155; CHECK-NEXT:    cmovel %edi, %esi
1156; CHECK-NEXT:    movl %esi, %eax
1157; CHECK-NEXT:    retq
1158;
1159; MCU-LABEL: select_or_1:
1160; MCU:       # BB#0: # %entry
1161; MCU-NEXT:    andl $1, %ecx
1162; MCU-NEXT:    negl %ecx
1163; MCU-NEXT:    andl %edx, %ecx
1164; MCU-NEXT:    orl %ecx, %eax
1165; MCU-NEXT:    retl
1166entry:
1167 %and = and i32 %cond, 1
1168 %cmp10 = icmp eq i32 %and, 0
1169 %0 = or i32 %B, %A
1170 %1 = select i1 %cmp10, i32 %A, i32 %0
1171 ret i32 %1
1172}
1173