1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom    | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4; RUN: llc < %s -mtriple=i386-intel-elfiamcu                 | FileCheck %s --check-prefix=MCU
5
6; PR5757
7%0 = type { i64, i32 }
8
9define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind {
10; CHECK-LABEL: test1:
11; CHECK:       ## BB#0:
12; CHECK-NEXT:    addq $8, %rdi
13; CHECK-NEXT:    addq $8, %rsi
14; CHECK-NEXT:    testb $1, %dl
15; CHECK-NEXT:    cmovneq %rdi, %rsi
16; CHECK-NEXT:    movl (%rsi), %eax
17; CHECK-NEXT:    retq
18; CHECK-NEXT:    ## -- End function
19;
20; MCU-LABEL: test1:
21; MCU:       # BB#0:
22; MCU-NEXT:    testb $1, %cl
23; MCU-NEXT:    jne .LBB0_1
24; MCU-NEXT:  # BB#2:
25; MCU-NEXT:    addl $8, %edx
26; MCU-NEXT:    movl %edx, %eax
27; MCU-NEXT:    movl (%eax), %eax
28; MCU-NEXT:    retl
29; MCU-NEXT:  .LBB0_1:
30; MCU-NEXT:    addl $8, %eax
31; MCU-NEXT:    movl (%eax), %eax
32; MCU-NEXT:    retl
33  %t0 = load %0, %0* %p
34  %t1 = load %0, %0* %q
35  %t4 = select i1 %r, %0 %t0, %0 %t1
36  %t5 = extractvalue %0 %t4, 1
37  ret i32 %t5
38}
39
40; PR2139
41define i32 @test2() nounwind {
42; GENERIC-LABEL: test2:
43; GENERIC:       ## BB#0: ## %entry
44; GENERIC-NEXT:    pushq %rax
45; GENERIC-NEXT:    callq _return_false
46; GENERIC-NEXT:    xorl %ecx, %ecx
47; GENERIC-NEXT:    testb $1, %al
48; GENERIC-NEXT:    movl $-480, %eax
49; GENERIC-NEXT:    cmovnel %ecx, %eax
50; GENERIC-NEXT:    shll $3, %eax
51; GENERIC-NEXT:    cmpl $32768, %eax ## imm = 0x8000
52; GENERIC-NEXT:    jge LBB1_1
53; GENERIC-NEXT:  ## BB#2: ## %bb91
54; GENERIC-NEXT:    xorl %eax, %eax
55; GENERIC-NEXT:    popq %rcx
56; GENERIC-NEXT:    retq
57; GENERIC-NEXT:  LBB1_1: ## %bb90
58; GENERIC-NEXT:    ## -- End function
59;
60; ATOM-LABEL: test2:
61; ATOM:       ## BB#0: ## %entry
62; ATOM-NEXT:    pushq %rax
63; ATOM-NEXT:    callq _return_false
64; ATOM-NEXT:    xorl %ecx, %ecx
65; ATOM-NEXT:    movl $-480, %edx
66; ATOM-NEXT:    testb $1, %al
67; ATOM-NEXT:    cmovnel %ecx, %edx
68; ATOM-NEXT:    shll $3, %edx
69; ATOM-NEXT:    cmpl $32768, %edx ## imm = 0x8000
70; ATOM-NEXT:    jge LBB1_1
71; ATOM-NEXT:  ## BB#2: ## %bb91
72; ATOM-NEXT:    xorl %eax, %eax
73; ATOM-NEXT:    popq %rcx
74; ATOM-NEXT:    retq
75; ATOM-NEXT:  LBB1_1: ## %bb90
76; ATOM-NEXT:    ## -- End function
77;
78; MCU-LABEL: test2:
79; MCU:       # BB#0: # %entry
80; MCU-NEXT:    calll return_false
81; MCU-NEXT:    xorl    %ecx, %ecx
82; MCU-NEXT:    testb $1, %al
83; MCU-NEXT:    jne .LBB1_2
84; MCU-NEXT:  # BB#1: # %entry
85; MCU-NEXT:    movl $-480, %ecx # imm = 0xFE20
86; MCU-NEXT:  .LBB1_2:
87; MCU-NEXT:    shll $3, %ecx
88; MCU-NEXT:    cmpl $32768, %ecx # imm = 0x8000
89; MCU-NEXT:    jge .LBB1_3
90; MCU-NEXT:  # BB#4: # %bb91
91; MCU-NEXT:    xorl %eax, %eax
92; MCU-NEXT:    retl
93; MCU-NEXT:  .LBB1_3: # %bb90
94entry:
95  %tmp73 = tail call i1 @return_false()
96  %g.0 = select i1 %tmp73, i16 0, i16 -480
97  %tmp7778 = sext i16 %g.0 to i32
98  %tmp80 = shl i32 %tmp7778, 3
99  %tmp87 = icmp sgt i32 %tmp80, 32767
100  br i1 %tmp87, label %bb90, label %bb91
101bb90:
102  unreachable
103bb91:
104  ret i32 0
105}
106
107declare i1 @return_false()
108
109;; Select between two floating point constants.
110define float @test3(i32 %x) nounwind readnone {
111; CHECK-LABEL: test3:
112; CHECK:       ## BB#0: ## %entry
113; CHECK-NEXT:    xorl %eax, %eax
114; CHECK-NEXT:    testl %edi, %edi
115; CHECK-NEXT:    sete %al
116; CHECK-NEXT:    leaq {{.*}}(%rip), %rcx
117; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
118; CHECK-NEXT:    retq
119; CHECK-NEXT:    ## -- End function
120;
121; MCU-LABEL: test3:
122; MCU:       # BB#0: # %entry
123; MCU-NEXT:    xorl %ecx, %ecx
124; MCU-NEXT:    testl %eax, %eax
125; MCU-NEXT:    sete %cl
126; MCU-NEXT:    flds {{\.LCPI.*}}(,%ecx,4)
127; MCU-NEXT:    retl
128entry:
129  %0 = icmp eq i32 %x, 0
130  %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
131  ret float %iftmp.0.0
132}
133
134define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly {
135; CHECK-LABEL: test4:
136; CHECK:       ## BB#0: ## %entry
137; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
138; CHECK-NEXT:    xorl %eax, %eax
139; CHECK-NEXT:    ucomisd %xmm0, %xmm1
140; CHECK-NEXT:    seta %al
141; CHECK-NEXT:    movsbl (%rdi,%rax,4), %eax
142; CHECK-NEXT:    retq
143; CHECK-NEXT:    ## -- End function
144;
145; MCU-LABEL: test4:
146; MCU:       # BB#0: # %entry
147; MCU-NEXT:    movl %eax, %ecx
148; MCU-NEXT:    fldl {{[0-9]+}}(%esp)
149; MCU-NEXT:    flds {{\.LCPI.*}}
150; MCU-NEXT:    fucompp
151; MCU-NEXT:    fnstsw %ax
152; MCU-NEXT:    xorl %edx, %edx
153; MCU-NEXT:    # kill: %AH<def> %AH<kill> %AX<kill>
154; MCU-NEXT:    sahf
155; MCU-NEXT:    seta %dl
156; MCU-NEXT:    movb (%ecx,%edx,4), %al
157; MCU-NEXT:    retl
158entry:
159  %0 = fcmp olt double %F, 4.200000e+01
160  %iftmp.0.0 = select i1 %0, i32 4, i32 0
161  %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0
162  %2 = load i8, i8* %1, align 1
163  ret i8 %2
164}
165
166define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind {
167; CHECK-LABEL: test5:
168; CHECK:       ## BB#0:
169; CHECK-NEXT:    testb $1, %dil
170; CHECK-NEXT:    jne LBB4_2
171; CHECK-NEXT:  ## BB#1:
172; CHECK-NEXT:    movdqa %xmm1, %xmm0
173; CHECK-NEXT:  LBB4_2:
174; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
175; CHECK-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
176; CHECK-NEXT:    movd %xmm0, (%rsi)
177; CHECK-NEXT:    retq
178; CHECK-NEXT:    ## -- End function
179;
180; MCU-LABEL: test5:
181; MCU:       # BB#0:
182; MCU-NEXT:    pushl %esi
183; MCU-NEXT:    movl {{[0-9]+}}(%esp), %esi
184; MCU-NEXT:    testb $1, %al
185; MCU-NEXT:    jne .LBB4_2
186; MCU-NEXT:  # BB#1:
187; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
188; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %edx
189; MCU-NEXT:  .LBB4_2:
190; MCU-NEXT:    movw %cx, 2(%esi)
191; MCU-NEXT:    movw %dx, (%esi)
192; MCU-NEXT:    popl %esi
193; MCU-NEXT:    retl
194  %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
195  store <2 x i16> %x, <2 x i16>* %p
196  ret void
197}
198
199; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
200define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
201; CHECK-LABEL: test6:
202; CHECK:       ## BB#0:
203; CHECK-NEXT:    testl %edi, %edi
204; CHECK-NEXT:    je LBB5_1
205; CHECK-NEXT:  ## BB#2:
206; CHECK-NEXT:    movaps (%rsi), %xmm0
207; CHECK-NEXT:    movaps %xmm0, (%rsi)
208; CHECK-NEXT:    retq
209; CHECK-NEXT:  LBB5_1:
210; CHECK-NEXT:    movaps (%rdx), %xmm0
211; CHECK-NEXT:    mulps %xmm0, %xmm0
212; CHECK-NEXT:    movaps %xmm0, (%rsi)
213; CHECK-NEXT:    retq
214; CHECK-NEXT:    ## -- End function
215;
216; MCU-LABEL: test6:
217; MCU:       # BB#0:
218; MCU-NEXT:    pushl %eax
219; MCU-NEXT:    flds 12(%edx)
220; MCU-NEXT:    fstps (%esp) # 4-byte Folded Spill
221; MCU-NEXT:    flds 8(%edx)
222; MCU-NEXT:    flds 4(%edx)
223; MCU-NEXT:    flds (%ecx)
224; MCU-NEXT:    flds 4(%ecx)
225; MCU-NEXT:    flds 8(%ecx)
226; MCU-NEXT:    flds 12(%ecx)
227; MCU-NEXT:    fmul %st(0), %st(0)
228; MCU-NEXT:    fxch %st(1)
229; MCU-NEXT:    fmul %st(0), %st(0)
230; MCU-NEXT:    fxch %st(2)
231; MCU-NEXT:    fmul %st(0), %st(0)
232; MCU-NEXT:    fxch %st(3)
233; MCU-NEXT:    fmul %st(0), %st(0)
234; MCU-NEXT:    testl %eax, %eax
235; MCU-NEXT:    flds (%edx)
236; MCU-NEXT:    je .LBB5_2
237; MCU-NEXT:  # BB#1:
238; MCU-NEXT:    fstp %st(1)
239; MCU-NEXT:    fstp %st(3)
240; MCU-NEXT:    fstp %st(1)
241; MCU-NEXT:    fstp %st(0)
242; MCU-NEXT:    flds (%esp) # 4-byte Folded Reload
243; MCU-NEXT:    fldz
244; MCU-NEXT:    fldz
245; MCU-NEXT:    fldz
246; MCU-NEXT:    fxch %st(1)
247; MCU-NEXT:    fxch %st(6)
248; MCU-NEXT:    fxch %st(1)
249; MCU-NEXT:    fxch %st(5)
250; MCU-NEXT:    fxch %st(4)
251; MCU-NEXT:    fxch %st(1)
252; MCU-NEXT:    fxch %st(3)
253; MCU-NEXT:    fxch %st(2)
254; MCU-NEXT:  .LBB5_2:
255; MCU-NEXT:    fstp %st(0)
256; MCU-NEXT:    fstp %st(5)
257; MCU-NEXT:    fstp %st(3)
258; MCU-NEXT:    fxch %st(2)
259; MCU-NEXT:    fstps 12(%edx)
260; MCU-NEXT:    fxch %st(1)
261; MCU-NEXT:    fstps 8(%edx)
262; MCU-NEXT:    fstps 4(%edx)
263; MCU-NEXT:    fstps (%edx)
264; MCU-NEXT:    popl %eax
265; MCU-NEXT:    retl
266  %tmp = load <4 x float>, <4 x float>* %A
267  %tmp3 = load <4 x float>, <4 x float>* %B
268  %tmp9 = fmul <4 x float> %tmp3, %tmp3
269  %tmp.upgrd.1 = icmp eq i32 %C, 0
270  %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
271  store <4 x float> %iftmp.38.0, <4 x float>* %A
272  ret void
273}
274
275; Select with fp80's
276define x86_fp80 @test7(i32 %tmp8) nounwind {
277; CHECK-LABEL: test7:
278; CHECK:       ## BB#0:
279; CHECK-NEXT:    xorl %eax, %eax
280; CHECK-NEXT:    testl %edi, %edi
281; CHECK-NEXT:    setns %al
282; CHECK-NEXT:    shlq $4, %rax
283; CHECK-NEXT:    leaq {{.*}}(%rip), %rcx
284; CHECK-NEXT:    fldt (%rax,%rcx)
285; CHECK-NEXT:    retq
286; CHECK-NEXT:    ## -- End function
287;
288; MCU-LABEL: test7:
289; MCU:       # BB#0:
290; MCU-NEXT:    xorl %ecx, %ecx
291; MCU-NEXT:    testl %eax, %eax
292; MCU-NEXT:    setns %cl
293; MCU-NEXT:    shll $4, %ecx
294; MCU-NEXT:    fldt {{\.LCPI.*}}(%ecx)
295; MCU-NEXT:    retl
296  %tmp9 = icmp sgt i32 %tmp8, -1
297  %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
298  ret x86_fp80 %retval
299}
300
301; widening select v6i32 and then a sub
302define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
303; GENERIC-LABEL: test8:
304; GENERIC:       ## BB#0:
305; GENERIC-NEXT:    testb $1, %dil
306; GENERIC-NEXT:    jne LBB7_1
307; GENERIC-NEXT:  ## BB#2:
308; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
309; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
310; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
311; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
312; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
313; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
314; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
315; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
316; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
317; GENERIC-NEXT:    jmp LBB7_3
318; GENERIC-NEXT:  LBB7_1:
319; GENERIC-NEXT:    movd %r9d, %xmm0
320; GENERIC-NEXT:    movd %r8d, %xmm1
321; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
322; GENERIC-NEXT:    movd %ecx, %xmm2
323; GENERIC-NEXT:    movd %edx, %xmm0
324; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
325; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
326; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
327; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
328; GENERIC-NEXT:  LBB7_3:
329; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
330; GENERIC-NEXT:    pcmpeqd %xmm2, %xmm2
331; GENERIC-NEXT:    paddd %xmm2, %xmm0
332; GENERIC-NEXT:    paddd %xmm2, %xmm1
333; GENERIC-NEXT:    movq %xmm1, 16(%rsi)
334; GENERIC-NEXT:    movdqa %xmm0, (%rsi)
335; GENERIC-NEXT:    retq
336; GENERIC-NEXT:    ## -- End function
337;
338; ATOM-LABEL: test8:
339; ATOM:       ## BB#0:
340; ATOM-NEXT:    testb $1, %dil
341; ATOM-NEXT:    jne LBB7_1
342; ATOM-NEXT:  ## BB#2:
343; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
344; ATOM-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
345; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
346; ATOM-NEXT:    movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
347; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
348; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
349; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
350; ATOM-NEXT:    jmp LBB7_3
351; ATOM-NEXT:  LBB7_1:
352; ATOM-NEXT:    movd %r9d, %xmm0
353; ATOM-NEXT:    movd %r8d, %xmm2
354; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
355; ATOM-NEXT:    movd %ecx, %xmm3
356; ATOM-NEXT:    movd %edx, %xmm0
357; ATOM-NEXT:    movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
358; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
359; ATOM-NEXT:  LBB7_3:
360; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
361; ATOM-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
362; ATOM-NEXT:    pcmpeqd %xmm2, %xmm2
363; ATOM-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1]
364; ATOM-NEXT:    paddd %xmm2, %xmm0
365; ATOM-NEXT:    paddd %xmm2, %xmm1
366; ATOM-NEXT:    movdqa %xmm0, (%rsi)
367; ATOM-NEXT:    movq %xmm1, 16(%rsi)
368; ATOM-NEXT:    retq
369; ATOM-NEXT:    ## -- End function
370;
371; MCU-LABEL: test8:
372; MCU:       # BB#0:
373; MCU-NEXT:    pushl %ebp
374; MCU-NEXT:    pushl %ebx
375; MCU-NEXT:    pushl %edi
376; MCU-NEXT:    pushl %esi
377; MCU-NEXT:    testb $1, %al
378; MCU-NEXT:    jne .LBB7_1
379; MCU-NEXT:  # BB#2:
380; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
381; MCU-NEXT:    movl (%eax), %eax
382; MCU-NEXT:    je .LBB7_5
383; MCU-NEXT:  .LBB7_4:
384; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
385; MCU-NEXT:    movl (%ecx), %ecx
386; MCU-NEXT:    je .LBB7_8
387; MCU-NEXT:  .LBB7_7:
388; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
389; MCU-NEXT:    movl (%esi), %esi
390; MCU-NEXT:    je .LBB7_11
391; MCU-NEXT:  .LBB7_10:
392; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
393; MCU-NEXT:    movl (%edi), %edi
394; MCU-NEXT:    je .LBB7_14
395; MCU-NEXT:  .LBB7_13:
396; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebx
397; MCU-NEXT:    movl (%ebx), %ebx
398; MCU-NEXT:    je .LBB7_17
399; MCU-NEXT:  .LBB7_16:
400; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
401; MCU-NEXT:    jmp .LBB7_18
402; MCU-NEXT:  .LBB7_1:
403; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
404; MCU-NEXT:    movl (%eax), %eax
405; MCU-NEXT:    jne .LBB7_4
406; MCU-NEXT:  .LBB7_5:
407; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
408; MCU-NEXT:    movl (%ecx), %ecx
409; MCU-NEXT:    jne .LBB7_7
410; MCU-NEXT:  .LBB7_8:
411; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
412; MCU-NEXT:    movl (%esi), %esi
413; MCU-NEXT:    jne .LBB7_10
414; MCU-NEXT:  .LBB7_11:
415; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
416; MCU-NEXT:    movl (%edi), %edi
417; MCU-NEXT:    jne .LBB7_13
418; MCU-NEXT:  .LBB7_14:
419; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebx
420; MCU-NEXT:    movl (%ebx), %ebx
421; MCU-NEXT:    jne .LBB7_16
422; MCU-NEXT:  .LBB7_17:
423; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
424; MCU-NEXT:  .LBB7_18:
425; MCU-NEXT:    movl (%ebp), %ebp
426; MCU-NEXT:    decl %ebp
427; MCU-NEXT:    decl %ebx
428; MCU-NEXT:    decl %edi
429; MCU-NEXT:    decl %esi
430; MCU-NEXT:    decl %ecx
431; MCU-NEXT:    decl %eax
432; MCU-NEXT:    movl %eax, 20(%edx)
433; MCU-NEXT:    movl %ecx, 16(%edx)
434; MCU-NEXT:    movl %esi, 12(%edx)
435; MCU-NEXT:    movl %edi, 8(%edx)
436; MCU-NEXT:    movl %ebx, 4(%edx)
437; MCU-NEXT:    movl %ebp, (%edx)
438; MCU-NEXT:    popl %esi
439; MCU-NEXT:    popl %edi
440; MCU-NEXT:    popl %ebx
441; MCU-NEXT:    popl %ebp
442; MCU-NEXT:    retl
443  %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
444  %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
445  store <6 x i32> %val, <6 x i32>* %dst.addr
446  ret void
447}
448
449
450;; Test integer select between values and constants.
451
452define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
453; GENERIC-LABEL: test9:
454; GENERIC:       ## BB#0:
455; GENERIC-NEXT:    cmpq $1, %rdi
456; GENERIC-NEXT:    sbbq %rax, %rax
457; GENERIC-NEXT:    orq %rsi, %rax
458; GENERIC-NEXT:    retq
459; GENERIC-NEXT:    ## -- End function
460;
461; ATOM-LABEL: test9:
462; ATOM:       ## BB#0:
463; ATOM-NEXT:    cmpq $1, %rdi
464; ATOM-NEXT:    sbbq %rax, %rax
465; ATOM-NEXT:    orq %rsi, %rax
466; ATOM-NEXT:    nop
467; ATOM-NEXT:    nop
468; ATOM-NEXT:    retq
469; ATOM-NEXT:    ## -- End function
470;
471; MCU-LABEL: test9:
472; MCU:       # BB#0:
473; MCU-NEXT:    orl %edx, %eax
474; MCU-NEXT:    jne .LBB8_1
475; MCU-NEXT:  # BB#2:
476; MCU-NEXT:    movl $-1, %eax
477; MCU-NEXT:    movl $-1, %edx
478; MCU-NEXT:    retl
479; MCU-NEXT:  .LBB8_1:
480; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
481; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
482; MCU-NEXT:    retl
483  %cmp = icmp ne i64 %x, 0
484  %cond = select i1 %cmp, i64 %y, i64 -1
485  ret i64 %cond
486}
487
488;; Same as test9
489define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
490; GENERIC-LABEL: test9a:
491; GENERIC:       ## BB#0:
492; GENERIC-NEXT:    cmpq $1, %rdi
493; GENERIC-NEXT:    sbbq %rax, %rax
494; GENERIC-NEXT:    orq %rsi, %rax
495; GENERIC-NEXT:    retq
496; GENERIC-NEXT:    ## -- End function
497;
498; ATOM-LABEL: test9a:
499; ATOM:       ## BB#0:
500; ATOM-NEXT:    cmpq $1, %rdi
501; ATOM-NEXT:    sbbq %rax, %rax
502; ATOM-NEXT:    orq %rsi, %rax
503; ATOM-NEXT:    nop
504; ATOM-NEXT:    nop
505; ATOM-NEXT:    retq
506; ATOM-NEXT:    ## -- End function
507;
508; MCU-LABEL: test9a:
509; MCU:       # BB#0:
510; MCU-NEXT:    orl %edx, %eax
511; MCU-NEXT:    movl $-1, %eax
512; MCU-NEXT:    movl $-1, %edx
513; MCU-NEXT:    je .LBB9_2
514; MCU-NEXT:  # BB#1:
515; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
516; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
517; MCU-NEXT:  .LBB9_2:
518; MCU-NEXT:    retl
519  %cmp = icmp eq i64 %x, 0
520  %cond = select i1 %cmp, i64 -1, i64 %y
521  ret i64 %cond
522}
523
524define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
525; GENERIC-LABEL: test9b:
526; GENERIC:       ## BB#0:
527; GENERIC-NEXT:    cmpq $1, %rdi
528; GENERIC-NEXT:    sbbq %rax, %rax
529; GENERIC-NEXT:    orq %rsi, %rax
530; GENERIC-NEXT:    retq
531; GENERIC-NEXT:    ## -- End function
532;
533; ATOM-LABEL: test9b:
534; ATOM:       ## BB#0:
535; ATOM-NEXT:    cmpq $1, %rdi
536; ATOM-NEXT:    sbbq %rax, %rax
537; ATOM-NEXT:    orq %rsi, %rax
538; ATOM-NEXT:    nop
539; ATOM-NEXT:    nop
540; ATOM-NEXT:    retq
541; ATOM-NEXT:    ## -- End function
542;
543; MCU-LABEL: test9b:
544; MCU:       # BB#0:
545; MCU-NEXT:    movl %edx, %ecx
546; MCU-NEXT:    xorl %edx, %edx
547; MCU-NEXT:    orl %ecx, %eax
548; MCU-NEXT:    sete %dl
549; MCU-NEXT:    negl %edx
550; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
551; MCU-NEXT:    orl %edx, %eax
552; MCU-NEXT:    orl {{[0-9]+}}(%esp), %edx
553; MCU-NEXT:    retl
554  %cmp = icmp eq i64 %x, 0
555  %A = sext i1 %cmp to i64
556  %cond = or i64 %y, %A
557  ret i64 %cond
558}
559
560;; Select between -1 and 1.
561define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
562; CHECK-LABEL: test10:
563; CHECK:       ## BB#0:
564; CHECK-NEXT:    xorl %eax, %eax
565; CHECK-NEXT:    testq %rdi, %rdi
566; CHECK-NEXT:    setne %al
567; CHECK-NEXT:    leaq -1(%rax,%rax), %rax
568; CHECK-NEXT:    retq
569; CHECK-NEXT:    ## -- End function
570;
571; MCU-LABEL: test10:
572; MCU:       # BB#0:
573; MCU-NEXT:    orl %edx, %eax
574; MCU-NEXT:    movl $-1, %eax
575; MCU-NEXT:    movl $-1, %edx
576; MCU-NEXT:    je .LBB11_2
577; MCU-NEXT:  # BB#1:
578; MCU-NEXT:    xorl %edx, %edx
579; MCU-NEXT:    movl $1, %eax
580; MCU-NEXT:  .LBB11_2:
581; MCU-NEXT:    retl
582  %cmp = icmp eq i64 %x, 0
583  %cond = select i1 %cmp, i64 -1, i64 1
584  ret i64 %cond
585}
586
587define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
588; CHECK-LABEL: test11:
589; CHECK:       ## BB#0:
590; CHECK-NEXT:    cmpq $1, %rdi
591; CHECK-NEXT:    sbbq %rax, %rax
592; CHECK-NEXT:    notq %rax
593; CHECK-NEXT:    orq %rsi, %rax
594; CHECK-NEXT:    retq
595; CHECK-NEXT:    ## -- End function
596;
597; MCU-LABEL: test11:
598; MCU:       # BB#0:
599; MCU-NEXT:    orl %edx, %eax
600; MCU-NEXT:    je .LBB12_1
601; MCU-NEXT:  # BB#2:
602; MCU-NEXT:    movl $-1, %eax
603; MCU-NEXT:    movl $-1, %edx
604; MCU-NEXT:    retl
605; MCU-NEXT:  .LBB12_1:
606; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
607; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
608; MCU-NEXT:    retl
609  %cmp = icmp eq i64 %x, 0
610  %cond = select i1 %cmp, i64 %y, i64 -1
611  ret i64 %cond
612}
613
614define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
615; CHECK-LABEL: test11a:
616; CHECK:       ## BB#0:
617; CHECK-NEXT:    cmpq $1, %rdi
618; CHECK-NEXT:    sbbq %rax, %rax
619; CHECK-NEXT:    notq %rax
620; CHECK-NEXT:    orq %rsi, %rax
621; CHECK-NEXT:    retq
622; CHECK-NEXT:    ## -- End function
623;
624; MCU-LABEL: test11a:
625; MCU:       # BB#0:
626; MCU-NEXT:    orl %edx, %eax
627; MCU-NEXT:    movl $-1, %eax
628; MCU-NEXT:    movl $-1, %edx
629; MCU-NEXT:    jne .LBB13_2
630; MCU-NEXT:  # BB#1:
631; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
632; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
633; MCU-NEXT:  .LBB13_2:
634; MCU-NEXT:    retl
635  %cmp = icmp ne i64 %x, 0
636  %cond = select i1 %cmp, i64 -1, i64 %y
637  ret i64 %cond
638}
639
640
641declare noalias i8* @_Znam(i64) noredzone
642
643define noalias i8* @test12(i64 %count) nounwind ssp noredzone {
644; GENERIC-LABEL: test12:
645; GENERIC:       ## BB#0: ## %entry
646; GENERIC-NEXT:    movl $4, %ecx
647; GENERIC-NEXT:    movq %rdi, %rax
648; GENERIC-NEXT:    mulq %rcx
649; GENERIC-NEXT:    movq $-1, %rdi
650; GENERIC-NEXT:    cmovnoq %rax, %rdi
651; GENERIC-NEXT:    jmp __Znam ## TAILCALL
652; GENERIC-NEXT:    ## -- End function
653;
654; ATOM-LABEL: test12:
655; ATOM:       ## BB#0: ## %entry
656; ATOM-NEXT:    movq %rdi, %rax
657; ATOM-NEXT:    movl $4, %ecx
658; ATOM-NEXT:    mulq %rcx
659; ATOM-NEXT:    movq $-1, %rdi
660; ATOM-NEXT:    cmovnoq %rax, %rdi
661; ATOM-NEXT:    jmp __Znam ## TAILCALL
662; ATOM-NEXT:    ## -- End function
663;
664; MCU-LABEL: test12:
665; MCU:       # BB#0: # %entry
666; MCU-NEXT:    pushl %ebp
667; MCU-NEXT:    pushl %ebx
668; MCU-NEXT:    pushl %edi
669; MCU-NEXT:    pushl %esi
670; MCU-NEXT:    movl %edx, %ebx
671; MCU-NEXT:    movl %eax, %ebp
672; MCU-NEXT:    movl $4, %ecx
673; MCU-NEXT:    mull %ecx
674; MCU-NEXT:    movl %eax, %esi
675; MCU-NEXT:    leal (%edx,%ebx,4), %edi
676; MCU-NEXT:    movl %edi, %edx
677; MCU-NEXT:    pushl $0
678; MCU-NEXT:    pushl $4
679; MCU-NEXT:    calll __udivdi3
680; MCU-NEXT:    addl $8, %esp
681; MCU-NEXT:    xorl %ebx, %edx
682; MCU-NEXT:    xorl %ebp, %eax
683; MCU-NEXT:    orl %edx, %eax
684; MCU-NEXT:    movl $-1, %eax
685; MCU-NEXT:    movl $-1, %edx
686; MCU-NEXT:    jne .LBB14_2
687; MCU-NEXT:  # BB#1: # %entry
688; MCU-NEXT:    movl %esi, %eax
689; MCU-NEXT:    movl %edi, %edx
690; MCU-NEXT:  .LBB14_2: # %entry
691; MCU-NEXT:    popl %esi
692; MCU-NEXT:    popl %edi
693; MCU-NEXT:    popl %ebx
694; MCU-NEXT:    popl %ebp
695; MCU-NEXT:    jmp _Znam # TAILCALL
696entry:
697  %A = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %count, i64 4)
698  %B = extractvalue { i64, i1 } %A, 1
699  %C = extractvalue { i64, i1 } %A, 0
700  %D = select i1 %B, i64 -1, i64 %C
701  %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone
702  ret i8* %call
703}
704
705declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone
706
707define i32 @test13(i32 %a, i32 %b) nounwind {
708; GENERIC-LABEL: test13:
709; GENERIC:       ## BB#0:
710; GENERIC-NEXT:    cmpl %esi, %edi
711; GENERIC-NEXT:    sbbl %eax, %eax
712; GENERIC-NEXT:    retq
713; GENERIC-NEXT:    ## -- End function
714;
715; ATOM-LABEL: test13:
716; ATOM:       ## BB#0:
717; ATOM-NEXT:    cmpl %esi, %edi
718; ATOM-NEXT:    sbbl %eax, %eax
719; ATOM-NEXT:    nop
720; ATOM-NEXT:    nop
721; ATOM-NEXT:    nop
722; ATOM-NEXT:    nop
723; ATOM-NEXT:    retq
724; ATOM-NEXT:    ## -- End function
725;
726; MCU-LABEL: test13:
727; MCU:       # BB#0:
728; MCU-NEXT:    cmpl %edx, %eax
729; MCU-NEXT:    sbbl %eax, %eax
730; MCU-NEXT:    retl
731  %c = icmp ult i32 %a, %b
732  %d = sext i1 %c to i32
733  ret i32 %d
734}
735
736define i32 @test14(i32 %a, i32 %b) nounwind {
737; CHECK-LABEL: test14:
738; CHECK:       ## BB#0:
739; CHECK-NEXT:    xorl %eax, %eax
740; CHECK-NEXT:    cmpl %esi, %edi
741; CHECK-NEXT:    setae %al
742; CHECK-NEXT:    negl %eax
743; CHECK-NEXT:    retq
744; CHECK-NEXT:    ## -- End function
745;
746; MCU-LABEL: test14:
747; MCU:       # BB#0:
748; MCU-NEXT:    xorl %ecx, %ecx
749; MCU-NEXT:    cmpl %edx, %eax
750; MCU-NEXT:    setae %cl
751; MCU-NEXT:    negl %ecx
752; MCU-NEXT:    movl %ecx, %eax
753; MCU-NEXT:    retl
754  %c = icmp uge i32 %a, %b
755  %d = sext i1 %c to i32
756  ret i32 %d
757}
758
759; rdar://10961709
760define i32 @test15(i32 %x) nounwind {
761; GENERIC-LABEL: test15:
762; GENERIC:       ## BB#0: ## %entry
763; GENERIC-NEXT:    negl %edi
764; GENERIC-NEXT:    sbbl %eax, %eax
765; GENERIC-NEXT:    retq
766; GENERIC-NEXT:    ## -- End function
767;
768; ATOM-LABEL: test15:
769; ATOM:       ## BB#0: ## %entry
770; ATOM-NEXT:    negl %edi
771; ATOM-NEXT:    sbbl %eax, %eax
772; ATOM-NEXT:    nop
773; ATOM-NEXT:    nop
774; ATOM-NEXT:    nop
775; ATOM-NEXT:    nop
776; ATOM-NEXT:    retq
777; ATOM-NEXT:    ## -- End function
778;
779; MCU-LABEL: test15:
780; MCU:       # BB#0: # %entry
781; MCU-NEXT:    negl %eax
782; MCU-NEXT:    sbbl %eax, %eax
783; MCU-NEXT:    retl
784entry:
785  %cmp = icmp ne i32 %x, 0
786  %sub = sext i1 %cmp to i32
787  ret i32 %sub
788}
789
790define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
791; GENERIC-LABEL: test16:
792; GENERIC:       ## BB#0: ## %entry
793; GENERIC-NEXT:    negq %rdi
794; GENERIC-NEXT:    sbbq %rax, %rax
795; GENERIC-NEXT:    retq
796;
797; ATOM-LABEL: test16:
798; ATOM:       ## BB#0: ## %entry
799; ATOM-NEXT:    negq %rdi
800; ATOM-NEXT:    sbbq %rax, %rax
801; ATOM-NEXT:    nop
802; ATOM-NEXT:    nop
803; ATOM-NEXT:    nop
804; ATOM-NEXT:    nop
805; ATOM-NEXT:    retq
806;
807; MCU-LABEL: test16:
808; MCU:       # BB#0: # %entry
809; MCU-NEXT:    movl %eax, %ecx
810; MCU-NEXT:    xorl %eax, %eax
811; MCU-NEXT:    orl %edx, %ecx
812; MCU-NEXT:    setne %al
813; MCU-NEXT:    negl %eax
814; MCU-NEXT:    movl %eax, %edx
815; MCU-NEXT:    retl
816entry:
817  %cmp = icmp ne i64 %x, 0
818  %conv1 = sext i1 %cmp to i64
819  ret i64 %conv1
820}
821
822define i16 @test17(i16 %x) nounwind {
823; GENERIC-LABEL: test17:
824; GENERIC:       ## BB#0: ## %entry
825; GENERIC-NEXT:    negw %di
826; GENERIC-NEXT:    sbbl %eax, %eax
827; GENERIC-NEXT:    ## kill: %AX<def> %AX<kill> %EAX<kill>
828; GENERIC-NEXT:    retq
829; GENERIC-NEXT:    ## -- End function
830;
831; ATOM-LABEL: test17:
832; ATOM:       ## BB#0: ## %entry
833; ATOM-NEXT:    negw %di
834; ATOM-NEXT:    sbbl %eax, %eax
835; ATOM-NEXT:    ## kill: %AX<def> %AX<kill> %EAX<kill>
836; ATOM-NEXT:    nop
837; ATOM-NEXT:    nop
838; ATOM-NEXT:    nop
839; ATOM-NEXT:    nop
840; ATOM-NEXT:    retq
841; ATOM-NEXT:    ## -- End function
842;
843; MCU-LABEL: test17:
844; MCU:       # BB#0: # %entry
845; MCU-NEXT:    negw %ax
846; MCU-NEXT:    sbbl %eax, %eax
847; MCU-NEXT:    # kill: %AX<def> %AX<kill> %EAX<kill>
848; MCU-NEXT:    retl
849entry:
850  %cmp = icmp ne i16 %x, 0
851  %sub = sext i1 %cmp to i16
852  ret i16 %sub
853}
854
855define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
856; GENERIC-LABEL: test18:
857; GENERIC:       ## BB#0:
858; GENERIC-NEXT:    cmpl $15, %edi
859; GENERIC-NEXT:    cmovgel %edx, %esi
860; GENERIC-NEXT:    movl %esi, %eax
861; GENERIC-NEXT:    retq
862; GENERIC-NEXT:    ## -- End function
863;
864; ATOM-LABEL: test18:
865; ATOM:       ## BB#0:
866; ATOM-NEXT:    cmpl $15, %edi
867; ATOM-NEXT:    cmovgel %edx, %esi
868; ATOM-NEXT:    movl %esi, %eax
869; ATOM-NEXT:    nop
870; ATOM-NEXT:    nop
871; ATOM-NEXT:    retq
872; ATOM-NEXT:    ## -- End function
873;
874; MCU-LABEL: test18:
875; MCU:       # BB#0:
876; MCU-NEXT:    cmpl $15, %eax
877; MCU-NEXT:    jl .LBB20_2
878; MCU-NEXT:  # BB#1:
879; MCU-NEXT:    movl %ecx, %edx
880; MCU-NEXT:  .LBB20_2:
881; MCU-NEXT:    movl %edx, %eax
882; MCU-NEXT:    retl
883  %cmp = icmp slt i32 %x, 15
884  %sel = select i1 %cmp, i8 %a, i8 %b
885  ret i8 %sel
886}
887
888define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
889; CHECK-LABEL: trunc_select_miscompile:
890; CHECK:       ## BB#0:
891; CHECK-NEXT:    orb $2, %sil
892; CHECK-NEXT:    movl %esi, %ecx
893; CHECK-NEXT:    shll %cl, %edi
894; CHECK-NEXT:    movl %edi, %eax
895; CHECK-NEXT:    retq
896;
897; MCU-LABEL: trunc_select_miscompile:
898; MCU:       # BB#0:
899; MCU-NEXT:    orb $2, %dl
900; MCU-NEXT:    movl %edx, %ecx
901; MCU-NEXT:    shll %cl, %eax
902; MCU-NEXT:    retl
903  %tmp1 = select i1 %cc, i32 3, i32 2
904  %tmp2 = shl i32 %a, %tmp1
905  ret i32 %tmp2
906}
907
908; reproducer for pr29002
909define void @clamp_i8(i32 %src, i8* %dst) {
910; GENERIC-LABEL: clamp_i8:
911; GENERIC:       ## BB#0:
912; GENERIC-NEXT:    cmpl $127, %edi
913; GENERIC-NEXT:    movl $127, %eax
914; GENERIC-NEXT:    cmovlel %edi, %eax
915; GENERIC-NEXT:    cmpl $-128, %eax
916; GENERIC-NEXT:    movb $-128, %cl
917; GENERIC-NEXT:    jl LBB22_2
918; GENERIC-NEXT:  ## BB#1:
919; GENERIC-NEXT:    movl %eax, %ecx
920; GENERIC-NEXT:  LBB22_2:
921; GENERIC-NEXT:    movb %cl, (%rsi)
922; GENERIC-NEXT:    retq
923;
924; ATOM-LABEL: clamp_i8:
925; ATOM:       ## BB#0:
926; ATOM-NEXT:    cmpl $127, %edi
927; ATOM-NEXT:    movl $127, %eax
928; ATOM-NEXT:    cmovlel %edi, %eax
929; ATOM-NEXT:    movb $-128, %cl
930; ATOM-NEXT:    cmpl $-128, %eax
931; ATOM-NEXT:    jl LBB22_2
932; ATOM-NEXT:  ## BB#1:
933; ATOM-NEXT:    movl %eax, %ecx
934; ATOM-NEXT:  LBB22_2:
935; ATOM-NEXT:    movb %cl, (%rsi)
936; ATOM-NEXT:    retq
937;
938; MCU-LABEL: clamp_i8:
939; MCU:       # BB#0:
940; MCU-NEXT:    cmpl $127, %eax
941; MCU-NEXT:    movl $127, %ecx
942; MCU-NEXT:    jg .LBB22_2
943; MCU-NEXT:  # BB#1:
944; MCU-NEXT:    movl %eax, %ecx
945; MCU-NEXT:  .LBB22_2:
946; MCU-NEXT:    cmpl $-128, %ecx
947; MCU-NEXT:    movb $-128, %al
948; MCU-NEXT:    jl .LBB22_4
949; MCU-NEXT:  # BB#3:
950; MCU-NEXT:    movl %ecx, %eax
951; MCU-NEXT:  .LBB22_4:
952; MCU-NEXT:    movb %al, (%edx)
953; MCU-NEXT:    retl
954  %cmp = icmp sgt i32 %src, 127
955  %sel1 = select i1 %cmp, i32 127, i32 %src
956  %cmp1 = icmp slt i32 %sel1, -128
957  %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
958  %conv = trunc i32 %sel2 to i8
959  store i8 %conv, i8* %dst, align 2
960  ret void
961}
962
963; reproducer for pr29002
964define void @clamp(i32 %src, i16* %dst) {
965; GENERIC-LABEL: clamp:
966; GENERIC:       ## BB#0:
967; GENERIC-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
968; GENERIC-NEXT:    movl $32767, %eax ## imm = 0x7FFF
969; GENERIC-NEXT:    cmovlel %edi, %eax
970; GENERIC-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
971; GENERIC-NEXT:    movw $-32768, %cx ## imm = 0x8000
972; GENERIC-NEXT:    cmovgew %ax, %cx
973; GENERIC-NEXT:    movw %cx, (%rsi)
974; GENERIC-NEXT:    retq
975;
976; ATOM-LABEL: clamp:
977; ATOM:       ## BB#0:
978; ATOM-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
979; ATOM-NEXT:    movl $32767, %eax ## imm = 0x7FFF
980; ATOM-NEXT:    cmovlel %edi, %eax
981; ATOM-NEXT:    movw $-32768, %cx ## imm = 0x8000
982; ATOM-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
983; ATOM-NEXT:    cmovgew %ax, %cx
984; ATOM-NEXT:    movw %cx, (%rsi)
985; ATOM-NEXT:    retq
986;
987; MCU-LABEL: clamp:
988; MCU:       # BB#0:
989; MCU-NEXT:    cmpl $32767, %eax # imm = 0x7FFF
990; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
991; MCU-NEXT:    jg .LBB23_2
992; MCU-NEXT:  # BB#1:
993; MCU-NEXT:    movl %eax, %ecx
994; MCU-NEXT:  .LBB23_2:
995; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
996; MCU-NEXT:    movw $-32768, %ax # imm = 0x8000
997; MCU-NEXT:    jl .LBB23_4
998; MCU-NEXT:  # BB#3:
999; MCU-NEXT:    movl %ecx, %eax
1000; MCU-NEXT:  .LBB23_4:
1001; MCU-NEXT:    movw %ax, (%edx)
1002; MCU-NEXT:    retl
1003  %cmp = icmp sgt i32 %src, 32767
1004  %sel1 = select i1 %cmp, i32 32767, i32 %src
1005  %cmp1 = icmp slt i32 %sel1, -32768
1006  %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
1007  %conv = trunc i32 %sel2 to i16
1008  store i16 %conv, i16* %dst, align 2
1009  ret void
1010}
1011
1012define void @test19() {
1013; This is a massive reduction of an llvm-stress test case that generates
1014; interesting chains feeding setcc and eventually a f32 select operation. This
1015; is intended to exercise the SELECT formation in the DAG combine simplifying
1016; a simplified select_cc node. If it it regresses and is no longer triggering
1017; that code path, it can be deleted.
1018;
1019; CHECK-LABEL: test19:
1020; CHECK:       ## BB#0: ## %BB
1021; CHECK-NEXT:    movl $-1, %eax
1022; CHECK-NEXT:    movb $1, %cl
1023; CHECK-NEXT:    .p2align 4, 0x90
1024; CHECK-NEXT:  LBB24_1: ## %CF
1025; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
1026; CHECK-NEXT:    testb %cl, %cl
1027; CHECK-NEXT:    jne LBB24_1
1028; CHECK-NEXT:  ## BB#2: ## %CF250
1029; CHECK-NEXT:    ## in Loop: Header=BB24_1 Depth=1
1030; CHECK-NEXT:    jne LBB24_1
1031; CHECK-NEXT:    .p2align 4, 0x90
1032; CHECK-NEXT:  LBB24_3: ## %CF242
1033; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
1034; CHECK-NEXT:    cmpl %eax, %eax
1035; CHECK-NEXT:    ucomiss %xmm0, %xmm0
1036; CHECK-NEXT:    jp LBB24_3
1037; CHECK-NEXT:  ## BB#4: ## %CF244
1038; CHECK-NEXT:    retq
1039;
1040; MCU-LABEL: test19:
1041; MCU:       # BB#0: # %BB
1042; MCU-NEXT:    movl $-1, %ecx
1043; MCU-NEXT:    movb $1, %al
1044; MCU-NEXT:    .p2align 4, 0x90
1045; MCU-NEXT:  .LBB24_1: # %CF
1046; MCU-NEXT:    # =>This Inner Loop Header: Depth=1
1047; MCU-NEXT:    testb %al, %al
1048; MCU-NEXT:    jne .LBB24_1
1049; MCU-NEXT:  # BB#2: # %CF250
1050; MCU-NEXT:    # in Loop: Header=BB24_1 Depth=1
1051; MCU-NEXT:    jne .LBB24_1
1052; MCU-NEXT:  # BB#3: # %CF242.preheader
1053; MCU-NEXT:    fldz
1054; MCU-NEXT:    .p2align 4, 0x90
1055; MCU-NEXT:  .LBB24_4: # %CF242
1056; MCU-NEXT:    # =>This Inner Loop Header: Depth=1
1057; MCU-NEXT:    cmpl %eax, %ecx
1058; MCU-NEXT:    fucom %st(0)
1059; MCU-NEXT:    fnstsw %ax
1060; MCU-NEXT:    # kill: %AH<def> %AH<kill> %AX<kill>
1061; MCU-NEXT:    sahf
1062; MCU-NEXT:    jp .LBB24_4
1063; MCU-NEXT:  # BB#5: # %CF244
1064; MCU-NEXT:    fstp %st(0)
1065; MCU-NEXT:    retl
1066BB:
1067  br label %CF
1068
1069CF:
1070  %Cmp10 = icmp ule i8 undef, undef
1071  br i1 %Cmp10, label %CF, label %CF250
1072
1073CF250:
1074  %E12 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 2
1075  %Cmp32 = icmp ugt i1 %Cmp10, false
1076  br i1 %Cmp32, label %CF, label %CF242
1077
1078CF242:
1079  %Cmp38 = icmp uge i32 %E12, undef
1080  %FC = uitofp i1 %Cmp38 to float
1081  %Sl59 = select i1 %Cmp32, float %FC, float undef
1082  %Cmp60 = fcmp ugt float undef, undef
1083  br i1 %Cmp60, label %CF242, label %CF244
1084
1085CF244:
1086  %B122 = fadd float %Sl59, undef
1087  ret void
1088}
1089
1090define i16 @select_xor_1(i16 %A, i8 %cond) {
1091; CHECK-LABEL: select_xor_1:
1092; CHECK:       ## BB#0: ## %entry
1093; CHECK-NEXT:    movl %edi, %eax
1094; CHECK-NEXT:    xorl $43, %eax
1095; CHECK-NEXT:    testb $1, %sil
1096; CHECK-NEXT:    cmovnew %ax, %di
1097; CHECK-NEXT:    movl %edi, %eax
1098; CHECK-NEXT:    retq
1099;
1100; MCU-LABEL: select_xor_1:
1101; MCU:       # BB#0: # %entry
1102; MCU-NEXT:    andl $1, %edx
1103; MCU-NEXT:    negl %edx
1104; MCU-NEXT:    andl $43, %edx
1105; MCU-NEXT:    xorl %edx, %eax
1106; MCU-NEXT:    # kill: %AX<def> %AX<kill> %EAX<kill>
1107; MCU-NEXT:    retl
1108entry:
1109 %and = and i8 %cond, 1
1110 %cmp10 = icmp eq i8 %and, 0
1111 %0 = xor i16 %A, 43
1112 %1 = select i1 %cmp10, i16 %A, i16 %0
1113 ret i16 %1
1114}
1115
1116define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1117; CHECK-LABEL: select_xor_2:
1118; CHECK:       ## BB#0: ## %entry
1119; CHECK-NEXT:    xorl %edi, %esi
1120; CHECK-NEXT:    testb $1, %dl
1121; CHECK-NEXT:    cmovel %edi, %esi
1122; CHECK-NEXT:    movl %esi, %eax
1123; CHECK-NEXT:    retq
1124;
1125; MCU-LABEL: select_xor_2:
1126; MCU:       # BB#0: # %entry
1127; MCU-NEXT:    andl $1, %ecx
1128; MCU-NEXT:    negl %ecx
1129; MCU-NEXT:    andl %edx, %ecx
1130; MCU-NEXT:    xorl %ecx, %eax
1131; MCU-NEXT:    retl
1132entry:
1133 %and = and i8 %cond, 1
1134 %cmp10 = icmp eq i8 %and, 0
1135 %0 = xor i32 %B, %A
1136 %1 = select i1 %cmp10, i32 %A, i32 %0
1137 ret i32 %1
1138}
1139
1140define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1141; CHECK-LABEL: select_or:
1142; CHECK:       ## BB#0: ## %entry
1143; CHECK-NEXT:    orl %edi, %esi
1144; CHECK-NEXT:    testb $1, %dl
1145; CHECK-NEXT:    cmovel %edi, %esi
1146; CHECK-NEXT:    movl %esi, %eax
1147; CHECK-NEXT:    retq
1148;
1149; MCU-LABEL: select_or:
1150; MCU:       # BB#0: # %entry
1151; MCU-NEXT:    andl $1, %ecx
1152; MCU-NEXT:    negl %ecx
1153; MCU-NEXT:    andl %edx, %ecx
1154; MCU-NEXT:    orl %ecx, %eax
1155; MCU-NEXT:    retl
1156entry:
1157 %and = and i8 %cond, 1
1158 %cmp10 = icmp eq i8 %and, 0
1159 %0 = or i32 %B, %A
1160 %1 = select i1 %cmp10, i32 %A, i32 %0
1161 ret i32 %1
1162}
1163
1164define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1165; CHECK-LABEL: select_or_1:
1166; CHECK:       ## BB#0: ## %entry
1167; CHECK-NEXT:    orl %edi, %esi
1168; CHECK-NEXT:    testb $1, %dl
1169; CHECK-NEXT:    cmovel %edi, %esi
1170; CHECK-NEXT:    movl %esi, %eax
1171; CHECK-NEXT:    retq
1172;
1173; MCU-LABEL: select_or_1:
1174; MCU:       # BB#0: # %entry
1175; MCU-NEXT:    andl $1, %ecx
1176; MCU-NEXT:    negl %ecx
1177; MCU-NEXT:    andl %edx, %ecx
1178; MCU-NEXT:    orl %ecx, %eax
1179; MCU-NEXT:    retl
1180entry:
1181 %and = and i32 %cond, 1
1182 %cmp10 = icmp eq i32 %and, 0
1183 %0 = or i32 %B, %A
1184 %1 = select i1 %cmp10, i32 %A, i32 %0
1185 ret i32 %1
1186}
1187