1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC 3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM 4; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon | FileCheck %s --check-prefix=ATHLON 5; RUN: llc < %s -mtriple=i386-intel-elfiamcu | FileCheck %s --check-prefix=MCU 6 7; PR5757 8%0 = type { i64, i32 } 9 10define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind { 11; CHECK-LABEL: test1: 12; CHECK: ## %bb.0: 13; CHECK-NEXT: addq $8, %rdi 14; CHECK-NEXT: addq $8, %rsi 15; CHECK-NEXT: testb $1, %dl 16; CHECK-NEXT: cmovneq %rdi, %rsi 17; CHECK-NEXT: movl (%rsi), %eax 18; CHECK-NEXT: retq 19; 20; ATHLON-LABEL: test1: 21; ATHLON: ## %bb.0: 22; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 23; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 24; ATHLON-NEXT: addl $8, %ecx 25; ATHLON-NEXT: addl $8, %eax 26; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 27; ATHLON-NEXT: cmovnel %ecx, %eax 28; ATHLON-NEXT: movl (%eax), %eax 29; ATHLON-NEXT: retl 30; 31; MCU-LABEL: test1: 32; MCU: # %bb.0: 33; MCU-NEXT: testb $1, %cl 34; MCU-NEXT: jne .LBB0_1 35; MCU-NEXT: # %bb.2: 36; MCU-NEXT: addl $8, %edx 37; MCU-NEXT: movl (%edx), %eax 38; MCU-NEXT: retl 39; MCU-NEXT: .LBB0_1: 40; MCU-NEXT: addl $8, %eax 41; MCU-NEXT: movl (%eax), %eax 42; MCU-NEXT: retl 43 %t0 = load %0, %0* %p 44 %t1 = load %0, %0* %q 45 %t4 = select i1 %r, %0 %t0, %0 %t1 46 %t5 = extractvalue %0 %t4, 1 47 ret i32 %t5 48} 49 50; PR2139 51define i32 @test2() nounwind { 52; GENERIC-LABEL: test2: 53; GENERIC: ## %bb.0: ## %entry 54; GENERIC-NEXT: pushq %rax 55; GENERIC-NEXT: callq _return_false 56; GENERIC-NEXT: xorl %ecx, %ecx 57; GENERIC-NEXT: testb $1, %al 58; GENERIC-NEXT: movl $-480, %eax ## imm = 0xFE20 59; GENERIC-NEXT: cmovnel %ecx, %eax 60; GENERIC-NEXT: shll $3, %eax 61; GENERIC-NEXT: cmpl $32768, %eax ## imm = 0x8000 62; GENERIC-NEXT: jge LBB1_1 63; GENERIC-NEXT: ## %bb.2: ## %bb91 64; GENERIC-NEXT: xorl %eax, %eax 65; GENERIC-NEXT: popq %rcx 66; GENERIC-NEXT: retq 67; GENERIC-NEXT: LBB1_1: ## %bb90 68; GENERIC-NEXT: ud2 69; 70; ATOM-LABEL: test2: 71; ATOM: ## %bb.0: ## %entry 72; ATOM-NEXT: pushq %rax 73; ATOM-NEXT: callq _return_false 74; ATOM-NEXT: xorl %ecx, %ecx 75; ATOM-NEXT: movl $-480, %edx ## imm = 0xFE20 76; ATOM-NEXT: testb $1, %al 77; ATOM-NEXT: cmovnel %ecx, %edx 78; ATOM-NEXT: shll $3, %edx 79; ATOM-NEXT: cmpl $32768, %edx ## imm = 0x8000 80; ATOM-NEXT: jge LBB1_1 81; ATOM-NEXT: ## %bb.2: ## %bb91 82; ATOM-NEXT: xorl %eax, %eax 83; ATOM-NEXT: popq %rcx 84; ATOM-NEXT: retq 85; ATOM-NEXT: LBB1_1: ## %bb90 86; ATOM-NEXT: ud2 87; 88; ATHLON-LABEL: test2: 89; ATHLON: ## %bb.0: ## %entry 90; ATHLON-NEXT: subl $12, %esp 91; ATHLON-NEXT: calll _return_false 92; ATHLON-NEXT: xorl %ecx, %ecx 93; ATHLON-NEXT: testb $1, %al 94; ATHLON-NEXT: movl $-480, %eax ## imm = 0xFE20 95; ATHLON-NEXT: cmovnel %ecx, %eax 96; ATHLON-NEXT: shll $3, %eax 97; ATHLON-NEXT: cmpl $32768, %eax ## imm = 0x8000 98; ATHLON-NEXT: jge LBB1_1 99; ATHLON-NEXT: ## %bb.2: ## %bb91 100; ATHLON-NEXT: xorl %eax, %eax 101; ATHLON-NEXT: addl $12, %esp 102; ATHLON-NEXT: retl 103; ATHLON-NEXT: LBB1_1: ## %bb90 104; ATHLON-NEXT: ud2 105; 106; MCU-LABEL: test2: 107; MCU: # %bb.0: # %entry 108; MCU-NEXT: calll return_false 109; MCU-NEXT: xorl %ecx, %ecx 110; MCU-NEXT: testb $1, %al 111; MCU-NEXT: jne .LBB1_2 112; MCU-NEXT: # %bb.1: # %entry 113; MCU-NEXT: movl $-480, %ecx # imm = 0xFE20 114; MCU-NEXT: .LBB1_2: # %entry 115; MCU-NEXT: shll $3, %ecx 116; MCU-NEXT: cmpl $32768, %ecx # imm = 0x8000 117; MCU-NEXT: jge .LBB1_3 118; MCU-NEXT: # %bb.4: # %bb91 119; MCU-NEXT: xorl %eax, %eax 120; MCU-NEXT: retl 121; MCU-NEXT: .LBB1_3: # %bb90 122entry: 123 %tmp73 = tail call i1 @return_false() 124 %g.0 = select i1 %tmp73, i16 0, i16 -480 125 %tmp7778 = sext i16 %g.0 to i32 126 %tmp80 = shl i32 %tmp7778, 3 127 %tmp87 = icmp sgt i32 %tmp80, 32767 128 br i1 %tmp87, label %bb90, label %bb91 129bb90: 130 unreachable 131bb91: 132 ret i32 0 133} 134 135declare i1 @return_false() 136 137;; Select between two floating point constants. 138define float @test3(i32 %x) nounwind readnone { 139; GENERIC-LABEL: test3: 140; GENERIC: ## %bb.0: ## %entry 141; GENERIC-NEXT: xorl %eax, %eax 142; GENERIC-NEXT: testl %edi, %edi 143; GENERIC-NEXT: sete %al 144; GENERIC-NEXT: leaq {{.*}}(%rip), %rcx 145; GENERIC-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 146; GENERIC-NEXT: retq 147; 148; ATOM-LABEL: test3: 149; ATOM: ## %bb.0: ## %entry 150; ATOM-NEXT: xorl %eax, %eax 151; ATOM-NEXT: leaq {{.*}}(%rip), %rcx 152; ATOM-NEXT: testl %edi, %edi 153; ATOM-NEXT: sete %al 154; ATOM-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 155; ATOM-NEXT: retq 156; 157; ATHLON-LABEL: test3: 158; ATHLON: ## %bb.0: ## %entry 159; ATHLON-NEXT: xorl %eax, %eax 160; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp) 161; ATHLON-NEXT: sete %al 162; ATHLON-NEXT: flds LCPI2_0(,%eax,4) 163; ATHLON-NEXT: retl 164; 165; MCU-LABEL: test3: 166; MCU: # %bb.0: # %entry 167; MCU-NEXT: xorl %ecx, %ecx 168; MCU-NEXT: testl %eax, %eax 169; MCU-NEXT: sete %cl 170; MCU-NEXT: flds {{\.LCPI.*}}(,%ecx,4) 171; MCU-NEXT: retl 172entry: 173 %0 = icmp eq i32 %x, 0 174 %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 175 ret float %iftmp.0.0 176} 177 178define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly { 179; CHECK-LABEL: test4: 180; CHECK: ## %bb.0: ## %entry 181; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero 182; CHECK-NEXT: xorl %eax, %eax 183; CHECK-NEXT: ucomisd %xmm0, %xmm1 184; CHECK-NEXT: seta %al 185; CHECK-NEXT: movsbl (%rdi,%rax,4), %eax 186; CHECK-NEXT: retq 187; 188; ATHLON-LABEL: test4: 189; ATHLON: ## %bb.0: ## %entry 190; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 191; ATHLON-NEXT: fldl {{[0-9]+}}(%esp) 192; ATHLON-NEXT: flds LCPI3_0 193; ATHLON-NEXT: xorl %ecx, %ecx 194; ATHLON-NEXT: fucompi %st(1) 195; ATHLON-NEXT: fstp %st(0) 196; ATHLON-NEXT: seta %cl 197; ATHLON-NEXT: movsbl (%eax,%ecx,4), %eax 198; ATHLON-NEXT: retl 199; 200; MCU-LABEL: test4: 201; MCU: # %bb.0: # %entry 202; MCU-NEXT: movl %eax, %ecx 203; MCU-NEXT: fldl {{[0-9]+}}(%esp) 204; MCU-NEXT: flds {{\.LCPI.*}} 205; MCU-NEXT: fucompp 206; MCU-NEXT: fnstsw %ax 207; MCU-NEXT: xorl %edx, %edx 208; MCU-NEXT: # kill: def $ah killed $ah killed $ax 209; MCU-NEXT: sahf 210; MCU-NEXT: seta %dl 211; MCU-NEXT: movb (%ecx,%edx,4), %al 212; MCU-NEXT: retl 213entry: 214 %0 = fcmp olt double %F, 4.200000e+01 215 %iftmp.0.0 = select i1 %0, i32 4, i32 0 216 %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0 217 %2 = load i8, i8* %1, align 1 218 ret i8 %2 219} 220 221define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind { 222; CHECK-LABEL: test5: 223; CHECK: ## %bb.0: 224; CHECK-NEXT: testb $1, %dil 225; CHECK-NEXT: jne LBB4_2 226; CHECK-NEXT: ## %bb.1: 227; CHECK-NEXT: movdqa %xmm1, %xmm0 228; CHECK-NEXT: LBB4_2: 229; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 230; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 231; CHECK-NEXT: movd %xmm0, (%rsi) 232; CHECK-NEXT: retq 233; 234; ATHLON-LABEL: test5: 235; ATHLON: ## %bb.0: 236; ATHLON-NEXT: pushl %esi 237; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 238; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 239; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 240; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 241; ATHLON-NEXT: cmovnel %ecx, %edx 242; ATHLON-NEXT: movzwl (%edx), %ecx 243; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 244; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi 245; ATHLON-NEXT: cmovnel %edx, %esi 246; ATHLON-NEXT: movzwl (%esi), %edx 247; ATHLON-NEXT: movw %dx, 2(%eax) 248; ATHLON-NEXT: movw %cx, (%eax) 249; ATHLON-NEXT: popl %esi 250; ATHLON-NEXT: retl 251; 252; MCU-LABEL: test5: 253; MCU: # %bb.0: 254; MCU-NEXT: pushl %esi 255; MCU-NEXT: movl {{[0-9]+}}(%esp), %esi 256; MCU-NEXT: testb $1, %al 257; MCU-NEXT: jne .LBB4_2 258; MCU-NEXT: # %bb.1: 259; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %ecx 260; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %edx 261; MCU-NEXT: .LBB4_2: 262; MCU-NEXT: movw %cx, 2(%esi) 263; MCU-NEXT: movw %dx, (%esi) 264; MCU-NEXT: popl %esi 265; MCU-NEXT: retl 266 %x = select i1 %c, <2 x i16> %a, <2 x i16> %b 267 store <2 x i16> %x, <2 x i16>* %p 268 ret void 269} 270 271; Verify that the fmul gets sunk into the one part of the diamond where it is needed. 272define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { 273; CHECK-LABEL: test6: 274; CHECK: ## %bb.0: 275; CHECK-NEXT: testl %edi, %edi 276; CHECK-NEXT: je LBB5_1 277; CHECK-NEXT: ## %bb.2: 278; CHECK-NEXT: movaps (%rsi), %xmm0 279; CHECK-NEXT: movaps %xmm0, (%rsi) 280; CHECK-NEXT: retq 281; CHECK-NEXT: LBB5_1: 282; CHECK-NEXT: movaps (%rdx), %xmm0 283; CHECK-NEXT: mulps %xmm0, %xmm0 284; CHECK-NEXT: movaps %xmm0, (%rsi) 285; CHECK-NEXT: retq 286; 287; ATHLON-LABEL: test6: 288; ATHLON: ## %bb.0: 289; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 290; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 291; ATHLON-NEXT: flds 12(%ecx) 292; ATHLON-NEXT: flds 8(%ecx) 293; ATHLON-NEXT: flds 4(%ecx) 294; ATHLON-NEXT: flds (%ecx) 295; ATHLON-NEXT: flds (%eax) 296; ATHLON-NEXT: fmul %st(0), %st(0) 297; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp) 298; ATHLON-NEXT: fxch %st(1) 299; ATHLON-NEXT: fcmove %st(1), %st(0) 300; ATHLON-NEXT: fstp %st(1) 301; ATHLON-NEXT: flds 4(%eax) 302; ATHLON-NEXT: fmul %st(0), %st(0) 303; ATHLON-NEXT: fxch %st(2) 304; ATHLON-NEXT: fcmove %st(2), %st(0) 305; ATHLON-NEXT: fstp %st(2) 306; ATHLON-NEXT: flds 8(%eax) 307; ATHLON-NEXT: fmul %st(0), %st(0) 308; ATHLON-NEXT: fxch %st(3) 309; ATHLON-NEXT: fcmove %st(3), %st(0) 310; ATHLON-NEXT: fstp %st(3) 311; ATHLON-NEXT: flds 12(%eax) 312; ATHLON-NEXT: fmul %st(0), %st(0) 313; ATHLON-NEXT: fxch %st(4) 314; ATHLON-NEXT: fcmove %st(4), %st(0) 315; ATHLON-NEXT: fstp %st(4) 316; ATHLON-NEXT: fxch %st(3) 317; ATHLON-NEXT: fstps 12(%ecx) 318; ATHLON-NEXT: fxch %st(1) 319; ATHLON-NEXT: fstps 8(%ecx) 320; ATHLON-NEXT: fstps 4(%ecx) 321; ATHLON-NEXT: fstps (%ecx) 322; ATHLON-NEXT: retl 323; 324; MCU-LABEL: test6: 325; MCU: # %bb.0: 326; MCU-NEXT: pushl %eax 327; MCU-NEXT: flds 12(%edx) 328; MCU-NEXT: fstps (%esp) # 4-byte Folded Spill 329; MCU-NEXT: flds 8(%edx) 330; MCU-NEXT: flds 4(%edx) 331; MCU-NEXT: flds (%ecx) 332; MCU-NEXT: flds 4(%ecx) 333; MCU-NEXT: flds 8(%ecx) 334; MCU-NEXT: flds 12(%ecx) 335; MCU-NEXT: fmul %st(0), %st(0) 336; MCU-NEXT: fxch %st(1) 337; MCU-NEXT: fmul %st(0), %st(0) 338; MCU-NEXT: fxch %st(2) 339; MCU-NEXT: fmul %st(0), %st(0) 340; MCU-NEXT: fxch %st(3) 341; MCU-NEXT: fmul %st(0), %st(0) 342; MCU-NEXT: testl %eax, %eax 343; MCU-NEXT: flds (%edx) 344; MCU-NEXT: je .LBB5_2 345; MCU-NEXT: # %bb.1: 346; MCU-NEXT: fstp %st(1) 347; MCU-NEXT: fstp %st(3) 348; MCU-NEXT: fstp %st(1) 349; MCU-NEXT: fstp %st(0) 350; MCU-NEXT: flds (%esp) # 4-byte Folded Reload 351; MCU-NEXT: fldz 352; MCU-NEXT: fldz 353; MCU-NEXT: fldz 354; MCU-NEXT: fxch %st(1) 355; MCU-NEXT: fxch %st(6) 356; MCU-NEXT: fxch %st(1) 357; MCU-NEXT: fxch %st(5) 358; MCU-NEXT: fxch %st(4) 359; MCU-NEXT: fxch %st(1) 360; MCU-NEXT: fxch %st(3) 361; MCU-NEXT: fxch %st(2) 362; MCU-NEXT: .LBB5_2: 363; MCU-NEXT: fstp %st(0) 364; MCU-NEXT: fstp %st(5) 365; MCU-NEXT: fstp %st(3) 366; MCU-NEXT: fxch %st(2) 367; MCU-NEXT: fstps 12(%edx) 368; MCU-NEXT: fxch %st(1) 369; MCU-NEXT: fstps 8(%edx) 370; MCU-NEXT: fstps 4(%edx) 371; MCU-NEXT: fstps (%edx) 372; MCU-NEXT: popl %eax 373; MCU-NEXT: retl 374 %tmp = load <4 x float>, <4 x float>* %A 375 %tmp3 = load <4 x float>, <4 x float>* %B 376 %tmp9 = fmul <4 x float> %tmp3, %tmp3 377 %tmp.upgrd.1 = icmp eq i32 %C, 0 378 %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp 379 store <4 x float> %iftmp.38.0, <4 x float>* %A 380 ret void 381} 382 383; Select with fp80's 384define x86_fp80 @test7(i32 %tmp8) nounwind { 385; GENERIC-LABEL: test7: 386; GENERIC: ## %bb.0: 387; GENERIC-NEXT: xorl %eax, %eax 388; GENERIC-NEXT: testl %edi, %edi 389; GENERIC-NEXT: setns %al 390; GENERIC-NEXT: shlq $4, %rax 391; GENERIC-NEXT: leaq {{.*}}(%rip), %rcx 392; GENERIC-NEXT: fldt (%rax,%rcx) 393; GENERIC-NEXT: retq 394; 395; ATOM-LABEL: test7: 396; ATOM: ## %bb.0: 397; ATOM-NEXT: xorl %eax, %eax 398; ATOM-NEXT: leaq {{.*}}(%rip), %rcx 399; ATOM-NEXT: testl %edi, %edi 400; ATOM-NEXT: setns %al 401; ATOM-NEXT: shlq $4, %rax 402; ATOM-NEXT: fldt (%rax,%rcx) 403; ATOM-NEXT: retq 404; 405; ATHLON-LABEL: test7: 406; ATHLON: ## %bb.0: 407; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 408; ATHLON-NEXT: notl %eax 409; ATHLON-NEXT: shrl $27, %eax 410; ATHLON-NEXT: andl $-16, %eax 411; ATHLON-NEXT: fldt LCPI6_0(%eax) 412; ATHLON-NEXT: retl 413; 414; MCU-LABEL: test7: 415; MCU: # %bb.0: 416; MCU-NEXT: notl %eax 417; MCU-NEXT: shrl $27, %eax 418; MCU-NEXT: andl $-16, %eax 419; MCU-NEXT: fldt {{\.LCPI.*}}(%eax) 420; MCU-NEXT: retl 421 %tmp9 = icmp sgt i32 %tmp8, -1 422 %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 423 ret x86_fp80 %retval 424} 425 426; widening select v6i32 and then a sub 427define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { 428; GENERIC-LABEL: test8: 429; GENERIC: ## %bb.0: 430; GENERIC-NEXT: testb $1, %dil 431; GENERIC-NEXT: jne LBB7_1 432; GENERIC-NEXT: ## %bb.2: 433; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 434; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 435; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 436; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 437; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 438; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 439; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 440; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 441; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 442; GENERIC-NEXT: jmp LBB7_3 443; GENERIC-NEXT: LBB7_1: 444; GENERIC-NEXT: movd %r9d, %xmm0 445; GENERIC-NEXT: movd %r8d, %xmm1 446; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 447; GENERIC-NEXT: movd %ecx, %xmm2 448; GENERIC-NEXT: movd %edx, %xmm0 449; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 450; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 451; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 452; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 453; GENERIC-NEXT: LBB7_3: 454; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 455; GENERIC-NEXT: pcmpeqd %xmm2, %xmm2 456; GENERIC-NEXT: paddd %xmm2, %xmm0 457; GENERIC-NEXT: paddd %xmm2, %xmm1 458; GENERIC-NEXT: movq %xmm1, 16(%rsi) 459; GENERIC-NEXT: movdqa %xmm0, (%rsi) 460; GENERIC-NEXT: retq 461; 462; ATOM-LABEL: test8: 463; ATOM: ## %bb.0: 464; ATOM-NEXT: testb $1, %dil 465; ATOM-NEXT: jne LBB7_1 466; ATOM-NEXT: ## %bb.2: 467; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 468; ATOM-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 469; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 470; ATOM-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 471; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 472; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 473; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 474; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 475; ATOM-NEXT: jmp LBB7_3 476; ATOM-NEXT: LBB7_1: 477; ATOM-NEXT: movd %r9d, %xmm1 478; ATOM-NEXT: movd %r8d, %xmm2 479; ATOM-NEXT: movd %ecx, %xmm3 480; ATOM-NEXT: movd %edx, %xmm0 481; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 482; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 483; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 484; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 485; ATOM-NEXT: LBB7_3: 486; ATOM-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 487; ATOM-NEXT: pcmpeqd %xmm2, %xmm2 488; ATOM-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 489; ATOM-NEXT: paddd %xmm2, %xmm0 490; ATOM-NEXT: paddd %xmm2, %xmm1 491; ATOM-NEXT: movq %xmm1, 16(%rsi) 492; ATOM-NEXT: movdqa %xmm0, (%rsi) 493; ATOM-NEXT: retq 494; 495; ATHLON-LABEL: test8: 496; ATHLON: ## %bb.0: 497; ATHLON-NEXT: pushl %ebp 498; ATHLON-NEXT: pushl %ebx 499; ATHLON-NEXT: pushl %edi 500; ATHLON-NEXT: pushl %esi 501; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 502; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 503; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 504; ATHLON-NEXT: cmovnel %eax, %ecx 505; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 506; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 507; ATHLON-NEXT: cmovnel %eax, %edx 508; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 509; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi 510; ATHLON-NEXT: cmovnel %eax, %esi 511; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 512; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edi 513; ATHLON-NEXT: cmovnel %eax, %edi 514; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 515; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebx 516; ATHLON-NEXT: cmovnel %eax, %ebx 517; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 518; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebp 519; ATHLON-NEXT: cmovnel %eax, %ebp 520; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 521; ATHLON-NEXT: movl (%ecx), %ecx 522; ATHLON-NEXT: movl (%edx), %edx 523; ATHLON-NEXT: movl (%esi), %esi 524; ATHLON-NEXT: movl (%edi), %edi 525; ATHLON-NEXT: movl (%ebx), %ebx 526; ATHLON-NEXT: movl (%ebp), %ebp 527; ATHLON-NEXT: decl %ecx 528; ATHLON-NEXT: movl %ecx, 20(%eax) 529; ATHLON-NEXT: decl %edx 530; ATHLON-NEXT: movl %edx, 16(%eax) 531; ATHLON-NEXT: decl %esi 532; ATHLON-NEXT: movl %esi, 12(%eax) 533; ATHLON-NEXT: decl %edi 534; ATHLON-NEXT: movl %edi, 8(%eax) 535; ATHLON-NEXT: decl %ebx 536; ATHLON-NEXT: movl %ebx, 4(%eax) 537; ATHLON-NEXT: decl %ebp 538; ATHLON-NEXT: movl %ebp, (%eax) 539; ATHLON-NEXT: popl %esi 540; ATHLON-NEXT: popl %edi 541; ATHLON-NEXT: popl %ebx 542; ATHLON-NEXT: popl %ebp 543; ATHLON-NEXT: retl 544; 545; MCU-LABEL: test8: 546; MCU: # %bb.0: 547; MCU-NEXT: pushl %ebp 548; MCU-NEXT: pushl %ebx 549; MCU-NEXT: pushl %edi 550; MCU-NEXT: pushl %esi 551; MCU-NEXT: testb $1, %al 552; MCU-NEXT: jne .LBB7_1 553; MCU-NEXT: # %bb.2: 554; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax 555; MCU-NEXT: movl (%eax), %eax 556; MCU-NEXT: je .LBB7_5 557; MCU-NEXT: .LBB7_4: 558; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx 559; MCU-NEXT: movl (%ecx), %ecx 560; MCU-NEXT: je .LBB7_8 561; MCU-NEXT: .LBB7_7: 562; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi 563; MCU-NEXT: movl (%esi), %esi 564; MCU-NEXT: je .LBB7_11 565; MCU-NEXT: .LBB7_10: 566; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi 567; MCU-NEXT: movl (%edi), %edi 568; MCU-NEXT: je .LBB7_14 569; MCU-NEXT: .LBB7_13: 570; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebx 571; MCU-NEXT: movl (%ebx), %ebx 572; MCU-NEXT: je .LBB7_17 573; MCU-NEXT: .LBB7_16: 574; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp 575; MCU-NEXT: jmp .LBB7_18 576; MCU-NEXT: .LBB7_1: 577; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax 578; MCU-NEXT: movl (%eax), %eax 579; MCU-NEXT: jne .LBB7_4 580; MCU-NEXT: .LBB7_5: 581; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx 582; MCU-NEXT: movl (%ecx), %ecx 583; MCU-NEXT: jne .LBB7_7 584; MCU-NEXT: .LBB7_8: 585; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi 586; MCU-NEXT: movl (%esi), %esi 587; MCU-NEXT: jne .LBB7_10 588; MCU-NEXT: .LBB7_11: 589; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi 590; MCU-NEXT: movl (%edi), %edi 591; MCU-NEXT: jne .LBB7_13 592; MCU-NEXT: .LBB7_14: 593; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebx 594; MCU-NEXT: movl (%ebx), %ebx 595; MCU-NEXT: jne .LBB7_16 596; MCU-NEXT: .LBB7_17: 597; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp 598; MCU-NEXT: .LBB7_18: 599; MCU-NEXT: movl (%ebp), %ebp 600; MCU-NEXT: decl %ebp 601; MCU-NEXT: decl %ebx 602; MCU-NEXT: decl %edi 603; MCU-NEXT: decl %esi 604; MCU-NEXT: decl %ecx 605; MCU-NEXT: decl %eax 606; MCU-NEXT: movl %eax, 20(%edx) 607; MCU-NEXT: movl %ecx, 16(%edx) 608; MCU-NEXT: movl %esi, 12(%edx) 609; MCU-NEXT: movl %edi, 8(%edx) 610; MCU-NEXT: movl %ebx, 4(%edx) 611; MCU-NEXT: movl %ebp, (%edx) 612; MCU-NEXT: popl %esi 613; MCU-NEXT: popl %edi 614; MCU-NEXT: popl %ebx 615; MCU-NEXT: popl %ebp 616; MCU-NEXT: retl 617 %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 618 %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > 619 store <6 x i32> %val, <6 x i32>* %dst.addr 620 ret void 621} 622 623 624;; Test integer select between values and constants. 625 626define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone { 627; CHECK-LABEL: test9: 628; CHECK: ## %bb.0: 629; CHECK-NEXT: xorl %eax, %eax 630; CHECK-NEXT: cmpq $1, %rdi 631; CHECK-NEXT: sbbq %rax, %rax 632; CHECK-NEXT: orq %rsi, %rax 633; CHECK-NEXT: retq 634; 635; ATHLON-LABEL: test9: 636; ATHLON: ## %bb.0: 637; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 638; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 639; ATHLON-NEXT: movl $-1, %eax 640; ATHLON-NEXT: movl $-1, %edx 641; ATHLON-NEXT: je LBB8_2 642; ATHLON-NEXT: ## %bb.1: 643; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 644; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 645; ATHLON-NEXT: LBB8_2: 646; ATHLON-NEXT: retl 647; 648; MCU-LABEL: test9: 649; MCU: # %bb.0: 650; MCU-NEXT: orl %edx, %eax 651; MCU-NEXT: jne .LBB8_1 652; MCU-NEXT: # %bb.2: 653; MCU-NEXT: movl $-1, %eax 654; MCU-NEXT: movl $-1, %edx 655; MCU-NEXT: retl 656; MCU-NEXT: .LBB8_1: 657; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 658; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 659; MCU-NEXT: retl 660 %cmp = icmp ne i64 %x, 0 661 %cond = select i1 %cmp, i64 %y, i64 -1 662 ret i64 %cond 663} 664 665;; Same as test9 666define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone { 667; CHECK-LABEL: test9a: 668; CHECK: ## %bb.0: 669; CHECK-NEXT: xorl %eax, %eax 670; CHECK-NEXT: cmpq $1, %rdi 671; CHECK-NEXT: sbbq %rax, %rax 672; CHECK-NEXT: orq %rsi, %rax 673; CHECK-NEXT: retq 674; 675; ATHLON-LABEL: test9a: 676; ATHLON: ## %bb.0: 677; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 678; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 679; ATHLON-NEXT: movl $-1, %eax 680; ATHLON-NEXT: movl $-1, %edx 681; ATHLON-NEXT: je LBB9_2 682; ATHLON-NEXT: ## %bb.1: 683; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 684; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 685; ATHLON-NEXT: LBB9_2: 686; ATHLON-NEXT: retl 687; 688; MCU-LABEL: test9a: 689; MCU: # %bb.0: 690; MCU-NEXT: orl %edx, %eax 691; MCU-NEXT: movl $-1, %eax 692; MCU-NEXT: movl $-1, %edx 693; MCU-NEXT: je .LBB9_2 694; MCU-NEXT: # %bb.1: 695; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 696; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 697; MCU-NEXT: .LBB9_2: 698; MCU-NEXT: retl 699 %cmp = icmp eq i64 %x, 0 700 %cond = select i1 %cmp, i64 -1, i64 %y 701 ret i64 %cond 702} 703 704define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone { 705; GENERIC-LABEL: test9b: 706; GENERIC: ## %bb.0: 707; GENERIC-NEXT: cmpq $1, %rdi 708; GENERIC-NEXT: sbbq %rax, %rax 709; GENERIC-NEXT: orq %rsi, %rax 710; GENERIC-NEXT: retq 711; 712; ATOM-LABEL: test9b: 713; ATOM: ## %bb.0: 714; ATOM-NEXT: cmpq $1, %rdi 715; ATOM-NEXT: sbbq %rax, %rax 716; ATOM-NEXT: orq %rsi, %rax 717; ATOM-NEXT: nop 718; ATOM-NEXT: nop 719; ATOM-NEXT: retq 720; 721; ATHLON-LABEL: test9b: 722; ATHLON: ## %bb.0: 723; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 724; ATHLON-NEXT: xorl %edx, %edx 725; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 726; ATHLON-NEXT: sete %dl 727; ATHLON-NEXT: negl %edx 728; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 729; ATHLON-NEXT: orl %edx, %eax 730; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %edx 731; ATHLON-NEXT: retl 732; 733; MCU-LABEL: test9b: 734; MCU: # %bb.0: 735; MCU-NEXT: movl %edx, %ecx 736; MCU-NEXT: xorl %edx, %edx 737; MCU-NEXT: orl %ecx, %eax 738; MCU-NEXT: sete %dl 739; MCU-NEXT: negl %edx 740; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 741; MCU-NEXT: orl %edx, %eax 742; MCU-NEXT: orl {{[0-9]+}}(%esp), %edx 743; MCU-NEXT: retl 744 %cmp = icmp eq i64 %x, 0 745 %A = sext i1 %cmp to i64 746 %cond = or i64 %y, %A 747 ret i64 %cond 748} 749 750;; Select between -1 and 1. 751define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone { 752; CHECK-LABEL: test10: 753; CHECK: ## %bb.0: 754; CHECK-NEXT: xorl %eax, %eax 755; CHECK-NEXT: testq %rdi, %rdi 756; CHECK-NEXT: setne %al 757; CHECK-NEXT: leaq -1(%rax,%rax), %rax 758; CHECK-NEXT: retq 759; 760; ATHLON-LABEL: test10: 761; ATHLON: ## %bb.0: 762; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 763; ATHLON-NEXT: xorl %edx, %edx 764; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 765; ATHLON-NEXT: movl $-1, %ecx 766; ATHLON-NEXT: movl $1, %eax 767; ATHLON-NEXT: cmovel %ecx, %eax 768; ATHLON-NEXT: cmovel %ecx, %edx 769; ATHLON-NEXT: retl 770; 771; MCU-LABEL: test10: 772; MCU: # %bb.0: 773; MCU-NEXT: orl %edx, %eax 774; MCU-NEXT: movl $-1, %eax 775; MCU-NEXT: movl $-1, %edx 776; MCU-NEXT: je .LBB11_2 777; MCU-NEXT: # %bb.1: 778; MCU-NEXT: xorl %edx, %edx 779; MCU-NEXT: movl $1, %eax 780; MCU-NEXT: .LBB11_2: 781; MCU-NEXT: retl 782 %cmp = icmp eq i64 %x, 0 783 %cond = select i1 %cmp, i64 -1, i64 1 784 ret i64 %cond 785} 786 787define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone { 788; CHECK-LABEL: test11: 789; CHECK: ## %bb.0: 790; CHECK-NEXT: xorl %eax, %eax 791; CHECK-NEXT: cmpq $1, %rdi 792; CHECK-NEXT: sbbq %rax, %rax 793; CHECK-NEXT: notq %rax 794; CHECK-NEXT: orq %rsi, %rax 795; CHECK-NEXT: retq 796; 797; ATHLON-LABEL: test11: 798; ATHLON: ## %bb.0: 799; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 800; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 801; ATHLON-NEXT: movl $-1, %eax 802; ATHLON-NEXT: movl $-1, %edx 803; ATHLON-NEXT: jne LBB12_2 804; ATHLON-NEXT: ## %bb.1: 805; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 806; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 807; ATHLON-NEXT: LBB12_2: 808; ATHLON-NEXT: retl 809; 810; MCU-LABEL: test11: 811; MCU: # %bb.0: 812; MCU-NEXT: orl %edx, %eax 813; MCU-NEXT: je .LBB12_1 814; MCU-NEXT: # %bb.2: 815; MCU-NEXT: movl $-1, %eax 816; MCU-NEXT: movl $-1, %edx 817; MCU-NEXT: retl 818; MCU-NEXT: .LBB12_1: 819; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 820; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 821; MCU-NEXT: retl 822 %cmp = icmp eq i64 %x, 0 823 %cond = select i1 %cmp, i64 %y, i64 -1 824 ret i64 %cond 825} 826 827define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { 828; CHECK-LABEL: test11a: 829; CHECK: ## %bb.0: 830; CHECK-NEXT: xorl %eax, %eax 831; CHECK-NEXT: cmpq $1, %rdi 832; CHECK-NEXT: sbbq %rax, %rax 833; CHECK-NEXT: notq %rax 834; CHECK-NEXT: orq %rsi, %rax 835; CHECK-NEXT: retq 836; 837; ATHLON-LABEL: test11a: 838; ATHLON: ## %bb.0: 839; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 840; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 841; ATHLON-NEXT: movl $-1, %eax 842; ATHLON-NEXT: movl $-1, %edx 843; ATHLON-NEXT: jne LBB13_2 844; ATHLON-NEXT: ## %bb.1: 845; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 846; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 847; ATHLON-NEXT: LBB13_2: 848; ATHLON-NEXT: retl 849; 850; MCU-LABEL: test11a: 851; MCU: # %bb.0: 852; MCU-NEXT: orl %edx, %eax 853; MCU-NEXT: movl $-1, %eax 854; MCU-NEXT: movl $-1, %edx 855; MCU-NEXT: jne .LBB13_2 856; MCU-NEXT: # %bb.1: 857; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 858; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 859; MCU-NEXT: .LBB13_2: 860; MCU-NEXT: retl 861 %cmp = icmp ne i64 %x, 0 862 %cond = select i1 %cmp, i64 -1, i64 %y 863 ret i64 %cond 864} 865 866define i32 @test13(i32 %a, i32 %b) nounwind { 867; GENERIC-LABEL: test13: 868; GENERIC: ## %bb.0: 869; GENERIC-NEXT: cmpl %esi, %edi 870; GENERIC-NEXT: sbbl %eax, %eax 871; GENERIC-NEXT: retq 872; 873; ATOM-LABEL: test13: 874; ATOM: ## %bb.0: 875; ATOM-NEXT: cmpl %esi, %edi 876; ATOM-NEXT: sbbl %eax, %eax 877; ATOM-NEXT: nop 878; ATOM-NEXT: nop 879; ATOM-NEXT: nop 880; ATOM-NEXT: nop 881; ATOM-NEXT: retq 882; 883; ATHLON-LABEL: test13: 884; ATHLON: ## %bb.0: 885; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 886; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax 887; ATHLON-NEXT: sbbl %eax, %eax 888; ATHLON-NEXT: retl 889; 890; MCU-LABEL: test13: 891; MCU: # %bb.0: 892; MCU-NEXT: cmpl %edx, %eax 893; MCU-NEXT: sbbl %eax, %eax 894; MCU-NEXT: retl 895 %c = icmp ult i32 %a, %b 896 %d = sext i1 %c to i32 897 ret i32 %d 898} 899 900define i32 @test14(i32 %a, i32 %b) nounwind { 901; CHECK-LABEL: test14: 902; CHECK: ## %bb.0: 903; CHECK-NEXT: xorl %eax, %eax 904; CHECK-NEXT: cmpl %esi, %edi 905; CHECK-NEXT: setae %al 906; CHECK-NEXT: negl %eax 907; CHECK-NEXT: retq 908; 909; ATHLON-LABEL: test14: 910; ATHLON: ## %bb.0: 911; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 912; ATHLON-NEXT: xorl %eax, %eax 913; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %ecx 914; ATHLON-NEXT: setae %al 915; ATHLON-NEXT: negl %eax 916; ATHLON-NEXT: retl 917; 918; MCU-LABEL: test14: 919; MCU: # %bb.0: 920; MCU-NEXT: xorl %ecx, %ecx 921; MCU-NEXT: cmpl %edx, %eax 922; MCU-NEXT: setae %cl 923; MCU-NEXT: negl %ecx 924; MCU-NEXT: movl %ecx, %eax 925; MCU-NEXT: retl 926 %c = icmp uge i32 %a, %b 927 %d = sext i1 %c to i32 928 ret i32 %d 929} 930 931; rdar://10961709 932define i32 @test15(i32 %x) nounwind { 933; GENERIC-LABEL: test15: 934; GENERIC: ## %bb.0: ## %entry 935; GENERIC-NEXT: negl %edi 936; GENERIC-NEXT: sbbl %eax, %eax 937; GENERIC-NEXT: retq 938; 939; ATOM-LABEL: test15: 940; ATOM: ## %bb.0: ## %entry 941; ATOM-NEXT: negl %edi 942; ATOM-NEXT: sbbl %eax, %eax 943; ATOM-NEXT: nop 944; ATOM-NEXT: nop 945; ATOM-NEXT: nop 946; ATOM-NEXT: nop 947; ATOM-NEXT: retq 948; 949; ATHLON-LABEL: test15: 950; ATHLON: ## %bb.0: ## %entry 951; ATHLON-NEXT: xorl %eax, %eax 952; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax 953; ATHLON-NEXT: sbbl %eax, %eax 954; ATHLON-NEXT: retl 955; 956; MCU-LABEL: test15: 957; MCU: # %bb.0: # %entry 958; MCU-NEXT: negl %eax 959; MCU-NEXT: sbbl %eax, %eax 960; MCU-NEXT: retl 961entry: 962 %cmp = icmp ne i32 %x, 0 963 %sub = sext i1 %cmp to i32 964 ret i32 %sub 965} 966 967define i64 @test16(i64 %x) nounwind uwtable readnone ssp { 968; GENERIC-LABEL: test16: 969; GENERIC: ## %bb.0: ## %entry 970; GENERIC-NEXT: negq %rdi 971; GENERIC-NEXT: sbbq %rax, %rax 972; GENERIC-NEXT: retq 973; 974; ATOM-LABEL: test16: 975; ATOM: ## %bb.0: ## %entry 976; ATOM-NEXT: negq %rdi 977; ATOM-NEXT: sbbq %rax, %rax 978; ATOM-NEXT: nop 979; ATOM-NEXT: nop 980; ATOM-NEXT: nop 981; ATOM-NEXT: nop 982; ATOM-NEXT: retq 983; 984; ATHLON-LABEL: test16: 985; ATHLON: ## %bb.0: ## %entry 986; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 987; ATHLON-NEXT: xorl %eax, %eax 988; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %ecx 989; ATHLON-NEXT: setne %al 990; ATHLON-NEXT: negl %eax 991; ATHLON-NEXT: movl %eax, %edx 992; ATHLON-NEXT: retl 993; 994; MCU-LABEL: test16: 995; MCU: # %bb.0: # %entry 996; MCU-NEXT: movl %eax, %ecx 997; MCU-NEXT: xorl %eax, %eax 998; MCU-NEXT: orl %edx, %ecx 999; MCU-NEXT: setne %al 1000; MCU-NEXT: negl %eax 1001; MCU-NEXT: movl %eax, %edx 1002; MCU-NEXT: retl 1003entry: 1004 %cmp = icmp ne i64 %x, 0 1005 %conv1 = sext i1 %cmp to i64 1006 ret i64 %conv1 1007} 1008 1009define i16 @test17(i16 %x) nounwind { 1010; GENERIC-LABEL: test17: 1011; GENERIC: ## %bb.0: ## %entry 1012; GENERIC-NEXT: negw %di 1013; GENERIC-NEXT: sbbl %eax, %eax 1014; GENERIC-NEXT: ## kill: def $ax killed $ax killed $eax 1015; GENERIC-NEXT: retq 1016; 1017; ATOM-LABEL: test17: 1018; ATOM: ## %bb.0: ## %entry 1019; ATOM-NEXT: negw %di 1020; ATOM-NEXT: sbbl %eax, %eax 1021; ATOM-NEXT: ## kill: def $ax killed $ax killed $eax 1022; ATOM-NEXT: nop 1023; ATOM-NEXT: nop 1024; ATOM-NEXT: nop 1025; ATOM-NEXT: nop 1026; ATOM-NEXT: retq 1027; 1028; ATHLON-LABEL: test17: 1029; ATHLON: ## %bb.0: ## %entry 1030; ATHLON-NEXT: xorl %eax, %eax 1031; ATHLON-NEXT: cmpw {{[0-9]+}}(%esp), %ax 1032; ATHLON-NEXT: sbbl %eax, %eax 1033; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1034; ATHLON-NEXT: retl 1035; 1036; MCU-LABEL: test17: 1037; MCU: # %bb.0: # %entry 1038; MCU-NEXT: negw %ax 1039; MCU-NEXT: sbbl %eax, %eax 1040; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1041; MCU-NEXT: retl 1042entry: 1043 %cmp = icmp ne i16 %x, 0 1044 %sub = sext i1 %cmp to i16 1045 ret i16 %sub 1046} 1047 1048define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind { 1049; GENERIC-LABEL: test18: 1050; GENERIC: ## %bb.0: 1051; GENERIC-NEXT: movl %esi, %eax 1052; GENERIC-NEXT: cmpl $15, %edi 1053; GENERIC-NEXT: cmovgel %edx, %eax 1054; GENERIC-NEXT: ## kill: def $al killed $al killed $eax 1055; GENERIC-NEXT: retq 1056; 1057; ATOM-LABEL: test18: 1058; ATOM: ## %bb.0: 1059; ATOM-NEXT: movl %esi, %eax 1060; ATOM-NEXT: cmpl $15, %edi 1061; ATOM-NEXT: cmovgel %edx, %eax 1062; ATOM-NEXT: ## kill: def $al killed $al killed $eax 1063; ATOM-NEXT: nop 1064; ATOM-NEXT: nop 1065; ATOM-NEXT: retq 1066; 1067; ATHLON-LABEL: test18: 1068; ATHLON: ## %bb.0: 1069; ATHLON-NEXT: cmpl $15, {{[0-9]+}}(%esp) 1070; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 1071; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 1072; ATHLON-NEXT: cmovll %eax, %ecx 1073; ATHLON-NEXT: movb (%ecx), %al 1074; ATHLON-NEXT: retl 1075; 1076; MCU-LABEL: test18: 1077; MCU: # %bb.0: 1078; MCU-NEXT: cmpl $15, %eax 1079; MCU-NEXT: jl .LBB19_2 1080; MCU-NEXT: # %bb.1: 1081; MCU-NEXT: movl %ecx, %edx 1082; MCU-NEXT: .LBB19_2: 1083; MCU-NEXT: movl %edx, %eax 1084; MCU-NEXT: retl 1085 %cmp = icmp slt i32 %x, 15 1086 %sel = select i1 %cmp, i8 %a, i8 %b 1087 ret i8 %sel 1088} 1089 1090define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) { 1091; CHECK-LABEL: trunc_select_miscompile: 1092; CHECK: ## %bb.0: 1093; CHECK-NEXT: movl %esi, %ecx 1094; CHECK-NEXT: movl %edi, %eax 1095; CHECK-NEXT: orb $2, %cl 1096; CHECK-NEXT: ## kill: def $cl killed $cl killed $ecx 1097; CHECK-NEXT: shll %cl, %eax 1098; CHECK-NEXT: retq 1099; 1100; ATHLON-LABEL: trunc_select_miscompile: 1101; ATHLON: ## %bb.0: 1102; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1103; ATHLON-NEXT: movb {{[0-9]+}}(%esp), %cl 1104; ATHLON-NEXT: orb $2, %cl 1105; ATHLON-NEXT: shll %cl, %eax 1106; ATHLON-NEXT: retl 1107; 1108; MCU-LABEL: trunc_select_miscompile: 1109; MCU: # %bb.0: 1110; MCU-NEXT: movl %edx, %ecx 1111; MCU-NEXT: orb $2, %cl 1112; MCU-NEXT: # kill: def $cl killed $cl killed $ecx 1113; MCU-NEXT: shll %cl, %eax 1114; MCU-NEXT: retl 1115 %tmp1 = select i1 %cc, i32 3, i32 2 1116 %tmp2 = shl i32 %a, %tmp1 1117 ret i32 %tmp2 1118} 1119 1120; reproducer for pr29002 1121define void @clamp_i8(i32 %src, i8* %dst) { 1122; GENERIC-LABEL: clamp_i8: 1123; GENERIC: ## %bb.0: 1124; GENERIC-NEXT: cmpl $127, %edi 1125; GENERIC-NEXT: movl $127, %eax 1126; GENERIC-NEXT: cmovlel %edi, %eax 1127; GENERIC-NEXT: cmpl $-128, %eax 1128; GENERIC-NEXT: movb $-128, %cl 1129; GENERIC-NEXT: jl LBB21_2 1130; GENERIC-NEXT: ## %bb.1: 1131; GENERIC-NEXT: movl %eax, %ecx 1132; GENERIC-NEXT: LBB21_2: 1133; GENERIC-NEXT: movb %cl, (%rsi) 1134; GENERIC-NEXT: retq 1135; 1136; ATOM-LABEL: clamp_i8: 1137; ATOM: ## %bb.0: 1138; ATOM-NEXT: cmpl $127, %edi 1139; ATOM-NEXT: movl $127, %eax 1140; ATOM-NEXT: movb $-128, %cl 1141; ATOM-NEXT: cmovlel %edi, %eax 1142; ATOM-NEXT: cmpl $-128, %eax 1143; ATOM-NEXT: jl LBB21_2 1144; ATOM-NEXT: ## %bb.1: 1145; ATOM-NEXT: movl %eax, %ecx 1146; ATOM-NEXT: LBB21_2: 1147; ATOM-NEXT: movb %cl, (%rsi) 1148; ATOM-NEXT: retq 1149; 1150; ATHLON-LABEL: clamp_i8: 1151; ATHLON: ## %bb.0: 1152; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1153; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 1154; ATHLON-NEXT: cmpl $127, %edx 1155; ATHLON-NEXT: movl $127, %ecx 1156; ATHLON-NEXT: cmovlel %edx, %ecx 1157; ATHLON-NEXT: cmpl $-128, %ecx 1158; ATHLON-NEXT: movb $-128, %dl 1159; ATHLON-NEXT: jl LBB21_2 1160; ATHLON-NEXT: ## %bb.1: 1161; ATHLON-NEXT: movl %ecx, %edx 1162; ATHLON-NEXT: LBB21_2: 1163; ATHLON-NEXT: movb %dl, (%eax) 1164; ATHLON-NEXT: retl 1165; 1166; MCU-LABEL: clamp_i8: 1167; MCU: # %bb.0: 1168; MCU-NEXT: cmpl $127, %eax 1169; MCU-NEXT: movl $127, %ecx 1170; MCU-NEXT: jg .LBB21_2 1171; MCU-NEXT: # %bb.1: 1172; MCU-NEXT: movl %eax, %ecx 1173; MCU-NEXT: .LBB21_2: 1174; MCU-NEXT: cmpl $-128, %ecx 1175; MCU-NEXT: movb $-128, %al 1176; MCU-NEXT: jl .LBB21_4 1177; MCU-NEXT: # %bb.3: 1178; MCU-NEXT: movl %ecx, %eax 1179; MCU-NEXT: .LBB21_4: 1180; MCU-NEXT: movb %al, (%edx) 1181; MCU-NEXT: retl 1182 %cmp = icmp sgt i32 %src, 127 1183 %sel1 = select i1 %cmp, i32 127, i32 %src 1184 %cmp1 = icmp slt i32 %sel1, -128 1185 %sel2 = select i1 %cmp1, i32 -128, i32 %sel1 1186 %conv = trunc i32 %sel2 to i8 1187 store i8 %conv, i8* %dst, align 2 1188 ret void 1189} 1190 1191; reproducer for pr29002 1192define void @clamp(i32 %src, i16* %dst) { 1193; GENERIC-LABEL: clamp: 1194; GENERIC: ## %bb.0: 1195; GENERIC-NEXT: cmpl $32767, %edi ## imm = 0x7FFF 1196; GENERIC-NEXT: movl $32767, %eax ## imm = 0x7FFF 1197; GENERIC-NEXT: cmovlel %edi, %eax 1198; GENERIC-NEXT: cmpl $-32768, %eax ## imm = 0x8000 1199; GENERIC-NEXT: movl $32768, %ecx ## imm = 0x8000 1200; GENERIC-NEXT: cmovgel %eax, %ecx 1201; GENERIC-NEXT: movw %cx, (%rsi) 1202; GENERIC-NEXT: retq 1203; 1204; ATOM-LABEL: clamp: 1205; ATOM: ## %bb.0: 1206; ATOM-NEXT: cmpl $32767, %edi ## imm = 0x7FFF 1207; ATOM-NEXT: movl $32767, %eax ## imm = 0x7FFF 1208; ATOM-NEXT: movl $32768, %ecx ## imm = 0x8000 1209; ATOM-NEXT: cmovlel %edi, %eax 1210; ATOM-NEXT: cmpl $-32768, %eax ## imm = 0x8000 1211; ATOM-NEXT: cmovgel %eax, %ecx 1212; ATOM-NEXT: movw %cx, (%rsi) 1213; ATOM-NEXT: retq 1214; 1215; ATHLON-LABEL: clamp: 1216; ATHLON: ## %bb.0: 1217; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1218; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1219; ATHLON-NEXT: cmpl $32767, %ecx ## imm = 0x7FFF 1220; ATHLON-NEXT: movl $32767, %edx ## imm = 0x7FFF 1221; ATHLON-NEXT: cmovlel %ecx, %edx 1222; ATHLON-NEXT: cmpl $-32768, %edx ## imm = 0x8000 1223; ATHLON-NEXT: movl $32768, %ecx ## imm = 0x8000 1224; ATHLON-NEXT: cmovgel %edx, %ecx 1225; ATHLON-NEXT: movw %cx, (%eax) 1226; ATHLON-NEXT: retl 1227; 1228; MCU-LABEL: clamp: 1229; MCU: # %bb.0: 1230; MCU-NEXT: cmpl $32767, %eax # imm = 0x7FFF 1231; MCU-NEXT: movl $32767, %ecx # imm = 0x7FFF 1232; MCU-NEXT: jg .LBB22_2 1233; MCU-NEXT: # %bb.1: 1234; MCU-NEXT: movl %eax, %ecx 1235; MCU-NEXT: .LBB22_2: 1236; MCU-NEXT: cmpl $-32768, %ecx # imm = 0x8000 1237; MCU-NEXT: movl $32768, %eax # imm = 0x8000 1238; MCU-NEXT: jl .LBB22_4 1239; MCU-NEXT: # %bb.3: 1240; MCU-NEXT: movl %ecx, %eax 1241; MCU-NEXT: .LBB22_4: 1242; MCU-NEXT: movw %ax, (%edx) 1243; MCU-NEXT: retl 1244 %cmp = icmp sgt i32 %src, 32767 1245 %sel1 = select i1 %cmp, i32 32767, i32 %src 1246 %cmp1 = icmp slt i32 %sel1, -32768 1247 %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1 1248 %conv = trunc i32 %sel2 to i16 1249 store i16 %conv, i16* %dst, align 2 1250 ret void 1251} 1252 1253define void @test19() { 1254; This is a massive reduction of an llvm-stress test case that generates 1255; interesting chains feeding setcc and eventually a f32 select operation. This 1256; is intended to exercise the SELECT formation in the DAG combine simplifying 1257; a simplified select_cc node. If it it regresses and is no longer triggering 1258; that code path, it can be deleted. 1259; 1260; CHECK-LABEL: test19: 1261; CHECK: ## %bb.0: ## %BB 1262; CHECK-NEXT: movl $-1, %eax 1263; CHECK-NEXT: movb $1, %cl 1264; CHECK-NEXT: .p2align 4, 0x90 1265; CHECK-NEXT: LBB23_1: ## %CF 1266; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 1267; CHECK-NEXT: testb %cl, %cl 1268; CHECK-NEXT: jne LBB23_1 1269; CHECK-NEXT: ## %bb.2: ## %CF250 1270; CHECK-NEXT: ## in Loop: Header=BB23_1 Depth=1 1271; CHECK-NEXT: jne LBB23_1 1272; CHECK-NEXT: .p2align 4, 0x90 1273; CHECK-NEXT: LBB23_3: ## %CF242 1274; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 1275; CHECK-NEXT: cmpl %eax, %eax 1276; CHECK-NEXT: ucomiss %xmm0, %xmm0 1277; CHECK-NEXT: jp LBB23_3 1278; CHECK-NEXT: ## %bb.4: ## %CF244 1279; CHECK-NEXT: retq 1280; 1281; ATHLON-LABEL: test19: 1282; ATHLON: ## %bb.0: ## %BB 1283; ATHLON-NEXT: movb $1, %al 1284; ATHLON-NEXT: .p2align 4, 0x90 1285; ATHLON-NEXT: LBB23_1: ## %CF 1286; ATHLON-NEXT: ## =>This Inner Loop Header: Depth=1 1287; ATHLON-NEXT: testb %al, %al 1288; ATHLON-NEXT: jne LBB23_1 1289; ATHLON-NEXT: ## %bb.2: ## %CF250 1290; ATHLON-NEXT: ## in Loop: Header=BB23_1 Depth=1 1291; ATHLON-NEXT: jne LBB23_1 1292; ATHLON-NEXT: ## %bb.3: ## %CF242.preheader 1293; ATHLON-NEXT: fldz 1294; ATHLON-NEXT: .p2align 4, 0x90 1295; ATHLON-NEXT: LBB23_4: ## %CF242 1296; ATHLON-NEXT: ## =>This Inner Loop Header: Depth=1 1297; ATHLON-NEXT: fucomi %st(0) 1298; ATHLON-NEXT: jp LBB23_4 1299; ATHLON-NEXT: ## %bb.5: ## %CF244 1300; ATHLON-NEXT: fstp %st(0) 1301; ATHLON-NEXT: retl 1302; 1303; MCU-LABEL: test19: 1304; MCU: # %bb.0: # %BB 1305; MCU-NEXT: movl $-1, %ecx 1306; MCU-NEXT: movb $1, %al 1307; MCU-NEXT: .p2align 4, 0x90 1308; MCU-NEXT: .LBB23_1: # %CF 1309; MCU-NEXT: # =>This Inner Loop Header: Depth=1 1310; MCU-NEXT: testb %al, %al 1311; MCU-NEXT: jne .LBB23_1 1312; MCU-NEXT: # %bb.2: # %CF250 1313; MCU-NEXT: # in Loop: Header=BB23_1 Depth=1 1314; MCU-NEXT: jne .LBB23_1 1315; MCU-NEXT: # %bb.3: # %CF242.preheader 1316; MCU-NEXT: fldz 1317; MCU-NEXT: .p2align 4, 0x90 1318; MCU-NEXT: .LBB23_4: # %CF242 1319; MCU-NEXT: # =>This Inner Loop Header: Depth=1 1320; MCU-NEXT: cmpl %eax, %ecx 1321; MCU-NEXT: fucom %st(0) 1322; MCU-NEXT: fnstsw %ax 1323; MCU-NEXT: # kill: def $ah killed $ah killed $ax 1324; MCU-NEXT: sahf 1325; MCU-NEXT: jp .LBB23_4 1326; MCU-NEXT: # %bb.5: # %CF244 1327; MCU-NEXT: fstp %st(0) 1328; MCU-NEXT: retl 1329BB: 1330 br label %CF 1331 1332CF: 1333 %Cmp10 = icmp ule i8 undef, undef 1334 br i1 %Cmp10, label %CF, label %CF250 1335 1336CF250: 1337 %E12 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 2 1338 %Cmp32 = icmp ugt i1 %Cmp10, false 1339 br i1 %Cmp32, label %CF, label %CF242 1340 1341CF242: 1342 %Cmp38 = icmp uge i32 %E12, undef 1343 %FC = uitofp i1 %Cmp38 to float 1344 %Sl59 = select i1 %Cmp32, float %FC, float undef 1345 %Cmp60 = fcmp ugt float undef, undef 1346 br i1 %Cmp60, label %CF242, label %CF244 1347 1348CF244: 1349 %B122 = fadd float %Sl59, undef 1350 ret void 1351} 1352 1353define i16 @select_xor_1(i16 %A, i8 %cond) { 1354; CHECK-LABEL: select_xor_1: 1355; CHECK: ## %bb.0: ## %entry 1356; CHECK-NEXT: movl %edi, %eax 1357; CHECK-NEXT: xorl $43, %eax 1358; CHECK-NEXT: testb $1, %sil 1359; CHECK-NEXT: cmovel %edi, %eax 1360; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax 1361; CHECK-NEXT: retq 1362; 1363; ATHLON-LABEL: select_xor_1: 1364; ATHLON: ## %bb.0: ## %entry 1365; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1366; ATHLON-NEXT: movl %ecx, %eax 1367; ATHLON-NEXT: xorl $43, %eax 1368; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1369; ATHLON-NEXT: cmovel %ecx, %eax 1370; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1371; ATHLON-NEXT: retl 1372; 1373; MCU-LABEL: select_xor_1: 1374; MCU: # %bb.0: # %entry 1375; MCU-NEXT: andl $1, %edx 1376; MCU-NEXT: negl %edx 1377; MCU-NEXT: andl $43, %edx 1378; MCU-NEXT: xorl %edx, %eax 1379; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1380; MCU-NEXT: retl 1381entry: 1382 %and = and i8 %cond, 1 1383 %cmp10 = icmp eq i8 %and, 0 1384 %0 = xor i16 %A, 43 1385 %1 = select i1 %cmp10, i16 %A, i16 %0 1386 ret i16 %1 1387} 1388 1389; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1390; icmp eq (and %cond, 1), 0 1391define i16 @select_xor_1b(i16 %A, i8 %cond) { 1392; CHECK-LABEL: select_xor_1b: 1393; CHECK: ## %bb.0: ## %entry 1394; CHECK-NEXT: movl %edi, %eax 1395; CHECK-NEXT: xorl $43, %eax 1396; CHECK-NEXT: testb $1, %sil 1397; CHECK-NEXT: cmovel %edi, %eax 1398; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax 1399; CHECK-NEXT: retq 1400; 1401; ATHLON-LABEL: select_xor_1b: 1402; ATHLON: ## %bb.0: ## %entry 1403; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1404; ATHLON-NEXT: movl %ecx, %eax 1405; ATHLON-NEXT: xorl $43, %eax 1406; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1407; ATHLON-NEXT: cmovel %ecx, %eax 1408; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1409; ATHLON-NEXT: retl 1410; 1411; MCU-LABEL: select_xor_1b: 1412; MCU: # %bb.0: # %entry 1413; MCU-NEXT: testb $1, %dl 1414; MCU-NEXT: je .LBB25_2 1415; MCU-NEXT: # %bb.1: 1416; MCU-NEXT: xorl $43, %eax 1417; MCU-NEXT: .LBB25_2: # %entry 1418; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1419; MCU-NEXT: retl 1420entry: 1421 %and = and i8 %cond, 1 1422 %cmp10 = icmp ne i8 %and, 1 1423 %0 = xor i16 %A, 43 1424 %1 = select i1 %cmp10, i16 %A, i16 %0 1425 ret i16 %1 1426} 1427 1428define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) { 1429; CHECK-LABEL: select_xor_2: 1430; CHECK: ## %bb.0: ## %entry 1431; CHECK-NEXT: movl %esi, %eax 1432; CHECK-NEXT: xorl %edi, %eax 1433; CHECK-NEXT: testb $1, %dl 1434; CHECK-NEXT: cmovel %edi, %eax 1435; CHECK-NEXT: retq 1436; 1437; ATHLON-LABEL: select_xor_2: 1438; ATHLON: ## %bb.0: ## %entry 1439; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1440; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1441; ATHLON-NEXT: xorl %ecx, %eax 1442; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1443; ATHLON-NEXT: cmovel %ecx, %eax 1444; ATHLON-NEXT: retl 1445; 1446; MCU-LABEL: select_xor_2: 1447; MCU: # %bb.0: # %entry 1448; MCU-NEXT: andl $1, %ecx 1449; MCU-NEXT: negl %ecx 1450; MCU-NEXT: andl %edx, %ecx 1451; MCU-NEXT: xorl %ecx, %eax 1452; MCU-NEXT: retl 1453entry: 1454 %and = and i8 %cond, 1 1455 %cmp10 = icmp eq i8 %and, 0 1456 %0 = xor i32 %B, %A 1457 %1 = select i1 %cmp10, i32 %A, i32 %0 1458 ret i32 %1 1459} 1460 1461; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1462; icmp eq (and %cond, 1), 0 1463define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) { 1464; CHECK-LABEL: select_xor_2b: 1465; CHECK: ## %bb.0: ## %entry 1466; CHECK-NEXT: movl %esi, %eax 1467; CHECK-NEXT: xorl %edi, %eax 1468; CHECK-NEXT: testb $1, %dl 1469; CHECK-NEXT: cmovel %edi, %eax 1470; CHECK-NEXT: retq 1471; 1472; ATHLON-LABEL: select_xor_2b: 1473; ATHLON: ## %bb.0: ## %entry 1474; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1475; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1476; ATHLON-NEXT: xorl %ecx, %eax 1477; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1478; ATHLON-NEXT: cmovel %ecx, %eax 1479; ATHLON-NEXT: retl 1480; 1481; MCU-LABEL: select_xor_2b: 1482; MCU: # %bb.0: # %entry 1483; MCU-NEXT: testb $1, %cl 1484; MCU-NEXT: je .LBB27_2 1485; MCU-NEXT: # %bb.1: 1486; MCU-NEXT: xorl %edx, %eax 1487; MCU-NEXT: .LBB27_2: # %entry 1488; MCU-NEXT: retl 1489entry: 1490 %and = and i8 %cond, 1 1491 %cmp10 = icmp ne i8 %and, 1 1492 %0 = xor i32 %B, %A 1493 %1 = select i1 %cmp10, i32 %A, i32 %0 1494 ret i32 %1 1495} 1496 1497define i32 @select_or(i32 %A, i32 %B, i8 %cond) { 1498; CHECK-LABEL: select_or: 1499; CHECK: ## %bb.0: ## %entry 1500; CHECK-NEXT: movl %esi, %eax 1501; CHECK-NEXT: orl %edi, %eax 1502; CHECK-NEXT: testb $1, %dl 1503; CHECK-NEXT: cmovel %edi, %eax 1504; CHECK-NEXT: retq 1505; 1506; ATHLON-LABEL: select_or: 1507; ATHLON: ## %bb.0: ## %entry 1508; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1509; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1510; ATHLON-NEXT: orl %ecx, %eax 1511; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1512; ATHLON-NEXT: cmovel %ecx, %eax 1513; ATHLON-NEXT: retl 1514; 1515; MCU-LABEL: select_or: 1516; MCU: # %bb.0: # %entry 1517; MCU-NEXT: andl $1, %ecx 1518; MCU-NEXT: negl %ecx 1519; MCU-NEXT: andl %edx, %ecx 1520; MCU-NEXT: orl %ecx, %eax 1521; MCU-NEXT: retl 1522entry: 1523 %and = and i8 %cond, 1 1524 %cmp10 = icmp eq i8 %and, 0 1525 %0 = or i32 %B, %A 1526 %1 = select i1 %cmp10, i32 %A, i32 %0 1527 ret i32 %1 1528} 1529 1530; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1531; icmp eq (and %cond, 1), 0 1532define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) { 1533; CHECK-LABEL: select_or_b: 1534; CHECK: ## %bb.0: ## %entry 1535; CHECK-NEXT: movl %esi, %eax 1536; CHECK-NEXT: orl %edi, %eax 1537; CHECK-NEXT: testb $1, %dl 1538; CHECK-NEXT: cmovel %edi, %eax 1539; CHECK-NEXT: retq 1540; 1541; ATHLON-LABEL: select_or_b: 1542; ATHLON: ## %bb.0: ## %entry 1543; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1544; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1545; ATHLON-NEXT: orl %ecx, %eax 1546; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1547; ATHLON-NEXT: cmovel %ecx, %eax 1548; ATHLON-NEXT: retl 1549; 1550; MCU-LABEL: select_or_b: 1551; MCU: # %bb.0: # %entry 1552; MCU-NEXT: testb $1, %cl 1553; MCU-NEXT: je .LBB29_2 1554; MCU-NEXT: # %bb.1: 1555; MCU-NEXT: orl %edx, %eax 1556; MCU-NEXT: .LBB29_2: # %entry 1557; MCU-NEXT: retl 1558entry: 1559 %and = and i8 %cond, 1 1560 %cmp10 = icmp ne i8 %and, 1 1561 %0 = or i32 %B, %A 1562 %1 = select i1 %cmp10, i32 %A, i32 %0 1563 ret i32 %1 1564} 1565 1566define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) { 1567; CHECK-LABEL: select_or_1: 1568; CHECK: ## %bb.0: ## %entry 1569; CHECK-NEXT: movl %esi, %eax 1570; CHECK-NEXT: orl %edi, %eax 1571; CHECK-NEXT: testb $1, %dl 1572; CHECK-NEXT: cmovel %edi, %eax 1573; CHECK-NEXT: retq 1574; 1575; ATHLON-LABEL: select_or_1: 1576; ATHLON: ## %bb.0: ## %entry 1577; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1578; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1579; ATHLON-NEXT: orl %ecx, %eax 1580; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1581; ATHLON-NEXT: cmovel %ecx, %eax 1582; ATHLON-NEXT: retl 1583; 1584; MCU-LABEL: select_or_1: 1585; MCU: # %bb.0: # %entry 1586; MCU-NEXT: andl $1, %ecx 1587; MCU-NEXT: negl %ecx 1588; MCU-NEXT: andl %edx, %ecx 1589; MCU-NEXT: orl %ecx, %eax 1590; MCU-NEXT: retl 1591entry: 1592 %and = and i32 %cond, 1 1593 %cmp10 = icmp eq i32 %and, 0 1594 %0 = or i32 %B, %A 1595 %1 = select i1 %cmp10, i32 %A, i32 %0 1596 ret i32 %1 1597} 1598 1599; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1600; icmp eq (and %cond, 1), 0 1601define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) { 1602; CHECK-LABEL: select_or_1b: 1603; CHECK: ## %bb.0: ## %entry 1604; CHECK-NEXT: movl %esi, %eax 1605; CHECK-NEXT: orl %edi, %eax 1606; CHECK-NEXT: testb $1, %dl 1607; CHECK-NEXT: cmovel %edi, %eax 1608; CHECK-NEXT: retq 1609; 1610; ATHLON-LABEL: select_or_1b: 1611; ATHLON: ## %bb.0: ## %entry 1612; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1613; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1614; ATHLON-NEXT: orl %ecx, %eax 1615; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1616; ATHLON-NEXT: cmovel %ecx, %eax 1617; ATHLON-NEXT: retl 1618; 1619; MCU-LABEL: select_or_1b: 1620; MCU: # %bb.0: # %entry 1621; MCU-NEXT: testb $1, %cl 1622; MCU-NEXT: je .LBB31_2 1623; MCU-NEXT: # %bb.1: 1624; MCU-NEXT: orl %edx, %eax 1625; MCU-NEXT: .LBB31_2: # %entry 1626; MCU-NEXT: retl 1627entry: 1628 %and = and i32 %cond, 1 1629 %cmp10 = icmp ne i32 %and, 1 1630 %0 = or i32 %B, %A 1631 %1 = select i1 %cmp10, i32 %A, i32 %0 1632 ret i32 %1 1633} 1634