1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC 3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM 4; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon | FileCheck %s --check-prefix=ATHLON 5; RUN: llc < %s -mtriple=i386-intel-elfiamcu | FileCheck %s --check-prefix=MCU 6 7; PR5757 8%0 = type { i64, i32 } 9 10define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind { 11; CHECK-LABEL: test1: 12; CHECK: ## %bb.0: 13; CHECK-NEXT: addq $8, %rdi 14; CHECK-NEXT: addq $8, %rsi 15; CHECK-NEXT: testb $1, %dl 16; CHECK-NEXT: cmovneq %rdi, %rsi 17; CHECK-NEXT: movl (%rsi), %eax 18; CHECK-NEXT: retq 19; 20; ATHLON-LABEL: test1: 21; ATHLON: ## %bb.0: 22; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 23; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 24; ATHLON-NEXT: addl $8, %ecx 25; ATHLON-NEXT: addl $8, %eax 26; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 27; ATHLON-NEXT: cmovnel %ecx, %eax 28; ATHLON-NEXT: movl (%eax), %eax 29; ATHLON-NEXT: retl 30; 31; MCU-LABEL: test1: 32; MCU: # %bb.0: 33; MCU-NEXT: testb $1, %cl 34; MCU-NEXT: jne .LBB0_1 35; MCU-NEXT: # %bb.2: 36; MCU-NEXT: addl $8, %edx 37; MCU-NEXT: movl (%edx), %eax 38; MCU-NEXT: retl 39; MCU-NEXT: .LBB0_1: 40; MCU-NEXT: addl $8, %eax 41; MCU-NEXT: movl (%eax), %eax 42; MCU-NEXT: retl 43 %t0 = load %0, %0* %p 44 %t1 = load %0, %0* %q 45 %t4 = select i1 %r, %0 %t0, %0 %t1 46 %t5 = extractvalue %0 %t4, 1 47 ret i32 %t5 48} 49 50; PR2139 51define i32 @test2() nounwind { 52; GENERIC-LABEL: test2: 53; GENERIC: ## %bb.0: ## %entry 54; GENERIC-NEXT: pushq %rax 55; GENERIC-NEXT: callq _return_false 56; GENERIC-NEXT: xorl %ecx, %ecx 57; GENERIC-NEXT: testb $1, %al 58; GENERIC-NEXT: movl $-3840, %eax ## imm = 0xF100 59; GENERIC-NEXT: cmovnel %ecx, %eax 60; GENERIC-NEXT: cmpl $32768, %eax ## imm = 0x8000 61; GENERIC-NEXT: jge LBB1_1 62; GENERIC-NEXT: ## %bb.2: ## %bb91 63; GENERIC-NEXT: xorl %eax, %eax 64; GENERIC-NEXT: popq %rcx 65; GENERIC-NEXT: retq 66; GENERIC-NEXT: LBB1_1: ## %bb90 67; GENERIC-NEXT: ud2 68; 69; ATOM-LABEL: test2: 70; ATOM: ## %bb.0: ## %entry 71; ATOM-NEXT: pushq %rax 72; ATOM-NEXT: callq _return_false 73; ATOM-NEXT: xorl %ecx, %ecx 74; ATOM-NEXT: movl $-3840, %edx ## imm = 0xF100 75; ATOM-NEXT: testb $1, %al 76; ATOM-NEXT: cmovnel %ecx, %edx 77; ATOM-NEXT: cmpl $32768, %edx ## imm = 0x8000 78; ATOM-NEXT: jge LBB1_1 79; ATOM-NEXT: ## %bb.2: ## %bb91 80; ATOM-NEXT: xorl %eax, %eax 81; ATOM-NEXT: popq %rcx 82; ATOM-NEXT: retq 83; ATOM-NEXT: LBB1_1: ## %bb90 84; ATOM-NEXT: ud2 85; 86; ATHLON-LABEL: test2: 87; ATHLON: ## %bb.0: ## %entry 88; ATHLON-NEXT: subl $12, %esp 89; ATHLON-NEXT: calll _return_false 90; ATHLON-NEXT: xorl %ecx, %ecx 91; ATHLON-NEXT: testb $1, %al 92; ATHLON-NEXT: movl $-3840, %eax ## imm = 0xF100 93; ATHLON-NEXT: cmovnel %ecx, %eax 94; ATHLON-NEXT: cmpl $32768, %eax ## imm = 0x8000 95; ATHLON-NEXT: jge LBB1_1 96; ATHLON-NEXT: ## %bb.2: ## %bb91 97; ATHLON-NEXT: xorl %eax, %eax 98; ATHLON-NEXT: addl $12, %esp 99; ATHLON-NEXT: retl 100; ATHLON-NEXT: LBB1_1: ## %bb90 101; ATHLON-NEXT: ud2 102; 103; MCU-LABEL: test2: 104; MCU: # %bb.0: # %entry 105; MCU-NEXT: calll return_false 106; MCU-NEXT: xorl %ecx, %ecx 107; MCU-NEXT: testb $1, %al 108; MCU-NEXT: jne .LBB1_2 109; MCU-NEXT: # %bb.1: # %entry 110; MCU-NEXT: movl $-3840, %ecx # imm = 0xF100 111; MCU-NEXT: .LBB1_2: # %entry 112; MCU-NEXT: cmpl $32768, %ecx # imm = 0x8000 113; MCU-NEXT: jge .LBB1_3 114; MCU-NEXT: # %bb.4: # %bb91 115; MCU-NEXT: xorl %eax, %eax 116; MCU-NEXT: retl 117; MCU-NEXT: .LBB1_3: # %bb90 118entry: 119 %tmp73 = tail call i1 @return_false() 120 %g.0 = select i1 %tmp73, i16 0, i16 -480 121 %tmp7778 = sext i16 %g.0 to i32 122 %tmp80 = shl i32 %tmp7778, 3 123 %tmp87 = icmp sgt i32 %tmp80, 32767 124 br i1 %tmp87, label %bb90, label %bb91 125bb90: 126 unreachable 127bb91: 128 ret i32 0 129} 130 131declare i1 @return_false() 132 133;; Select between two floating point constants. 134define float @test3(i32 %x) nounwind readnone { 135; GENERIC-LABEL: test3: 136; GENERIC: ## %bb.0: ## %entry 137; GENERIC-NEXT: xorl %eax, %eax 138; GENERIC-NEXT: testl %edi, %edi 139; GENERIC-NEXT: sete %al 140; GENERIC-NEXT: leaq {{.*}}(%rip), %rcx 141; GENERIC-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 142; GENERIC-NEXT: retq 143; 144; ATOM-LABEL: test3: 145; ATOM: ## %bb.0: ## %entry 146; ATOM-NEXT: xorl %eax, %eax 147; ATOM-NEXT: leaq {{.*}}(%rip), %rcx 148; ATOM-NEXT: testl %edi, %edi 149; ATOM-NEXT: sete %al 150; ATOM-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 151; ATOM-NEXT: retq 152; 153; ATHLON-LABEL: test3: 154; ATHLON: ## %bb.0: ## %entry 155; ATHLON-NEXT: xorl %eax, %eax 156; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp) 157; ATHLON-NEXT: sete %al 158; ATHLON-NEXT: flds LCPI2_0(,%eax,4) 159; ATHLON-NEXT: retl 160; 161; MCU-LABEL: test3: 162; MCU: # %bb.0: # %entry 163; MCU-NEXT: xorl %ecx, %ecx 164; MCU-NEXT: testl %eax, %eax 165; MCU-NEXT: sete %cl 166; MCU-NEXT: flds {{\.LCPI.*}}(,%ecx,4) 167; MCU-NEXT: retl 168entry: 169 %0 = icmp eq i32 %x, 0 170 %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 171 ret float %iftmp.0.0 172} 173 174define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly { 175; CHECK-LABEL: test4: 176; CHECK: ## %bb.0: ## %entry 177; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero 178; CHECK-NEXT: xorl %eax, %eax 179; CHECK-NEXT: ucomisd %xmm0, %xmm1 180; CHECK-NEXT: seta %al 181; CHECK-NEXT: movsbl (%rdi,%rax,4), %eax 182; CHECK-NEXT: retq 183; 184; ATHLON-LABEL: test4: 185; ATHLON: ## %bb.0: ## %entry 186; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 187; ATHLON-NEXT: fldl {{[0-9]+}}(%esp) 188; ATHLON-NEXT: flds LCPI3_0 189; ATHLON-NEXT: xorl %ecx, %ecx 190; ATHLON-NEXT: fucompi %st(1), %st 191; ATHLON-NEXT: fstp %st(0) 192; ATHLON-NEXT: seta %cl 193; ATHLON-NEXT: movsbl (%eax,%ecx,4), %eax 194; ATHLON-NEXT: retl 195; 196; MCU-LABEL: test4: 197; MCU: # %bb.0: # %entry 198; MCU-NEXT: movl %eax, %ecx 199; MCU-NEXT: fldl {{[0-9]+}}(%esp) 200; MCU-NEXT: flds {{\.LCPI.*}} 201; MCU-NEXT: fucompp 202; MCU-NEXT: fnstsw %ax 203; MCU-NEXT: xorl %edx, %edx 204; MCU-NEXT: # kill: def $ah killed $ah killed $ax 205; MCU-NEXT: sahf 206; MCU-NEXT: seta %dl 207; MCU-NEXT: movb (%ecx,%edx,4), %al 208; MCU-NEXT: retl 209entry: 210 %0 = fcmp olt double %F, 4.200000e+01 211 %iftmp.0.0 = select i1 %0, i32 4, i32 0 212 %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0 213 %2 = load i8, i8* %1, align 1 214 ret i8 %2 215} 216 217define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind { 218; GENERIC-LABEL: test5: 219; GENERIC: ## %bb.0: 220; GENERIC-NEXT: testb $1, %dil 221; GENERIC-NEXT: jne LBB4_2 222; GENERIC-NEXT: ## %bb.1: 223; GENERIC-NEXT: movaps %xmm1, %xmm0 224; GENERIC-NEXT: LBB4_2: 225; GENERIC-NEXT: movss %xmm0, (%rsi) 226; GENERIC-NEXT: retq 227; 228; ATOM-LABEL: test5: 229; ATOM: ## %bb.0: 230; ATOM-NEXT: testb $1, %dil 231; ATOM-NEXT: jne LBB4_2 232; ATOM-NEXT: ## %bb.1: 233; ATOM-NEXT: movaps %xmm1, %xmm0 234; ATOM-NEXT: LBB4_2: 235; ATOM-NEXT: movss %xmm0, (%rsi) 236; ATOM-NEXT: nop 237; ATOM-NEXT: nop 238; ATOM-NEXT: retq 239; 240; ATHLON-LABEL: test5: 241; ATHLON: ## %bb.0: 242; ATHLON-NEXT: pushl %esi 243; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 244; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 245; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 246; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 247; ATHLON-NEXT: cmovnel %ecx, %edx 248; ATHLON-NEXT: movzwl (%edx), %ecx 249; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 250; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi 251; ATHLON-NEXT: cmovnel %edx, %esi 252; ATHLON-NEXT: movzwl (%esi), %edx 253; ATHLON-NEXT: movw %dx, 2(%eax) 254; ATHLON-NEXT: movw %cx, (%eax) 255; ATHLON-NEXT: popl %esi 256; ATHLON-NEXT: retl 257; 258; MCU-LABEL: test5: 259; MCU: # %bb.0: 260; MCU-NEXT: pushl %esi 261; MCU-NEXT: movl {{[0-9]+}}(%esp), %esi 262; MCU-NEXT: testb $1, %al 263; MCU-NEXT: jne .LBB4_2 264; MCU-NEXT: # %bb.1: 265; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %ecx 266; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %edx 267; MCU-NEXT: .LBB4_2: 268; MCU-NEXT: movw %cx, 2(%esi) 269; MCU-NEXT: movw %dx, (%esi) 270; MCU-NEXT: popl %esi 271; MCU-NEXT: retl 272 %x = select i1 %c, <2 x i16> %a, <2 x i16> %b 273 store <2 x i16> %x, <2 x i16>* %p 274 ret void 275} 276 277; Verify that the fmul gets sunk into the one part of the diamond where it is needed. 278define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { 279; CHECK-LABEL: test6: 280; CHECK: ## %bb.0: 281; CHECK-NEXT: testl %edi, %edi 282; CHECK-NEXT: je LBB5_1 283; CHECK-NEXT: ## %bb.2: 284; CHECK-NEXT: movaps (%rsi), %xmm0 285; CHECK-NEXT: movaps %xmm0, (%rsi) 286; CHECK-NEXT: retq 287; CHECK-NEXT: LBB5_1: 288; CHECK-NEXT: movaps (%rdx), %xmm0 289; CHECK-NEXT: mulps %xmm0, %xmm0 290; CHECK-NEXT: movaps %xmm0, (%rsi) 291; CHECK-NEXT: retq 292; 293; ATHLON-LABEL: test6: 294; ATHLON: ## %bb.0: 295; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 296; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 297; ATHLON-NEXT: flds 12(%ecx) 298; ATHLON-NEXT: flds 8(%ecx) 299; ATHLON-NEXT: flds 4(%ecx) 300; ATHLON-NEXT: flds (%ecx) 301; ATHLON-NEXT: flds (%eax) 302; ATHLON-NEXT: fmul %st, %st(0) 303; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp) 304; ATHLON-NEXT: fxch %st(1) 305; ATHLON-NEXT: fcmove %st(1), %st 306; ATHLON-NEXT: fstp %st(1) 307; ATHLON-NEXT: flds 4(%eax) 308; ATHLON-NEXT: fmul %st, %st(0) 309; ATHLON-NEXT: fxch %st(2) 310; ATHLON-NEXT: fcmove %st(2), %st 311; ATHLON-NEXT: fstp %st(2) 312; ATHLON-NEXT: flds 8(%eax) 313; ATHLON-NEXT: fmul %st, %st(0) 314; ATHLON-NEXT: fxch %st(3) 315; ATHLON-NEXT: fcmove %st(3), %st 316; ATHLON-NEXT: fstp %st(3) 317; ATHLON-NEXT: flds 12(%eax) 318; ATHLON-NEXT: fmul %st, %st(0) 319; ATHLON-NEXT: fxch %st(4) 320; ATHLON-NEXT: fcmove %st(4), %st 321; ATHLON-NEXT: fstp %st(4) 322; ATHLON-NEXT: fxch %st(3) 323; ATHLON-NEXT: fstps 12(%ecx) 324; ATHLON-NEXT: fxch %st(1) 325; ATHLON-NEXT: fstps 8(%ecx) 326; ATHLON-NEXT: fstps 4(%ecx) 327; ATHLON-NEXT: fstps (%ecx) 328; ATHLON-NEXT: retl 329; 330; MCU-LABEL: test6: 331; MCU: # %bb.0: 332; MCU-NEXT: pushl %eax 333; MCU-NEXT: flds 12(%edx) 334; MCU-NEXT: fstps (%esp) # 4-byte Folded Spill 335; MCU-NEXT: flds 8(%edx) 336; MCU-NEXT: flds 4(%edx) 337; MCU-NEXT: flds (%ecx) 338; MCU-NEXT: flds 4(%ecx) 339; MCU-NEXT: flds 8(%ecx) 340; MCU-NEXT: flds 12(%ecx) 341; MCU-NEXT: fmul %st, %st(0) 342; MCU-NEXT: fxch %st(1) 343; MCU-NEXT: fmul %st, %st(0) 344; MCU-NEXT: fxch %st(2) 345; MCU-NEXT: fmul %st, %st(0) 346; MCU-NEXT: fxch %st(3) 347; MCU-NEXT: fmul %st, %st(0) 348; MCU-NEXT: testl %eax, %eax 349; MCU-NEXT: flds (%edx) 350; MCU-NEXT: je .LBB5_2 351; MCU-NEXT: # %bb.1: 352; MCU-NEXT: fstp %st(1) 353; MCU-NEXT: fstp %st(3) 354; MCU-NEXT: fstp %st(1) 355; MCU-NEXT: fstp %st(0) 356; MCU-NEXT: flds (%esp) # 4-byte Folded Reload 357; MCU-NEXT: fldz 358; MCU-NEXT: fldz 359; MCU-NEXT: fldz 360; MCU-NEXT: fxch %st(1) 361; MCU-NEXT: fxch %st(6) 362; MCU-NEXT: fxch %st(1) 363; MCU-NEXT: fxch %st(5) 364; MCU-NEXT: fxch %st(4) 365; MCU-NEXT: fxch %st(1) 366; MCU-NEXT: fxch %st(3) 367; MCU-NEXT: fxch %st(2) 368; MCU-NEXT: .LBB5_2: 369; MCU-NEXT: fstp %st(0) 370; MCU-NEXT: fstp %st(5) 371; MCU-NEXT: fstp %st(3) 372; MCU-NEXT: fxch %st(2) 373; MCU-NEXT: fstps 12(%edx) 374; MCU-NEXT: fxch %st(1) 375; MCU-NEXT: fstps 8(%edx) 376; MCU-NEXT: fstps 4(%edx) 377; MCU-NEXT: fstps (%edx) 378; MCU-NEXT: popl %eax 379; MCU-NEXT: retl 380 %tmp = load <4 x float>, <4 x float>* %A 381 %tmp3 = load <4 x float>, <4 x float>* %B 382 %tmp9 = fmul <4 x float> %tmp3, %tmp3 383 %tmp.upgrd.1 = icmp eq i32 %C, 0 384 %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp 385 store <4 x float> %iftmp.38.0, <4 x float>* %A 386 ret void 387} 388 389; Select with fp80's 390define x86_fp80 @test7(i32 %tmp8) nounwind { 391; GENERIC-LABEL: test7: 392; GENERIC: ## %bb.0: 393; GENERIC-NEXT: xorl %eax, %eax 394; GENERIC-NEXT: testl %edi, %edi 395; GENERIC-NEXT: setns %al 396; GENERIC-NEXT: shlq $4, %rax 397; GENERIC-NEXT: leaq {{.*}}(%rip), %rcx 398; GENERIC-NEXT: fldt (%rax,%rcx) 399; GENERIC-NEXT: retq 400; 401; ATOM-LABEL: test7: 402; ATOM: ## %bb.0: 403; ATOM-NEXT: xorl %eax, %eax 404; ATOM-NEXT: leaq {{.*}}(%rip), %rcx 405; ATOM-NEXT: testl %edi, %edi 406; ATOM-NEXT: setns %al 407; ATOM-NEXT: shlq $4, %rax 408; ATOM-NEXT: fldt (%rax,%rcx) 409; ATOM-NEXT: retq 410; 411; ATHLON-LABEL: test7: 412; ATHLON: ## %bb.0: 413; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 414; ATHLON-NEXT: notl %eax 415; ATHLON-NEXT: shrl $27, %eax 416; ATHLON-NEXT: andl $-16, %eax 417; ATHLON-NEXT: fldt LCPI6_0(%eax) 418; ATHLON-NEXT: retl 419; 420; MCU-LABEL: test7: 421; MCU: # %bb.0: 422; MCU-NEXT: notl %eax 423; MCU-NEXT: shrl $27, %eax 424; MCU-NEXT: andl $-16, %eax 425; MCU-NEXT: fldt {{\.LCPI.*}}(%eax) 426; MCU-NEXT: retl 427 %tmp9 = icmp sgt i32 %tmp8, -1 428 %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 429 ret x86_fp80 %retval 430} 431 432; widening select v6i32 and then a sub 433define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { 434; GENERIC-LABEL: test8: 435; GENERIC: ## %bb.0: 436; GENERIC-NEXT: testb $1, %dil 437; GENERIC-NEXT: jne LBB7_1 438; GENERIC-NEXT: ## %bb.2: 439; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 440; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 441; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 442; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 443; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 444; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 445; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 446; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 447; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 448; GENERIC-NEXT: jmp LBB7_3 449; GENERIC-NEXT: LBB7_1: 450; GENERIC-NEXT: movd %r9d, %xmm0 451; GENERIC-NEXT: movd %r8d, %xmm1 452; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 453; GENERIC-NEXT: movd %ecx, %xmm2 454; GENERIC-NEXT: movd %edx, %xmm0 455; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 456; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 457; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 458; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 459; GENERIC-NEXT: LBB7_3: 460; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 461; GENERIC-NEXT: pcmpeqd %xmm2, %xmm2 462; GENERIC-NEXT: paddd %xmm2, %xmm0 463; GENERIC-NEXT: paddd %xmm2, %xmm1 464; GENERIC-NEXT: movq %xmm1, 16(%rsi) 465; GENERIC-NEXT: movdqa %xmm0, (%rsi) 466; GENERIC-NEXT: retq 467; 468; ATOM-LABEL: test8: 469; ATOM: ## %bb.0: 470; ATOM-NEXT: testb $1, %dil 471; ATOM-NEXT: jne LBB7_1 472; ATOM-NEXT: ## %bb.2: 473; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 474; ATOM-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 475; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 476; ATOM-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 477; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 478; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 479; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 480; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 481; ATOM-NEXT: jmp LBB7_3 482; ATOM-NEXT: LBB7_1: 483; ATOM-NEXT: movd %r9d, %xmm1 484; ATOM-NEXT: movd %r8d, %xmm2 485; ATOM-NEXT: movd %ecx, %xmm3 486; ATOM-NEXT: movd %edx, %xmm0 487; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 488; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 489; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 490; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 491; ATOM-NEXT: LBB7_3: 492; ATOM-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 493; ATOM-NEXT: pcmpeqd %xmm2, %xmm2 494; ATOM-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 495; ATOM-NEXT: paddd %xmm2, %xmm0 496; ATOM-NEXT: paddd %xmm2, %xmm1 497; ATOM-NEXT: movq %xmm1, 16(%rsi) 498; ATOM-NEXT: movdqa %xmm0, (%rsi) 499; ATOM-NEXT: retq 500; 501; ATHLON-LABEL: test8: 502; ATHLON: ## %bb.0: 503; ATHLON-NEXT: pushl %ebp 504; ATHLON-NEXT: pushl %ebx 505; ATHLON-NEXT: pushl %edi 506; ATHLON-NEXT: pushl %esi 507; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 508; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 509; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 510; ATHLON-NEXT: cmovnel %eax, %ecx 511; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 512; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 513; ATHLON-NEXT: cmovnel %eax, %edx 514; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 515; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi 516; ATHLON-NEXT: cmovnel %eax, %esi 517; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 518; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edi 519; ATHLON-NEXT: cmovnel %eax, %edi 520; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 521; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebx 522; ATHLON-NEXT: cmovnel %eax, %ebx 523; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 524; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebp 525; ATHLON-NEXT: cmovnel %eax, %ebp 526; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 527; ATHLON-NEXT: movl (%ecx), %ecx 528; ATHLON-NEXT: movl (%edx), %edx 529; ATHLON-NEXT: movl (%esi), %esi 530; ATHLON-NEXT: movl (%edi), %edi 531; ATHLON-NEXT: movl (%ebx), %ebx 532; ATHLON-NEXT: movl (%ebp), %ebp 533; ATHLON-NEXT: decl %ecx 534; ATHLON-NEXT: movl %ecx, 20(%eax) 535; ATHLON-NEXT: decl %edx 536; ATHLON-NEXT: movl %edx, 16(%eax) 537; ATHLON-NEXT: decl %esi 538; ATHLON-NEXT: movl %esi, 12(%eax) 539; ATHLON-NEXT: decl %edi 540; ATHLON-NEXT: movl %edi, 8(%eax) 541; ATHLON-NEXT: decl %ebx 542; ATHLON-NEXT: movl %ebx, 4(%eax) 543; ATHLON-NEXT: decl %ebp 544; ATHLON-NEXT: movl %ebp, (%eax) 545; ATHLON-NEXT: popl %esi 546; ATHLON-NEXT: popl %edi 547; ATHLON-NEXT: popl %ebx 548; ATHLON-NEXT: popl %ebp 549; ATHLON-NEXT: retl 550; 551; MCU-LABEL: test8: 552; MCU: # %bb.0: 553; MCU-NEXT: pushl %ebp 554; MCU-NEXT: pushl %ebx 555; MCU-NEXT: pushl %edi 556; MCU-NEXT: pushl %esi 557; MCU-NEXT: testb $1, %al 558; MCU-NEXT: jne .LBB7_1 559; MCU-NEXT: # %bb.2: 560; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax 561; MCU-NEXT: movl (%eax), %eax 562; MCU-NEXT: je .LBB7_5 563; MCU-NEXT: .LBB7_4: 564; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx 565; MCU-NEXT: movl (%ecx), %ecx 566; MCU-NEXT: je .LBB7_8 567; MCU-NEXT: .LBB7_7: 568; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi 569; MCU-NEXT: movl (%esi), %esi 570; MCU-NEXT: je .LBB7_11 571; MCU-NEXT: .LBB7_10: 572; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi 573; MCU-NEXT: movl (%edi), %edi 574; MCU-NEXT: je .LBB7_14 575; MCU-NEXT: .LBB7_13: 576; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebx 577; MCU-NEXT: movl (%ebx), %ebx 578; MCU-NEXT: je .LBB7_17 579; MCU-NEXT: .LBB7_16: 580; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp 581; MCU-NEXT: jmp .LBB7_18 582; MCU-NEXT: .LBB7_1: 583; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax 584; MCU-NEXT: movl (%eax), %eax 585; MCU-NEXT: jne .LBB7_4 586; MCU-NEXT: .LBB7_5: 587; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx 588; MCU-NEXT: movl (%ecx), %ecx 589; MCU-NEXT: jne .LBB7_7 590; MCU-NEXT: .LBB7_8: 591; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi 592; MCU-NEXT: movl (%esi), %esi 593; MCU-NEXT: jne .LBB7_10 594; MCU-NEXT: .LBB7_11: 595; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi 596; MCU-NEXT: movl (%edi), %edi 597; MCU-NEXT: jne .LBB7_13 598; MCU-NEXT: .LBB7_14: 599; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebx 600; MCU-NEXT: movl (%ebx), %ebx 601; MCU-NEXT: jne .LBB7_16 602; MCU-NEXT: .LBB7_17: 603; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp 604; MCU-NEXT: .LBB7_18: 605; MCU-NEXT: movl (%ebp), %ebp 606; MCU-NEXT: decl %ebp 607; MCU-NEXT: decl %ebx 608; MCU-NEXT: decl %edi 609; MCU-NEXT: decl %esi 610; MCU-NEXT: decl %ecx 611; MCU-NEXT: decl %eax 612; MCU-NEXT: movl %eax, 20(%edx) 613; MCU-NEXT: movl %ecx, 16(%edx) 614; MCU-NEXT: movl %esi, 12(%edx) 615; MCU-NEXT: movl %edi, 8(%edx) 616; MCU-NEXT: movl %ebx, 4(%edx) 617; MCU-NEXT: movl %ebp, (%edx) 618; MCU-NEXT: popl %esi 619; MCU-NEXT: popl %edi 620; MCU-NEXT: popl %ebx 621; MCU-NEXT: popl %ebp 622; MCU-NEXT: retl 623 %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 624 %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > 625 store <6 x i32> %val, <6 x i32>* %dst.addr 626 ret void 627} 628 629 630;; Test integer select between values and constants. 631 632define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone { 633; CHECK-LABEL: test9: 634; CHECK: ## %bb.0: 635; CHECK-NEXT: xorl %eax, %eax 636; CHECK-NEXT: cmpq $1, %rdi 637; CHECK-NEXT: sbbq %rax, %rax 638; CHECK-NEXT: orq %rsi, %rax 639; CHECK-NEXT: retq 640; 641; ATHLON-LABEL: test9: 642; ATHLON: ## %bb.0: 643; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 644; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 645; ATHLON-NEXT: movl $-1, %eax 646; ATHLON-NEXT: movl $-1, %edx 647; ATHLON-NEXT: je LBB8_2 648; ATHLON-NEXT: ## %bb.1: 649; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 650; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 651; ATHLON-NEXT: LBB8_2: 652; ATHLON-NEXT: retl 653; 654; MCU-LABEL: test9: 655; MCU: # %bb.0: 656; MCU-NEXT: orl %edx, %eax 657; MCU-NEXT: jne .LBB8_1 658; MCU-NEXT: # %bb.2: 659; MCU-NEXT: movl $-1, %eax 660; MCU-NEXT: movl $-1, %edx 661; MCU-NEXT: retl 662; MCU-NEXT: .LBB8_1: 663; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 664; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 665; MCU-NEXT: retl 666 %cmp = icmp ne i64 %x, 0 667 %cond = select i1 %cmp, i64 %y, i64 -1 668 ret i64 %cond 669} 670 671;; Same as test9 672define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone { 673; CHECK-LABEL: test9a: 674; CHECK: ## %bb.0: 675; CHECK-NEXT: xorl %eax, %eax 676; CHECK-NEXT: cmpq $1, %rdi 677; CHECK-NEXT: sbbq %rax, %rax 678; CHECK-NEXT: orq %rsi, %rax 679; CHECK-NEXT: retq 680; 681; ATHLON-LABEL: test9a: 682; ATHLON: ## %bb.0: 683; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 684; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 685; ATHLON-NEXT: movl $-1, %eax 686; ATHLON-NEXT: movl $-1, %edx 687; ATHLON-NEXT: je LBB9_2 688; ATHLON-NEXT: ## %bb.1: 689; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 690; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 691; ATHLON-NEXT: LBB9_2: 692; ATHLON-NEXT: retl 693; 694; MCU-LABEL: test9a: 695; MCU: # %bb.0: 696; MCU-NEXT: orl %edx, %eax 697; MCU-NEXT: movl $-1, %eax 698; MCU-NEXT: movl $-1, %edx 699; MCU-NEXT: je .LBB9_2 700; MCU-NEXT: # %bb.1: 701; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 702; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 703; MCU-NEXT: .LBB9_2: 704; MCU-NEXT: retl 705 %cmp = icmp eq i64 %x, 0 706 %cond = select i1 %cmp, i64 -1, i64 %y 707 ret i64 %cond 708} 709 710define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone { 711; GENERIC-LABEL: test9b: 712; GENERIC: ## %bb.0: 713; GENERIC-NEXT: cmpq $1, %rdi 714; GENERIC-NEXT: sbbq %rax, %rax 715; GENERIC-NEXT: orq %rsi, %rax 716; GENERIC-NEXT: retq 717; 718; ATOM-LABEL: test9b: 719; ATOM: ## %bb.0: 720; ATOM-NEXT: cmpq $1, %rdi 721; ATOM-NEXT: sbbq %rax, %rax 722; ATOM-NEXT: orq %rsi, %rax 723; ATOM-NEXT: nop 724; ATOM-NEXT: nop 725; ATOM-NEXT: retq 726; 727; ATHLON-LABEL: test9b: 728; ATHLON: ## %bb.0: 729; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 730; ATHLON-NEXT: xorl %edx, %edx 731; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 732; ATHLON-NEXT: sete %dl 733; ATHLON-NEXT: negl %edx 734; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 735; ATHLON-NEXT: orl %edx, %eax 736; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %edx 737; ATHLON-NEXT: retl 738; 739; MCU-LABEL: test9b: 740; MCU: # %bb.0: 741; MCU-NEXT: movl %edx, %ecx 742; MCU-NEXT: xorl %edx, %edx 743; MCU-NEXT: orl %ecx, %eax 744; MCU-NEXT: sete %dl 745; MCU-NEXT: negl %edx 746; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 747; MCU-NEXT: orl %edx, %eax 748; MCU-NEXT: orl {{[0-9]+}}(%esp), %edx 749; MCU-NEXT: retl 750 %cmp = icmp eq i64 %x, 0 751 %A = sext i1 %cmp to i64 752 %cond = or i64 %y, %A 753 ret i64 %cond 754} 755 756;; Select between -1 and 1. 757define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone { 758; CHECK-LABEL: test10: 759; CHECK: ## %bb.0: 760; CHECK-NEXT: xorl %eax, %eax 761; CHECK-NEXT: testq %rdi, %rdi 762; CHECK-NEXT: setne %al 763; CHECK-NEXT: leaq -1(%rax,%rax), %rax 764; CHECK-NEXT: retq 765; 766; ATHLON-LABEL: test10: 767; ATHLON: ## %bb.0: 768; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 769; ATHLON-NEXT: xorl %edx, %edx 770; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 771; ATHLON-NEXT: movl $-1, %ecx 772; ATHLON-NEXT: movl $1, %eax 773; ATHLON-NEXT: cmovel %ecx, %eax 774; ATHLON-NEXT: cmovel %ecx, %edx 775; ATHLON-NEXT: retl 776; 777; MCU-LABEL: test10: 778; MCU: # %bb.0: 779; MCU-NEXT: orl %edx, %eax 780; MCU-NEXT: movl $-1, %eax 781; MCU-NEXT: movl $-1, %edx 782; MCU-NEXT: je .LBB11_2 783; MCU-NEXT: # %bb.1: 784; MCU-NEXT: xorl %edx, %edx 785; MCU-NEXT: movl $1, %eax 786; MCU-NEXT: .LBB11_2: 787; MCU-NEXT: retl 788 %cmp = icmp eq i64 %x, 0 789 %cond = select i1 %cmp, i64 -1, i64 1 790 ret i64 %cond 791} 792 793define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone { 794; CHECK-LABEL: test11: 795; CHECK: ## %bb.0: 796; CHECK-NEXT: xorl %eax, %eax 797; CHECK-NEXT: cmpq $1, %rdi 798; CHECK-NEXT: sbbq %rax, %rax 799; CHECK-NEXT: notq %rax 800; CHECK-NEXT: orq %rsi, %rax 801; CHECK-NEXT: retq 802; 803; ATHLON-LABEL: test11: 804; ATHLON: ## %bb.0: 805; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 806; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 807; ATHLON-NEXT: movl $-1, %eax 808; ATHLON-NEXT: movl $-1, %edx 809; ATHLON-NEXT: jne LBB12_2 810; ATHLON-NEXT: ## %bb.1: 811; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 812; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 813; ATHLON-NEXT: LBB12_2: 814; ATHLON-NEXT: retl 815; 816; MCU-LABEL: test11: 817; MCU: # %bb.0: 818; MCU-NEXT: orl %edx, %eax 819; MCU-NEXT: je .LBB12_1 820; MCU-NEXT: # %bb.2: 821; MCU-NEXT: movl $-1, %eax 822; MCU-NEXT: movl $-1, %edx 823; MCU-NEXT: retl 824; MCU-NEXT: .LBB12_1: 825; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 826; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 827; MCU-NEXT: retl 828 %cmp = icmp eq i64 %x, 0 829 %cond = select i1 %cmp, i64 %y, i64 -1 830 ret i64 %cond 831} 832 833define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { 834; CHECK-LABEL: test11a: 835; CHECK: ## %bb.0: 836; CHECK-NEXT: xorl %eax, %eax 837; CHECK-NEXT: cmpq $1, %rdi 838; CHECK-NEXT: sbbq %rax, %rax 839; CHECK-NEXT: notq %rax 840; CHECK-NEXT: orq %rsi, %rax 841; CHECK-NEXT: retq 842; 843; ATHLON-LABEL: test11a: 844; ATHLON: ## %bb.0: 845; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 846; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 847; ATHLON-NEXT: movl $-1, %eax 848; ATHLON-NEXT: movl $-1, %edx 849; ATHLON-NEXT: jne LBB13_2 850; ATHLON-NEXT: ## %bb.1: 851; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 852; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 853; ATHLON-NEXT: LBB13_2: 854; ATHLON-NEXT: retl 855; 856; MCU-LABEL: test11a: 857; MCU: # %bb.0: 858; MCU-NEXT: orl %edx, %eax 859; MCU-NEXT: movl $-1, %eax 860; MCU-NEXT: movl $-1, %edx 861; MCU-NEXT: jne .LBB13_2 862; MCU-NEXT: # %bb.1: 863; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 864; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 865; MCU-NEXT: .LBB13_2: 866; MCU-NEXT: retl 867 %cmp = icmp ne i64 %x, 0 868 %cond = select i1 %cmp, i64 -1, i64 %y 869 ret i64 %cond 870} 871 872define i32 @test13(i32 %a, i32 %b) nounwind { 873; GENERIC-LABEL: test13: 874; GENERIC: ## %bb.0: 875; GENERIC-NEXT: cmpl %esi, %edi 876; GENERIC-NEXT: sbbl %eax, %eax 877; GENERIC-NEXT: retq 878; 879; ATOM-LABEL: test13: 880; ATOM: ## %bb.0: 881; ATOM-NEXT: cmpl %esi, %edi 882; ATOM-NEXT: sbbl %eax, %eax 883; ATOM-NEXT: nop 884; ATOM-NEXT: nop 885; ATOM-NEXT: nop 886; ATOM-NEXT: nop 887; ATOM-NEXT: retq 888; 889; ATHLON-LABEL: test13: 890; ATHLON: ## %bb.0: 891; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 892; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax 893; ATHLON-NEXT: sbbl %eax, %eax 894; ATHLON-NEXT: retl 895; 896; MCU-LABEL: test13: 897; MCU: # %bb.0: 898; MCU-NEXT: cmpl %edx, %eax 899; MCU-NEXT: sbbl %eax, %eax 900; MCU-NEXT: retl 901 %c = icmp ult i32 %a, %b 902 %d = sext i1 %c to i32 903 ret i32 %d 904} 905 906define i32 @test14(i32 %a, i32 %b) nounwind { 907; CHECK-LABEL: test14: 908; CHECK: ## %bb.0: 909; CHECK-NEXT: xorl %eax, %eax 910; CHECK-NEXT: cmpl %esi, %edi 911; CHECK-NEXT: setae %al 912; CHECK-NEXT: negl %eax 913; CHECK-NEXT: retq 914; 915; ATHLON-LABEL: test14: 916; ATHLON: ## %bb.0: 917; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 918; ATHLON-NEXT: xorl %eax, %eax 919; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %ecx 920; ATHLON-NEXT: setae %al 921; ATHLON-NEXT: negl %eax 922; ATHLON-NEXT: retl 923; 924; MCU-LABEL: test14: 925; MCU: # %bb.0: 926; MCU-NEXT: xorl %ecx, %ecx 927; MCU-NEXT: cmpl %edx, %eax 928; MCU-NEXT: setae %cl 929; MCU-NEXT: negl %ecx 930; MCU-NEXT: movl %ecx, %eax 931; MCU-NEXT: retl 932 %c = icmp uge i32 %a, %b 933 %d = sext i1 %c to i32 934 ret i32 %d 935} 936 937; rdar://10961709 938define i32 @test15(i32 %x) nounwind { 939; GENERIC-LABEL: test15: 940; GENERIC: ## %bb.0: ## %entry 941; GENERIC-NEXT: negl %edi 942; GENERIC-NEXT: sbbl %eax, %eax 943; GENERIC-NEXT: retq 944; 945; ATOM-LABEL: test15: 946; ATOM: ## %bb.0: ## %entry 947; ATOM-NEXT: negl %edi 948; ATOM-NEXT: sbbl %eax, %eax 949; ATOM-NEXT: nop 950; ATOM-NEXT: nop 951; ATOM-NEXT: nop 952; ATOM-NEXT: nop 953; ATOM-NEXT: retq 954; 955; ATHLON-LABEL: test15: 956; ATHLON: ## %bb.0: ## %entry 957; ATHLON-NEXT: xorl %eax, %eax 958; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax 959; ATHLON-NEXT: sbbl %eax, %eax 960; ATHLON-NEXT: retl 961; 962; MCU-LABEL: test15: 963; MCU: # %bb.0: # %entry 964; MCU-NEXT: negl %eax 965; MCU-NEXT: sbbl %eax, %eax 966; MCU-NEXT: retl 967entry: 968 %cmp = icmp ne i32 %x, 0 969 %sub = sext i1 %cmp to i32 970 ret i32 %sub 971} 972 973define i64 @test16(i64 %x) nounwind uwtable readnone ssp { 974; GENERIC-LABEL: test16: 975; GENERIC: ## %bb.0: ## %entry 976; GENERIC-NEXT: negq %rdi 977; GENERIC-NEXT: sbbq %rax, %rax 978; GENERIC-NEXT: retq 979; 980; ATOM-LABEL: test16: 981; ATOM: ## %bb.0: ## %entry 982; ATOM-NEXT: negq %rdi 983; ATOM-NEXT: sbbq %rax, %rax 984; ATOM-NEXT: nop 985; ATOM-NEXT: nop 986; ATOM-NEXT: nop 987; ATOM-NEXT: nop 988; ATOM-NEXT: retq 989; 990; ATHLON-LABEL: test16: 991; ATHLON: ## %bb.0: ## %entry 992; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 993; ATHLON-NEXT: xorl %eax, %eax 994; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %ecx 995; ATHLON-NEXT: setne %al 996; ATHLON-NEXT: negl %eax 997; ATHLON-NEXT: movl %eax, %edx 998; ATHLON-NEXT: retl 999; 1000; MCU-LABEL: test16: 1001; MCU: # %bb.0: # %entry 1002; MCU-NEXT: movl %eax, %ecx 1003; MCU-NEXT: xorl %eax, %eax 1004; MCU-NEXT: orl %edx, %ecx 1005; MCU-NEXT: setne %al 1006; MCU-NEXT: negl %eax 1007; MCU-NEXT: movl %eax, %edx 1008; MCU-NEXT: retl 1009entry: 1010 %cmp = icmp ne i64 %x, 0 1011 %conv1 = sext i1 %cmp to i64 1012 ret i64 %conv1 1013} 1014 1015define i16 @test17(i16 %x) nounwind { 1016; GENERIC-LABEL: test17: 1017; GENERIC: ## %bb.0: ## %entry 1018; GENERIC-NEXT: negw %di 1019; GENERIC-NEXT: sbbl %eax, %eax 1020; GENERIC-NEXT: ## kill: def $ax killed $ax killed $eax 1021; GENERIC-NEXT: retq 1022; 1023; ATOM-LABEL: test17: 1024; ATOM: ## %bb.0: ## %entry 1025; ATOM-NEXT: negw %di 1026; ATOM-NEXT: sbbl %eax, %eax 1027; ATOM-NEXT: ## kill: def $ax killed $ax killed $eax 1028; ATOM-NEXT: nop 1029; ATOM-NEXT: nop 1030; ATOM-NEXT: nop 1031; ATOM-NEXT: nop 1032; ATOM-NEXT: retq 1033; 1034; ATHLON-LABEL: test17: 1035; ATHLON: ## %bb.0: ## %entry 1036; ATHLON-NEXT: xorl %eax, %eax 1037; ATHLON-NEXT: cmpw {{[0-9]+}}(%esp), %ax 1038; ATHLON-NEXT: sbbl %eax, %eax 1039; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1040; ATHLON-NEXT: retl 1041; 1042; MCU-LABEL: test17: 1043; MCU: # %bb.0: # %entry 1044; MCU-NEXT: negw %ax 1045; MCU-NEXT: sbbl %eax, %eax 1046; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1047; MCU-NEXT: retl 1048entry: 1049 %cmp = icmp ne i16 %x, 0 1050 %sub = sext i1 %cmp to i16 1051 ret i16 %sub 1052} 1053 1054define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind { 1055; GENERIC-LABEL: test18: 1056; GENERIC: ## %bb.0: 1057; GENERIC-NEXT: movl %esi, %eax 1058; GENERIC-NEXT: cmpl $15, %edi 1059; GENERIC-NEXT: cmovgel %edx, %eax 1060; GENERIC-NEXT: ## kill: def $al killed $al killed $eax 1061; GENERIC-NEXT: retq 1062; 1063; ATOM-LABEL: test18: 1064; ATOM: ## %bb.0: 1065; ATOM-NEXT: movl %esi, %eax 1066; ATOM-NEXT: cmpl $15, %edi 1067; ATOM-NEXT: cmovgel %edx, %eax 1068; ATOM-NEXT: ## kill: def $al killed $al killed $eax 1069; ATOM-NEXT: nop 1070; ATOM-NEXT: nop 1071; ATOM-NEXT: retq 1072; 1073; ATHLON-LABEL: test18: 1074; ATHLON: ## %bb.0: 1075; ATHLON-NEXT: cmpl $15, {{[0-9]+}}(%esp) 1076; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 1077; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 1078; ATHLON-NEXT: cmovll %eax, %ecx 1079; ATHLON-NEXT: movb (%ecx), %al 1080; ATHLON-NEXT: retl 1081; 1082; MCU-LABEL: test18: 1083; MCU: # %bb.0: 1084; MCU-NEXT: cmpl $15, %eax 1085; MCU-NEXT: jl .LBB19_2 1086; MCU-NEXT: # %bb.1: 1087; MCU-NEXT: movl %ecx, %edx 1088; MCU-NEXT: .LBB19_2: 1089; MCU-NEXT: movl %edx, %eax 1090; MCU-NEXT: retl 1091 %cmp = icmp slt i32 %x, 15 1092 %sel = select i1 %cmp, i8 %a, i8 %b 1093 ret i8 %sel 1094} 1095 1096define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) { 1097; GENERIC-LABEL: trunc_select_miscompile: 1098; GENERIC: ## %bb.0: 1099; GENERIC-NEXT: ## kill: def $esi killed $esi def $rsi 1100; GENERIC-NEXT: movl %edi, %eax 1101; GENERIC-NEXT: leal 2(%rsi), %ecx 1102; GENERIC-NEXT: ## kill: def $cl killed $cl killed $ecx 1103; GENERIC-NEXT: shll %cl, %eax 1104; GENERIC-NEXT: retq 1105; 1106; ATOM-LABEL: trunc_select_miscompile: 1107; ATOM: ## %bb.0: 1108; ATOM-NEXT: ## kill: def $esi killed $esi def $rsi 1109; ATOM-NEXT: leal 2(%rsi), %ecx 1110; ATOM-NEXT: movl %edi, %eax 1111; ATOM-NEXT: ## kill: def $cl killed $cl killed $ecx 1112; ATOM-NEXT: shll %cl, %eax 1113; ATOM-NEXT: nop 1114; ATOM-NEXT: nop 1115; ATOM-NEXT: retq 1116; 1117; ATHLON-LABEL: trunc_select_miscompile: 1118; ATHLON: ## %bb.0: 1119; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1120; ATHLON-NEXT: movb {{[0-9]+}}(%esp), %cl 1121; ATHLON-NEXT: orb $2, %cl 1122; ATHLON-NEXT: shll %cl, %eax 1123; ATHLON-NEXT: retl 1124; 1125; MCU-LABEL: trunc_select_miscompile: 1126; MCU: # %bb.0: 1127; MCU-NEXT: movl %edx, %ecx 1128; MCU-NEXT: orb $2, %cl 1129; MCU-NEXT: # kill: def $cl killed $cl killed $ecx 1130; MCU-NEXT: shll %cl, %eax 1131; MCU-NEXT: retl 1132 %tmp1 = select i1 %cc, i32 3, i32 2 1133 %tmp2 = shl i32 %a, %tmp1 1134 ret i32 %tmp2 1135} 1136 1137; reproducer for pr29002 1138define void @clamp_i8(i32 %src, i8* %dst) { 1139; GENERIC-LABEL: clamp_i8: 1140; GENERIC: ## %bb.0: 1141; GENERIC-NEXT: cmpl $127, %edi 1142; GENERIC-NEXT: movl $127, %eax 1143; GENERIC-NEXT: cmovlel %edi, %eax 1144; GENERIC-NEXT: cmpl $-128, %eax 1145; GENERIC-NEXT: movl $128, %ecx 1146; GENERIC-NEXT: cmovgel %eax, %ecx 1147; GENERIC-NEXT: movb %cl, (%rsi) 1148; GENERIC-NEXT: retq 1149; 1150; ATOM-LABEL: clamp_i8: 1151; ATOM: ## %bb.0: 1152; ATOM-NEXT: cmpl $127, %edi 1153; ATOM-NEXT: movl $127, %eax 1154; ATOM-NEXT: movl $128, %ecx 1155; ATOM-NEXT: cmovlel %edi, %eax 1156; ATOM-NEXT: cmpl $-128, %eax 1157; ATOM-NEXT: cmovgel %eax, %ecx 1158; ATOM-NEXT: movb %cl, (%rsi) 1159; ATOM-NEXT: retq 1160; 1161; ATHLON-LABEL: clamp_i8: 1162; ATHLON: ## %bb.0: 1163; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1164; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1165; ATHLON-NEXT: cmpl $127, %ecx 1166; ATHLON-NEXT: movl $127, %edx 1167; ATHLON-NEXT: cmovlel %ecx, %edx 1168; ATHLON-NEXT: cmpl $-128, %edx 1169; ATHLON-NEXT: movl $128, %ecx 1170; ATHLON-NEXT: cmovgel %edx, %ecx 1171; ATHLON-NEXT: movb %cl, (%eax) 1172; ATHLON-NEXT: retl 1173; 1174; MCU-LABEL: clamp_i8: 1175; MCU: # %bb.0: 1176; MCU-NEXT: cmpl $127, %eax 1177; MCU-NEXT: movl $127, %ecx 1178; MCU-NEXT: jg .LBB21_2 1179; MCU-NEXT: # %bb.1: 1180; MCU-NEXT: movl %eax, %ecx 1181; MCU-NEXT: .LBB21_2: 1182; MCU-NEXT: cmpl $-128, %ecx 1183; MCU-NEXT: movb $-128, %al 1184; MCU-NEXT: jl .LBB21_4 1185; MCU-NEXT: # %bb.3: 1186; MCU-NEXT: movl %ecx, %eax 1187; MCU-NEXT: .LBB21_4: 1188; MCU-NEXT: movb %al, (%edx) 1189; MCU-NEXT: retl 1190 %cmp = icmp sgt i32 %src, 127 1191 %sel1 = select i1 %cmp, i32 127, i32 %src 1192 %cmp1 = icmp slt i32 %sel1, -128 1193 %sel2 = select i1 %cmp1, i32 -128, i32 %sel1 1194 %conv = trunc i32 %sel2 to i8 1195 store i8 %conv, i8* %dst, align 2 1196 ret void 1197} 1198 1199; reproducer for pr29002 1200define void @clamp(i32 %src, i16* %dst) { 1201; GENERIC-LABEL: clamp: 1202; GENERIC: ## %bb.0: 1203; GENERIC-NEXT: cmpl $32767, %edi ## imm = 0x7FFF 1204; GENERIC-NEXT: movl $32767, %eax ## imm = 0x7FFF 1205; GENERIC-NEXT: cmovlel %edi, %eax 1206; GENERIC-NEXT: cmpl $-32768, %eax ## imm = 0x8000 1207; GENERIC-NEXT: movl $32768, %ecx ## imm = 0x8000 1208; GENERIC-NEXT: cmovgel %eax, %ecx 1209; GENERIC-NEXT: movw %cx, (%rsi) 1210; GENERIC-NEXT: retq 1211; 1212; ATOM-LABEL: clamp: 1213; ATOM: ## %bb.0: 1214; ATOM-NEXT: cmpl $32767, %edi ## imm = 0x7FFF 1215; ATOM-NEXT: movl $32767, %eax ## imm = 0x7FFF 1216; ATOM-NEXT: movl $32768, %ecx ## imm = 0x8000 1217; ATOM-NEXT: cmovlel %edi, %eax 1218; ATOM-NEXT: cmpl $-32768, %eax ## imm = 0x8000 1219; ATOM-NEXT: cmovgel %eax, %ecx 1220; ATOM-NEXT: movw %cx, (%rsi) 1221; ATOM-NEXT: retq 1222; 1223; ATHLON-LABEL: clamp: 1224; ATHLON: ## %bb.0: 1225; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1226; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1227; ATHLON-NEXT: cmpl $32767, %ecx ## imm = 0x7FFF 1228; ATHLON-NEXT: movl $32767, %edx ## imm = 0x7FFF 1229; ATHLON-NEXT: cmovlel %ecx, %edx 1230; ATHLON-NEXT: cmpl $-32768, %edx ## imm = 0x8000 1231; ATHLON-NEXT: movl $32768, %ecx ## imm = 0x8000 1232; ATHLON-NEXT: cmovgel %edx, %ecx 1233; ATHLON-NEXT: movw %cx, (%eax) 1234; ATHLON-NEXT: retl 1235; 1236; MCU-LABEL: clamp: 1237; MCU: # %bb.0: 1238; MCU-NEXT: cmpl $32767, %eax # imm = 0x7FFF 1239; MCU-NEXT: movl $32767, %ecx # imm = 0x7FFF 1240; MCU-NEXT: jg .LBB22_2 1241; MCU-NEXT: # %bb.1: 1242; MCU-NEXT: movl %eax, %ecx 1243; MCU-NEXT: .LBB22_2: 1244; MCU-NEXT: cmpl $-32768, %ecx # imm = 0x8000 1245; MCU-NEXT: movl $32768, %eax # imm = 0x8000 1246; MCU-NEXT: jl .LBB22_4 1247; MCU-NEXT: # %bb.3: 1248; MCU-NEXT: movl %ecx, %eax 1249; MCU-NEXT: .LBB22_4: 1250; MCU-NEXT: movw %ax, (%edx) 1251; MCU-NEXT: retl 1252 %cmp = icmp sgt i32 %src, 32767 1253 %sel1 = select i1 %cmp, i32 32767, i32 %src 1254 %cmp1 = icmp slt i32 %sel1, -32768 1255 %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1 1256 %conv = trunc i32 %sel2 to i16 1257 store i16 %conv, i16* %dst, align 2 1258 ret void 1259} 1260 1261define i16 @select_xor_1(i16 %A, i8 %cond) { 1262; CHECK-LABEL: select_xor_1: 1263; CHECK: ## %bb.0: ## %entry 1264; CHECK-NEXT: movl %edi, %eax 1265; CHECK-NEXT: xorl $43, %eax 1266; CHECK-NEXT: testb $1, %sil 1267; CHECK-NEXT: cmovel %edi, %eax 1268; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax 1269; CHECK-NEXT: retq 1270; 1271; ATHLON-LABEL: select_xor_1: 1272; ATHLON: ## %bb.0: ## %entry 1273; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1274; ATHLON-NEXT: movl %ecx, %eax 1275; ATHLON-NEXT: xorl $43, %eax 1276; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1277; ATHLON-NEXT: cmovel %ecx, %eax 1278; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1279; ATHLON-NEXT: retl 1280; 1281; MCU-LABEL: select_xor_1: 1282; MCU: # %bb.0: # %entry 1283; MCU-NEXT: andl $1, %edx 1284; MCU-NEXT: negl %edx 1285; MCU-NEXT: andl $43, %edx 1286; MCU-NEXT: xorl %edx, %eax 1287; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1288; MCU-NEXT: retl 1289entry: 1290 %and = and i8 %cond, 1 1291 %cmp10 = icmp eq i8 %and, 0 1292 %0 = xor i16 %A, 43 1293 %1 = select i1 %cmp10, i16 %A, i16 %0 1294 ret i16 %1 1295} 1296 1297; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1298; icmp eq (and %cond, 1), 0 1299define i16 @select_xor_1b(i16 %A, i8 %cond) { 1300; CHECK-LABEL: select_xor_1b: 1301; CHECK: ## %bb.0: ## %entry 1302; CHECK-NEXT: movl %edi, %eax 1303; CHECK-NEXT: xorl $43, %eax 1304; CHECK-NEXT: testb $1, %sil 1305; CHECK-NEXT: cmovel %edi, %eax 1306; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax 1307; CHECK-NEXT: retq 1308; 1309; ATHLON-LABEL: select_xor_1b: 1310; ATHLON: ## %bb.0: ## %entry 1311; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1312; ATHLON-NEXT: movl %ecx, %eax 1313; ATHLON-NEXT: xorl $43, %eax 1314; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1315; ATHLON-NEXT: cmovel %ecx, %eax 1316; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1317; ATHLON-NEXT: retl 1318; 1319; MCU-LABEL: select_xor_1b: 1320; MCU: # %bb.0: # %entry 1321; MCU-NEXT: testb $1, %dl 1322; MCU-NEXT: je .LBB24_2 1323; MCU-NEXT: # %bb.1: 1324; MCU-NEXT: xorl $43, %eax 1325; MCU-NEXT: .LBB24_2: # %entry 1326; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1327; MCU-NEXT: retl 1328entry: 1329 %and = and i8 %cond, 1 1330 %cmp10 = icmp ne i8 %and, 1 1331 %0 = xor i16 %A, 43 1332 %1 = select i1 %cmp10, i16 %A, i16 %0 1333 ret i16 %1 1334} 1335 1336define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) { 1337; CHECK-LABEL: select_xor_2: 1338; CHECK: ## %bb.0: ## %entry 1339; CHECK-NEXT: movl %esi, %eax 1340; CHECK-NEXT: xorl %edi, %eax 1341; CHECK-NEXT: testb $1, %dl 1342; CHECK-NEXT: cmovel %edi, %eax 1343; CHECK-NEXT: retq 1344; 1345; ATHLON-LABEL: select_xor_2: 1346; ATHLON: ## %bb.0: ## %entry 1347; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1348; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1349; ATHLON-NEXT: xorl %ecx, %eax 1350; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1351; ATHLON-NEXT: cmovel %ecx, %eax 1352; ATHLON-NEXT: retl 1353; 1354; MCU-LABEL: select_xor_2: 1355; MCU: # %bb.0: # %entry 1356; MCU-NEXT: andl $1, %ecx 1357; MCU-NEXT: negl %ecx 1358; MCU-NEXT: andl %edx, %ecx 1359; MCU-NEXT: xorl %ecx, %eax 1360; MCU-NEXT: retl 1361entry: 1362 %and = and i8 %cond, 1 1363 %cmp10 = icmp eq i8 %and, 0 1364 %0 = xor i32 %B, %A 1365 %1 = select i1 %cmp10, i32 %A, i32 %0 1366 ret i32 %1 1367} 1368 1369; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1370; icmp eq (and %cond, 1), 0 1371define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) { 1372; CHECK-LABEL: select_xor_2b: 1373; CHECK: ## %bb.0: ## %entry 1374; CHECK-NEXT: movl %esi, %eax 1375; CHECK-NEXT: xorl %edi, %eax 1376; CHECK-NEXT: testb $1, %dl 1377; CHECK-NEXT: cmovel %edi, %eax 1378; CHECK-NEXT: retq 1379; 1380; ATHLON-LABEL: select_xor_2b: 1381; ATHLON: ## %bb.0: ## %entry 1382; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1383; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1384; ATHLON-NEXT: xorl %ecx, %eax 1385; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1386; ATHLON-NEXT: cmovel %ecx, %eax 1387; ATHLON-NEXT: retl 1388; 1389; MCU-LABEL: select_xor_2b: 1390; MCU: # %bb.0: # %entry 1391; MCU-NEXT: testb $1, %cl 1392; MCU-NEXT: je .LBB26_2 1393; MCU-NEXT: # %bb.1: 1394; MCU-NEXT: xorl %edx, %eax 1395; MCU-NEXT: .LBB26_2: # %entry 1396; MCU-NEXT: retl 1397entry: 1398 %and = and i8 %cond, 1 1399 %cmp10 = icmp ne i8 %and, 1 1400 %0 = xor i32 %B, %A 1401 %1 = select i1 %cmp10, i32 %A, i32 %0 1402 ret i32 %1 1403} 1404 1405define i32 @select_or(i32 %A, i32 %B, i8 %cond) { 1406; CHECK-LABEL: select_or: 1407; CHECK: ## %bb.0: ## %entry 1408; CHECK-NEXT: movl %esi, %eax 1409; CHECK-NEXT: orl %edi, %eax 1410; CHECK-NEXT: testb $1, %dl 1411; CHECK-NEXT: cmovel %edi, %eax 1412; CHECK-NEXT: retq 1413; 1414; ATHLON-LABEL: select_or: 1415; ATHLON: ## %bb.0: ## %entry 1416; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1417; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1418; ATHLON-NEXT: orl %ecx, %eax 1419; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1420; ATHLON-NEXT: cmovel %ecx, %eax 1421; ATHLON-NEXT: retl 1422; 1423; MCU-LABEL: select_or: 1424; MCU: # %bb.0: # %entry 1425; MCU-NEXT: andl $1, %ecx 1426; MCU-NEXT: negl %ecx 1427; MCU-NEXT: andl %edx, %ecx 1428; MCU-NEXT: orl %ecx, %eax 1429; MCU-NEXT: retl 1430entry: 1431 %and = and i8 %cond, 1 1432 %cmp10 = icmp eq i8 %and, 0 1433 %0 = or i32 %B, %A 1434 %1 = select i1 %cmp10, i32 %A, i32 %0 1435 ret i32 %1 1436} 1437 1438; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1439; icmp eq (and %cond, 1), 0 1440define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) { 1441; CHECK-LABEL: select_or_b: 1442; CHECK: ## %bb.0: ## %entry 1443; CHECK-NEXT: movl %esi, %eax 1444; CHECK-NEXT: orl %edi, %eax 1445; CHECK-NEXT: testb $1, %dl 1446; CHECK-NEXT: cmovel %edi, %eax 1447; CHECK-NEXT: retq 1448; 1449; ATHLON-LABEL: select_or_b: 1450; ATHLON: ## %bb.0: ## %entry 1451; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1452; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1453; ATHLON-NEXT: orl %ecx, %eax 1454; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1455; ATHLON-NEXT: cmovel %ecx, %eax 1456; ATHLON-NEXT: retl 1457; 1458; MCU-LABEL: select_or_b: 1459; MCU: # %bb.0: # %entry 1460; MCU-NEXT: testb $1, %cl 1461; MCU-NEXT: je .LBB28_2 1462; MCU-NEXT: # %bb.1: 1463; MCU-NEXT: orl %edx, %eax 1464; MCU-NEXT: .LBB28_2: # %entry 1465; MCU-NEXT: retl 1466entry: 1467 %and = and i8 %cond, 1 1468 %cmp10 = icmp ne i8 %and, 1 1469 %0 = or i32 %B, %A 1470 %1 = select i1 %cmp10, i32 %A, i32 %0 1471 ret i32 %1 1472} 1473 1474define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) { 1475; CHECK-LABEL: select_or_1: 1476; CHECK: ## %bb.0: ## %entry 1477; CHECK-NEXT: movl %esi, %eax 1478; CHECK-NEXT: orl %edi, %eax 1479; CHECK-NEXT: testb $1, %dl 1480; CHECK-NEXT: cmovel %edi, %eax 1481; CHECK-NEXT: retq 1482; 1483; ATHLON-LABEL: select_or_1: 1484; ATHLON: ## %bb.0: ## %entry 1485; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1486; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1487; ATHLON-NEXT: orl %ecx, %eax 1488; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1489; ATHLON-NEXT: cmovel %ecx, %eax 1490; ATHLON-NEXT: retl 1491; 1492; MCU-LABEL: select_or_1: 1493; MCU: # %bb.0: # %entry 1494; MCU-NEXT: andl $1, %ecx 1495; MCU-NEXT: negl %ecx 1496; MCU-NEXT: andl %edx, %ecx 1497; MCU-NEXT: orl %ecx, %eax 1498; MCU-NEXT: retl 1499entry: 1500 %and = and i32 %cond, 1 1501 %cmp10 = icmp eq i32 %and, 0 1502 %0 = or i32 %B, %A 1503 %1 = select i1 %cmp10, i32 %A, i32 %0 1504 ret i32 %1 1505} 1506 1507; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1508; icmp eq (and %cond, 1), 0 1509define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) { 1510; CHECK-LABEL: select_or_1b: 1511; CHECK: ## %bb.0: ## %entry 1512; CHECK-NEXT: movl %esi, %eax 1513; CHECK-NEXT: orl %edi, %eax 1514; CHECK-NEXT: testb $1, %dl 1515; CHECK-NEXT: cmovel %edi, %eax 1516; CHECK-NEXT: retq 1517; 1518; ATHLON-LABEL: select_or_1b: 1519; ATHLON: ## %bb.0: ## %entry 1520; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1521; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1522; ATHLON-NEXT: orl %ecx, %eax 1523; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1524; ATHLON-NEXT: cmovel %ecx, %eax 1525; ATHLON-NEXT: retl 1526; 1527; MCU-LABEL: select_or_1b: 1528; MCU: # %bb.0: # %entry 1529; MCU-NEXT: testb $1, %cl 1530; MCU-NEXT: je .LBB30_2 1531; MCU-NEXT: # %bb.1: 1532; MCU-NEXT: orl %edx, %eax 1533; MCU-NEXT: .LBB30_2: # %entry 1534; MCU-NEXT: retl 1535entry: 1536 %and = and i32 %cond, 1 1537 %cmp10 = icmp ne i32 %and, 1 1538 %0 = or i32 %B, %A 1539 %1 = select i1 %cmp10, i32 %A, i32 %0 1540 ret i32 %1 1541} 1542