1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin10               | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom    | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon    | FileCheck %s --check-prefix=ATHLON
5; RUN: llc < %s -mtriple=i386-intel-elfiamcu                 | FileCheck %s --check-prefix=MCU
6
7; PR5757
8%0 = type { i64, i32 }
9
10define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind {
11; CHECK-LABEL: test1:
12; CHECK:       ## %bb.0:
13; CHECK-NEXT:    addq $8, %rdi
14; CHECK-NEXT:    addq $8, %rsi
15; CHECK-NEXT:    testb $1, %dl
16; CHECK-NEXT:    cmovneq %rdi, %rsi
17; CHECK-NEXT:    movl (%rsi), %eax
18; CHECK-NEXT:    retq
19;
20; ATHLON-LABEL: test1:
21; ATHLON:       ## %bb.0:
22; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
23; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
24; ATHLON-NEXT:    addl $8, %ecx
25; ATHLON-NEXT:    addl $8, %eax
26; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
27; ATHLON-NEXT:    cmovnel %ecx, %eax
28; ATHLON-NEXT:    movl (%eax), %eax
29; ATHLON-NEXT:    retl
30;
31; MCU-LABEL: test1:
32; MCU:       # %bb.0:
33; MCU-NEXT:    testb $1, %cl
34; MCU-NEXT:    jne .LBB0_1
35; MCU-NEXT:  # %bb.2:
36; MCU-NEXT:    addl $8, %edx
37; MCU-NEXT:    movl (%edx), %eax
38; MCU-NEXT:    retl
39; MCU-NEXT:  .LBB0_1:
40; MCU-NEXT:    addl $8, %eax
41; MCU-NEXT:    movl (%eax), %eax
42; MCU-NEXT:    retl
43  %t0 = load %0, %0* %p
44  %t1 = load %0, %0* %q
45  %t4 = select i1 %r, %0 %t0, %0 %t1
46  %t5 = extractvalue %0 %t4, 1
47  ret i32 %t5
48}
49
50; PR2139
51define i32 @test2() nounwind {
52; GENERIC-LABEL: test2:
53; GENERIC:       ## %bb.0: ## %entry
54; GENERIC-NEXT:    pushq %rax
55; GENERIC-NEXT:    callq _return_false
56; GENERIC-NEXT:    xorl %ecx, %ecx
57; GENERIC-NEXT:    testb $1, %al
58; GENERIC-NEXT:    movl $-3840, %eax ## imm = 0xF100
59; GENERIC-NEXT:    cmovnel %ecx, %eax
60; GENERIC-NEXT:    cmpl $32768, %eax ## imm = 0x8000
61; GENERIC-NEXT:    jge LBB1_1
62; GENERIC-NEXT:  ## %bb.2: ## %bb91
63; GENERIC-NEXT:    xorl %eax, %eax
64; GENERIC-NEXT:    popq %rcx
65; GENERIC-NEXT:    retq
66; GENERIC-NEXT:  LBB1_1: ## %bb90
67; GENERIC-NEXT:    ud2
68;
69; ATOM-LABEL: test2:
70; ATOM:       ## %bb.0: ## %entry
71; ATOM-NEXT:    pushq %rax
72; ATOM-NEXT:    callq _return_false
73; ATOM-NEXT:    xorl %ecx, %ecx
74; ATOM-NEXT:    movl $-3840, %edx ## imm = 0xF100
75; ATOM-NEXT:    testb $1, %al
76; ATOM-NEXT:    cmovnel %ecx, %edx
77; ATOM-NEXT:    cmpl $32768, %edx ## imm = 0x8000
78; ATOM-NEXT:    jge LBB1_1
79; ATOM-NEXT:  ## %bb.2: ## %bb91
80; ATOM-NEXT:    xorl %eax, %eax
81; ATOM-NEXT:    popq %rcx
82; ATOM-NEXT:    retq
83; ATOM-NEXT:  LBB1_1: ## %bb90
84; ATOM-NEXT:    ud2
85;
86; ATHLON-LABEL: test2:
87; ATHLON:       ## %bb.0: ## %entry
88; ATHLON-NEXT:    subl $12, %esp
89; ATHLON-NEXT:    calll _return_false
90; ATHLON-NEXT:    xorl %ecx, %ecx
91; ATHLON-NEXT:    testb $1, %al
92; ATHLON-NEXT:    movl $-3840, %eax ## imm = 0xF100
93; ATHLON-NEXT:    cmovnel %ecx, %eax
94; ATHLON-NEXT:    cmpl $32768, %eax ## imm = 0x8000
95; ATHLON-NEXT:    jge LBB1_1
96; ATHLON-NEXT:  ## %bb.2: ## %bb91
97; ATHLON-NEXT:    xorl %eax, %eax
98; ATHLON-NEXT:    addl $12, %esp
99; ATHLON-NEXT:    retl
100; ATHLON-NEXT:  LBB1_1: ## %bb90
101; ATHLON-NEXT:    ud2
102;
103; MCU-LABEL: test2:
104; MCU:       # %bb.0: # %entry
105; MCU-NEXT:    calll return_false
106; MCU-NEXT:    xorl %ecx, %ecx
107; MCU-NEXT:    testb $1, %al
108; MCU-NEXT:    jne .LBB1_2
109; MCU-NEXT:  # %bb.1: # %entry
110; MCU-NEXT:    movl $-3840, %ecx # imm = 0xF100
111; MCU-NEXT:  .LBB1_2: # %entry
112; MCU-NEXT:    cmpl $32768, %ecx # imm = 0x8000
113; MCU-NEXT:    jge .LBB1_3
114; MCU-NEXT:  # %bb.4: # %bb91
115; MCU-NEXT:    xorl %eax, %eax
116; MCU-NEXT:    retl
117; MCU-NEXT:  .LBB1_3: # %bb90
118entry:
119  %tmp73 = tail call i1 @return_false()
120  %g.0 = select i1 %tmp73, i16 0, i16 -480
121  %tmp7778 = sext i16 %g.0 to i32
122  %tmp80 = shl i32 %tmp7778, 3
123  %tmp87 = icmp sgt i32 %tmp80, 32767
124  br i1 %tmp87, label %bb90, label %bb91
125bb90:
126  unreachable
127bb91:
128  ret i32 0
129}
130
131declare i1 @return_false()
132
133;; Select between two floating point constants.
134define float @test3(i32 %x) nounwind readnone {
135; GENERIC-LABEL: test3:
136; GENERIC:       ## %bb.0: ## %entry
137; GENERIC-NEXT:    xorl %eax, %eax
138; GENERIC-NEXT:    testl %edi, %edi
139; GENERIC-NEXT:    sete %al
140; GENERIC-NEXT:    leaq {{.*}}(%rip), %rcx
141; GENERIC-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
142; GENERIC-NEXT:    retq
143;
144; ATOM-LABEL: test3:
145; ATOM:       ## %bb.0: ## %entry
146; ATOM-NEXT:    xorl %eax, %eax
147; ATOM-NEXT:    leaq {{.*}}(%rip), %rcx
148; ATOM-NEXT:    testl %edi, %edi
149; ATOM-NEXT:    sete %al
150; ATOM-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
151; ATOM-NEXT:    retq
152;
153; ATHLON-LABEL: test3:
154; ATHLON:       ## %bb.0: ## %entry
155; ATHLON-NEXT:    xorl %eax, %eax
156; ATHLON-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
157; ATHLON-NEXT:    sete %al
158; ATHLON-NEXT:    flds LCPI2_0(,%eax,4)
159; ATHLON-NEXT:    retl
160;
161; MCU-LABEL: test3:
162; MCU:       # %bb.0: # %entry
163; MCU-NEXT:    xorl %ecx, %ecx
164; MCU-NEXT:    testl %eax, %eax
165; MCU-NEXT:    sete %cl
166; MCU-NEXT:    flds {{\.LCPI.*}}(,%ecx,4)
167; MCU-NEXT:    retl
168entry:
169  %0 = icmp eq i32 %x, 0
170  %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
171  ret float %iftmp.0.0
172}
173
174define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly {
175; CHECK-LABEL: test4:
176; CHECK:       ## %bb.0: ## %entry
177; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
178; CHECK-NEXT:    xorl %eax, %eax
179; CHECK-NEXT:    ucomisd %xmm0, %xmm1
180; CHECK-NEXT:    seta %al
181; CHECK-NEXT:    movsbl (%rdi,%rax,4), %eax
182; CHECK-NEXT:    retq
183;
184; ATHLON-LABEL: test4:
185; ATHLON:       ## %bb.0: ## %entry
186; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
187; ATHLON-NEXT:    fldl {{[0-9]+}}(%esp)
188; ATHLON-NEXT:    flds LCPI3_0
189; ATHLON-NEXT:    xorl %ecx, %ecx
190; ATHLON-NEXT:    fucompi %st(1), %st
191; ATHLON-NEXT:    fstp %st(0)
192; ATHLON-NEXT:    seta %cl
193; ATHLON-NEXT:    movsbl (%eax,%ecx,4), %eax
194; ATHLON-NEXT:    retl
195;
196; MCU-LABEL: test4:
197; MCU:       # %bb.0: # %entry
198; MCU-NEXT:    movl %eax, %ecx
199; MCU-NEXT:    fldl {{[0-9]+}}(%esp)
200; MCU-NEXT:    flds {{\.LCPI.*}}
201; MCU-NEXT:    fucompp
202; MCU-NEXT:    fnstsw %ax
203; MCU-NEXT:    xorl %edx, %edx
204; MCU-NEXT:    # kill: def $ah killed $ah killed $ax
205; MCU-NEXT:    sahf
206; MCU-NEXT:    seta %dl
207; MCU-NEXT:    movb (%ecx,%edx,4), %al
208; MCU-NEXT:    retl
209entry:
210  %0 = fcmp olt double %F, 4.200000e+01
211  %iftmp.0.0 = select i1 %0, i32 4, i32 0
212  %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0
213  %2 = load i8, i8* %1, align 1
214  ret i8 %2
215}
216
217define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind {
218; GENERIC-LABEL: test5:
219; GENERIC:       ## %bb.0:
220; GENERIC-NEXT:    testb $1, %dil
221; GENERIC-NEXT:    jne LBB4_2
222; GENERIC-NEXT:  ## %bb.1:
223; GENERIC-NEXT:    movaps %xmm1, %xmm0
224; GENERIC-NEXT:  LBB4_2:
225; GENERIC-NEXT:    movss %xmm0, (%rsi)
226; GENERIC-NEXT:    retq
227;
228; ATOM-LABEL: test5:
229; ATOM:       ## %bb.0:
230; ATOM-NEXT:    testb $1, %dil
231; ATOM-NEXT:    jne LBB4_2
232; ATOM-NEXT:  ## %bb.1:
233; ATOM-NEXT:    movaps %xmm1, %xmm0
234; ATOM-NEXT:  LBB4_2:
235; ATOM-NEXT:    movss %xmm0, (%rsi)
236; ATOM-NEXT:    nop
237; ATOM-NEXT:    nop
238; ATOM-NEXT:    retq
239;
240; ATHLON-LABEL: test5:
241; ATHLON:       ## %bb.0:
242; ATHLON-NEXT:    pushl %esi
243; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
244; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
245; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
246; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
247; ATHLON-NEXT:    cmovnel %ecx, %edx
248; ATHLON-NEXT:    movzwl (%edx), %ecx
249; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
250; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %esi
251; ATHLON-NEXT:    cmovnel %edx, %esi
252; ATHLON-NEXT:    movzwl (%esi), %edx
253; ATHLON-NEXT:    movw %dx, 2(%eax)
254; ATHLON-NEXT:    movw %cx, (%eax)
255; ATHLON-NEXT:    popl %esi
256; ATHLON-NEXT:    retl
257;
258; MCU-LABEL: test5:
259; MCU:       # %bb.0:
260; MCU-NEXT:    pushl %esi
261; MCU-NEXT:    movl {{[0-9]+}}(%esp), %esi
262; MCU-NEXT:    testb $1, %al
263; MCU-NEXT:    jne .LBB4_2
264; MCU-NEXT:  # %bb.1:
265; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
266; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %edx
267; MCU-NEXT:  .LBB4_2:
268; MCU-NEXT:    movw %cx, 2(%esi)
269; MCU-NEXT:    movw %dx, (%esi)
270; MCU-NEXT:    popl %esi
271; MCU-NEXT:    retl
272  %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
273  store <2 x i16> %x, <2 x i16>* %p
274  ret void
275}
276
277; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
278define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
279; CHECK-LABEL: test6:
280; CHECK:       ## %bb.0:
281; CHECK-NEXT:    testl %edi, %edi
282; CHECK-NEXT:    je LBB5_1
283; CHECK-NEXT:  ## %bb.2:
284; CHECK-NEXT:    movaps (%rsi), %xmm0
285; CHECK-NEXT:    movaps %xmm0, (%rsi)
286; CHECK-NEXT:    retq
287; CHECK-NEXT:  LBB5_1:
288; CHECK-NEXT:    movaps (%rdx), %xmm0
289; CHECK-NEXT:    mulps %xmm0, %xmm0
290; CHECK-NEXT:    movaps %xmm0, (%rsi)
291; CHECK-NEXT:    retq
292;
293; ATHLON-LABEL: test6:
294; ATHLON:       ## %bb.0:
295; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
296; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
297; ATHLON-NEXT:    flds 12(%ecx)
298; ATHLON-NEXT:    flds 8(%ecx)
299; ATHLON-NEXT:    flds 4(%ecx)
300; ATHLON-NEXT:    flds (%ecx)
301; ATHLON-NEXT:    flds (%eax)
302; ATHLON-NEXT:    fmul %st, %st(0)
303; ATHLON-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
304; ATHLON-NEXT:    fxch %st(1)
305; ATHLON-NEXT:    fcmove %st(1), %st
306; ATHLON-NEXT:    fstp %st(1)
307; ATHLON-NEXT:    flds 4(%eax)
308; ATHLON-NEXT:    fmul %st, %st(0)
309; ATHLON-NEXT:    fxch %st(2)
310; ATHLON-NEXT:    fcmove %st(2), %st
311; ATHLON-NEXT:    fstp %st(2)
312; ATHLON-NEXT:    flds 8(%eax)
313; ATHLON-NEXT:    fmul %st, %st(0)
314; ATHLON-NEXT:    fxch %st(3)
315; ATHLON-NEXT:    fcmove %st(3), %st
316; ATHLON-NEXT:    fstp %st(3)
317; ATHLON-NEXT:    flds 12(%eax)
318; ATHLON-NEXT:    fmul %st, %st(0)
319; ATHLON-NEXT:    fxch %st(4)
320; ATHLON-NEXT:    fcmove %st(4), %st
321; ATHLON-NEXT:    fstp %st(4)
322; ATHLON-NEXT:    fxch %st(3)
323; ATHLON-NEXT:    fstps 12(%ecx)
324; ATHLON-NEXT:    fxch %st(1)
325; ATHLON-NEXT:    fstps 8(%ecx)
326; ATHLON-NEXT:    fstps 4(%ecx)
327; ATHLON-NEXT:    fstps (%ecx)
328; ATHLON-NEXT:    retl
329;
330; MCU-LABEL: test6:
331; MCU:       # %bb.0:
332; MCU-NEXT:    pushl %eax
333; MCU-NEXT:    flds 12(%edx)
334; MCU-NEXT:    fstps (%esp) # 4-byte Folded Spill
335; MCU-NEXT:    flds 8(%edx)
336; MCU-NEXT:    flds 4(%edx)
337; MCU-NEXT:    flds (%ecx)
338; MCU-NEXT:    flds 4(%ecx)
339; MCU-NEXT:    flds 8(%ecx)
340; MCU-NEXT:    flds 12(%ecx)
341; MCU-NEXT:    fmul %st, %st(0)
342; MCU-NEXT:    fxch %st(1)
343; MCU-NEXT:    fmul %st, %st(0)
344; MCU-NEXT:    fxch %st(2)
345; MCU-NEXT:    fmul %st, %st(0)
346; MCU-NEXT:    fxch %st(3)
347; MCU-NEXT:    fmul %st, %st(0)
348; MCU-NEXT:    testl %eax, %eax
349; MCU-NEXT:    flds (%edx)
350; MCU-NEXT:    je .LBB5_2
351; MCU-NEXT:  # %bb.1:
352; MCU-NEXT:    fstp %st(1)
353; MCU-NEXT:    fstp %st(3)
354; MCU-NEXT:    fstp %st(1)
355; MCU-NEXT:    fstp %st(0)
356; MCU-NEXT:    flds (%esp) # 4-byte Folded Reload
357; MCU-NEXT:    fldz
358; MCU-NEXT:    fldz
359; MCU-NEXT:    fldz
360; MCU-NEXT:    fxch %st(1)
361; MCU-NEXT:    fxch %st(6)
362; MCU-NEXT:    fxch %st(1)
363; MCU-NEXT:    fxch %st(5)
364; MCU-NEXT:    fxch %st(4)
365; MCU-NEXT:    fxch %st(1)
366; MCU-NEXT:    fxch %st(3)
367; MCU-NEXT:    fxch %st(2)
368; MCU-NEXT:  .LBB5_2:
369; MCU-NEXT:    fstp %st(0)
370; MCU-NEXT:    fstp %st(5)
371; MCU-NEXT:    fstp %st(3)
372; MCU-NEXT:    fxch %st(2)
373; MCU-NEXT:    fstps 12(%edx)
374; MCU-NEXT:    fxch %st(1)
375; MCU-NEXT:    fstps 8(%edx)
376; MCU-NEXT:    fstps 4(%edx)
377; MCU-NEXT:    fstps (%edx)
378; MCU-NEXT:    popl %eax
379; MCU-NEXT:    retl
380  %tmp = load <4 x float>, <4 x float>* %A
381  %tmp3 = load <4 x float>, <4 x float>* %B
382  %tmp9 = fmul <4 x float> %tmp3, %tmp3
383  %tmp.upgrd.1 = icmp eq i32 %C, 0
384  %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
385  store <4 x float> %iftmp.38.0, <4 x float>* %A
386  ret void
387}
388
389; Select with fp80's
390define x86_fp80 @test7(i32 %tmp8) nounwind {
391; GENERIC-LABEL: test7:
392; GENERIC:       ## %bb.0:
393; GENERIC-NEXT:    xorl %eax, %eax
394; GENERIC-NEXT:    testl %edi, %edi
395; GENERIC-NEXT:    setns %al
396; GENERIC-NEXT:    shlq $4, %rax
397; GENERIC-NEXT:    leaq {{.*}}(%rip), %rcx
398; GENERIC-NEXT:    fldt (%rax,%rcx)
399; GENERIC-NEXT:    retq
400;
401; ATOM-LABEL: test7:
402; ATOM:       ## %bb.0:
403; ATOM-NEXT:    xorl %eax, %eax
404; ATOM-NEXT:    leaq {{.*}}(%rip), %rcx
405; ATOM-NEXT:    testl %edi, %edi
406; ATOM-NEXT:    setns %al
407; ATOM-NEXT:    shlq $4, %rax
408; ATOM-NEXT:    fldt (%rax,%rcx)
409; ATOM-NEXT:    retq
410;
411; ATHLON-LABEL: test7:
412; ATHLON:       ## %bb.0:
413; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
414; ATHLON-NEXT:    notl %eax
415; ATHLON-NEXT:    shrl $27, %eax
416; ATHLON-NEXT:    andl $-16, %eax
417; ATHLON-NEXT:    fldt LCPI6_0(%eax)
418; ATHLON-NEXT:    retl
419;
420; MCU-LABEL: test7:
421; MCU:       # %bb.0:
422; MCU-NEXT:    notl %eax
423; MCU-NEXT:    shrl $27, %eax
424; MCU-NEXT:    andl $-16, %eax
425; MCU-NEXT:    fldt {{\.LCPI.*}}(%eax)
426; MCU-NEXT:    retl
427  %tmp9 = icmp sgt i32 %tmp8, -1
428  %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
429  ret x86_fp80 %retval
430}
431
432; widening select v6i32 and then a sub
433define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
434; GENERIC-LABEL: test8:
435; GENERIC:       ## %bb.0:
436; GENERIC-NEXT:    testb $1, %dil
437; GENERIC-NEXT:    jne LBB7_1
438; GENERIC-NEXT:  ## %bb.2:
439; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
440; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
441; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
442; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
443; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
444; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
445; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
446; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
447; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
448; GENERIC-NEXT:    jmp LBB7_3
449; GENERIC-NEXT:  LBB7_1:
450; GENERIC-NEXT:    movd %r9d, %xmm0
451; GENERIC-NEXT:    movd %r8d, %xmm1
452; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
453; GENERIC-NEXT:    movd %ecx, %xmm2
454; GENERIC-NEXT:    movd %edx, %xmm0
455; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
456; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
457; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
458; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
459; GENERIC-NEXT:  LBB7_3:
460; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
461; GENERIC-NEXT:    pcmpeqd %xmm2, %xmm2
462; GENERIC-NEXT:    paddd %xmm2, %xmm0
463; GENERIC-NEXT:    paddd %xmm2, %xmm1
464; GENERIC-NEXT:    movq %xmm1, 16(%rsi)
465; GENERIC-NEXT:    movdqa %xmm0, (%rsi)
466; GENERIC-NEXT:    retq
467;
468; ATOM-LABEL: test8:
469; ATOM:       ## %bb.0:
470; ATOM-NEXT:    testb $1, %dil
471; ATOM-NEXT:    jne LBB7_1
472; ATOM-NEXT:  ## %bb.2:
473; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
474; ATOM-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
475; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
476; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
477; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
478; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
479; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
480; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
481; ATOM-NEXT:    jmp LBB7_3
482; ATOM-NEXT:  LBB7_1:
483; ATOM-NEXT:    movd %r9d, %xmm1
484; ATOM-NEXT:    movd %r8d, %xmm2
485; ATOM-NEXT:    movd %ecx, %xmm3
486; ATOM-NEXT:    movd %edx, %xmm0
487; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
488; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
489; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
490; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
491; ATOM-NEXT:  LBB7_3:
492; ATOM-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
493; ATOM-NEXT:    pcmpeqd %xmm2, %xmm2
494; ATOM-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
495; ATOM-NEXT:    paddd %xmm2, %xmm0
496; ATOM-NEXT:    paddd %xmm2, %xmm1
497; ATOM-NEXT:    movq %xmm1, 16(%rsi)
498; ATOM-NEXT:    movdqa %xmm0, (%rsi)
499; ATOM-NEXT:    retq
500;
501; ATHLON-LABEL: test8:
502; ATHLON:       ## %bb.0:
503; ATHLON-NEXT:    pushl %ebp
504; ATHLON-NEXT:    pushl %ebx
505; ATHLON-NEXT:    pushl %edi
506; ATHLON-NEXT:    pushl %esi
507; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
508; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
509; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
510; ATHLON-NEXT:    cmovnel %eax, %ecx
511; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
512; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edx
513; ATHLON-NEXT:    cmovnel %eax, %edx
514; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
515; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %esi
516; ATHLON-NEXT:    cmovnel %eax, %esi
517; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
518; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %edi
519; ATHLON-NEXT:    cmovnel %eax, %edi
520; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
521; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ebx
522; ATHLON-NEXT:    cmovnel %eax, %ebx
523; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
524; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ebp
525; ATHLON-NEXT:    cmovnel %eax, %ebp
526; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
527; ATHLON-NEXT:    movl (%ecx), %ecx
528; ATHLON-NEXT:    movl (%edx), %edx
529; ATHLON-NEXT:    movl (%esi), %esi
530; ATHLON-NEXT:    movl (%edi), %edi
531; ATHLON-NEXT:    movl (%ebx), %ebx
532; ATHLON-NEXT:    movl (%ebp), %ebp
533; ATHLON-NEXT:    decl %ecx
534; ATHLON-NEXT:    movl %ecx, 20(%eax)
535; ATHLON-NEXT:    decl %edx
536; ATHLON-NEXT:    movl %edx, 16(%eax)
537; ATHLON-NEXT:    decl %esi
538; ATHLON-NEXT:    movl %esi, 12(%eax)
539; ATHLON-NEXT:    decl %edi
540; ATHLON-NEXT:    movl %edi, 8(%eax)
541; ATHLON-NEXT:    decl %ebx
542; ATHLON-NEXT:    movl %ebx, 4(%eax)
543; ATHLON-NEXT:    decl %ebp
544; ATHLON-NEXT:    movl %ebp, (%eax)
545; ATHLON-NEXT:    popl %esi
546; ATHLON-NEXT:    popl %edi
547; ATHLON-NEXT:    popl %ebx
548; ATHLON-NEXT:    popl %ebp
549; ATHLON-NEXT:    retl
550;
551; MCU-LABEL: test8:
552; MCU:       # %bb.0:
553; MCU-NEXT:    pushl %ebp
554; MCU-NEXT:    pushl %ebx
555; MCU-NEXT:    pushl %edi
556; MCU-NEXT:    pushl %esi
557; MCU-NEXT:    testb $1, %al
558; MCU-NEXT:    jne .LBB7_1
559; MCU-NEXT:  # %bb.2:
560; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
561; MCU-NEXT:    je .LBB7_5
562; MCU-NEXT:  .LBB7_4:
563; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
564; MCU-NEXT:    je .LBB7_8
565; MCU-NEXT:  .LBB7_7:
566; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
567; MCU-NEXT:    je .LBB7_11
568; MCU-NEXT:  .LBB7_10:
569; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
570; MCU-NEXT:    je .LBB7_14
571; MCU-NEXT:  .LBB7_13:
572; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
573; MCU-NEXT:    jmp .LBB7_15
574; MCU-NEXT:  .LBB7_1:
575; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
576; MCU-NEXT:    jne .LBB7_4
577; MCU-NEXT:  .LBB7_5:
578; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
579; MCU-NEXT:    jne .LBB7_7
580; MCU-NEXT:  .LBB7_8:
581; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
582; MCU-NEXT:    jne .LBB7_10
583; MCU-NEXT:  .LBB7_11:
584; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
585; MCU-NEXT:    jne .LBB7_13
586; MCU-NEXT:  .LBB7_14:
587; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
588; MCU-NEXT:  .LBB7_15:
589; MCU-NEXT:    movl (%edi), %ebx
590; MCU-NEXT:    movl (%ecx), %edi
591; MCU-NEXT:    movl (%esi), %esi
592; MCU-NEXT:    movl (%ebp), %ecx
593; MCU-NEXT:    movl (%eax), %eax
594; MCU-NEXT:    jne .LBB7_16
595; MCU-NEXT:  # %bb.17:
596; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
597; MCU-NEXT:    jmp .LBB7_18
598; MCU-NEXT:  .LBB7_16:
599; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
600; MCU-NEXT:  .LBB7_18:
601; MCU-NEXT:    movl (%ebp), %ebp
602; MCU-NEXT:    decl %ebp
603; MCU-NEXT:    decl %eax
604; MCU-NEXT:    decl %ecx
605; MCU-NEXT:    decl %esi
606; MCU-NEXT:    decl %edi
607; MCU-NEXT:    decl %ebx
608; MCU-NEXT:    movl %ebx, 20(%edx)
609; MCU-NEXT:    movl %edi, 16(%edx)
610; MCU-NEXT:    movl %esi, 12(%edx)
611; MCU-NEXT:    movl %ecx, 8(%edx)
612; MCU-NEXT:    movl %eax, 4(%edx)
613; MCU-NEXT:    movl %ebp, (%edx)
614; MCU-NEXT:    popl %esi
615; MCU-NEXT:    popl %edi
616; MCU-NEXT:    popl %ebx
617; MCU-NEXT:    popl %ebp
618; MCU-NEXT:    retl
619  %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
620  %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
621  store <6 x i32> %val, <6 x i32>* %dst.addr
622  ret void
623}
624
625
626;; Test integer select between values and constants.
627
628define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
629; CHECK-LABEL: test9:
630; CHECK:       ## %bb.0:
631; CHECK-NEXT:    xorl %eax, %eax
632; CHECK-NEXT:    cmpq $1, %rdi
633; CHECK-NEXT:    sbbq %rax, %rax
634; CHECK-NEXT:    orq %rsi, %rax
635; CHECK-NEXT:    retq
636;
637; ATHLON-LABEL: test9:
638; ATHLON:       ## %bb.0:
639; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
640; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
641; ATHLON-NEXT:    movl $-1, %eax
642; ATHLON-NEXT:    movl $-1, %edx
643; ATHLON-NEXT:    je LBB8_2
644; ATHLON-NEXT:  ## %bb.1:
645; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
646; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
647; ATHLON-NEXT:  LBB8_2:
648; ATHLON-NEXT:    retl
649;
650; MCU-LABEL: test9:
651; MCU:       # %bb.0:
652; MCU-NEXT:    orl %edx, %eax
653; MCU-NEXT:    jne .LBB8_1
654; MCU-NEXT:  # %bb.2:
655; MCU-NEXT:    movl $-1, %eax
656; MCU-NEXT:    movl $-1, %edx
657; MCU-NEXT:    retl
658; MCU-NEXT:  .LBB8_1:
659; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
660; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
661; MCU-NEXT:    retl
662  %cmp = icmp ne i64 %x, 0
663  %cond = select i1 %cmp, i64 %y, i64 -1
664  ret i64 %cond
665}
666
667;; Same as test9
668define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
669; CHECK-LABEL: test9a:
670; CHECK:       ## %bb.0:
671; CHECK-NEXT:    xorl %eax, %eax
672; CHECK-NEXT:    cmpq $1, %rdi
673; CHECK-NEXT:    sbbq %rax, %rax
674; CHECK-NEXT:    orq %rsi, %rax
675; CHECK-NEXT:    retq
676;
677; ATHLON-LABEL: test9a:
678; ATHLON:       ## %bb.0:
679; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
680; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
681; ATHLON-NEXT:    movl $-1, %eax
682; ATHLON-NEXT:    movl $-1, %edx
683; ATHLON-NEXT:    je LBB9_2
684; ATHLON-NEXT:  ## %bb.1:
685; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
686; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
687; ATHLON-NEXT:  LBB9_2:
688; ATHLON-NEXT:    retl
689;
690; MCU-LABEL: test9a:
691; MCU:       # %bb.0:
692; MCU-NEXT:    orl %edx, %eax
693; MCU-NEXT:    movl $-1, %eax
694; MCU-NEXT:    movl $-1, %edx
695; MCU-NEXT:    je .LBB9_2
696; MCU-NEXT:  # %bb.1:
697; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
698; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
699; MCU-NEXT:  .LBB9_2:
700; MCU-NEXT:    retl
701  %cmp = icmp eq i64 %x, 0
702  %cond = select i1 %cmp, i64 -1, i64 %y
703  ret i64 %cond
704}
705
706define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
707; GENERIC-LABEL: test9b:
708; GENERIC:       ## %bb.0:
709; GENERIC-NEXT:    cmpq $1, %rdi
710; GENERIC-NEXT:    sbbq %rax, %rax
711; GENERIC-NEXT:    orq %rsi, %rax
712; GENERIC-NEXT:    retq
713;
714; ATOM-LABEL: test9b:
715; ATOM:       ## %bb.0:
716; ATOM-NEXT:    cmpq $1, %rdi
717; ATOM-NEXT:    sbbq %rax, %rax
718; ATOM-NEXT:    orq %rsi, %rax
719; ATOM-NEXT:    nop
720; ATOM-NEXT:    nop
721; ATOM-NEXT:    retq
722;
723; ATHLON-LABEL: test9b:
724; ATHLON:       ## %bb.0:
725; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
726; ATHLON-NEXT:    xorl %edx, %edx
727; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
728; ATHLON-NEXT:    sete %dl
729; ATHLON-NEXT:    negl %edx
730; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
731; ATHLON-NEXT:    orl %edx, %eax
732; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %edx
733; ATHLON-NEXT:    retl
734;
735; MCU-LABEL: test9b:
736; MCU:       # %bb.0:
737; MCU-NEXT:    movl %edx, %ecx
738; MCU-NEXT:    xorl %edx, %edx
739; MCU-NEXT:    orl %ecx, %eax
740; MCU-NEXT:    sete %dl
741; MCU-NEXT:    negl %edx
742; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
743; MCU-NEXT:    orl %edx, %eax
744; MCU-NEXT:    orl {{[0-9]+}}(%esp), %edx
745; MCU-NEXT:    retl
746  %cmp = icmp eq i64 %x, 0
747  %A = sext i1 %cmp to i64
748  %cond = or i64 %y, %A
749  ret i64 %cond
750}
751
752;; Select between -1 and 1.
753define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
754; CHECK-LABEL: test10:
755; CHECK:       ## %bb.0:
756; CHECK-NEXT:    xorl %eax, %eax
757; CHECK-NEXT:    testq %rdi, %rdi
758; CHECK-NEXT:    setne %al
759; CHECK-NEXT:    leaq -1(%rax,%rax), %rax
760; CHECK-NEXT:    retq
761;
762; ATHLON-LABEL: test10:
763; ATHLON:       ## %bb.0:
764; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
765; ATHLON-NEXT:    xorl %edx, %edx
766; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
767; ATHLON-NEXT:    movl $-1, %ecx
768; ATHLON-NEXT:    movl $1, %eax
769; ATHLON-NEXT:    cmovel %ecx, %eax
770; ATHLON-NEXT:    cmovel %ecx, %edx
771; ATHLON-NEXT:    retl
772;
773; MCU-LABEL: test10:
774; MCU:       # %bb.0:
775; MCU-NEXT:    orl %edx, %eax
776; MCU-NEXT:    movl $-1, %eax
777; MCU-NEXT:    movl $-1, %edx
778; MCU-NEXT:    je .LBB11_2
779; MCU-NEXT:  # %bb.1:
780; MCU-NEXT:    xorl %edx, %edx
781; MCU-NEXT:    movl $1, %eax
782; MCU-NEXT:  .LBB11_2:
783; MCU-NEXT:    retl
784  %cmp = icmp eq i64 %x, 0
785  %cond = select i1 %cmp, i64 -1, i64 1
786  ret i64 %cond
787}
788
789define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
790; CHECK-LABEL: test11:
791; CHECK:       ## %bb.0:
792; CHECK-NEXT:    xorl %eax, %eax
793; CHECK-NEXT:    cmpq $1, %rdi
794; CHECK-NEXT:    sbbq %rax, %rax
795; CHECK-NEXT:    notq %rax
796; CHECK-NEXT:    orq %rsi, %rax
797; CHECK-NEXT:    retq
798;
799; ATHLON-LABEL: test11:
800; ATHLON:       ## %bb.0:
801; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
802; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
803; ATHLON-NEXT:    movl $-1, %eax
804; ATHLON-NEXT:    movl $-1, %edx
805; ATHLON-NEXT:    jne LBB12_2
806; ATHLON-NEXT:  ## %bb.1:
807; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
808; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
809; ATHLON-NEXT:  LBB12_2:
810; ATHLON-NEXT:    retl
811;
812; MCU-LABEL: test11:
813; MCU:       # %bb.0:
814; MCU-NEXT:    orl %edx, %eax
815; MCU-NEXT:    je .LBB12_1
816; MCU-NEXT:  # %bb.2:
817; MCU-NEXT:    movl $-1, %eax
818; MCU-NEXT:    movl $-1, %edx
819; MCU-NEXT:    retl
820; MCU-NEXT:  .LBB12_1:
821; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
822; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
823; MCU-NEXT:    retl
824  %cmp = icmp eq i64 %x, 0
825  %cond = select i1 %cmp, i64 %y, i64 -1
826  ret i64 %cond
827}
828
829define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
830; CHECK-LABEL: test11a:
831; CHECK:       ## %bb.0:
832; CHECK-NEXT:    xorl %eax, %eax
833; CHECK-NEXT:    cmpq $1, %rdi
834; CHECK-NEXT:    sbbq %rax, %rax
835; CHECK-NEXT:    notq %rax
836; CHECK-NEXT:    orq %rsi, %rax
837; CHECK-NEXT:    retq
838;
839; ATHLON-LABEL: test11a:
840; ATHLON:       ## %bb.0:
841; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
842; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %eax
843; ATHLON-NEXT:    movl $-1, %eax
844; ATHLON-NEXT:    movl $-1, %edx
845; ATHLON-NEXT:    jne LBB13_2
846; ATHLON-NEXT:  ## %bb.1:
847; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
848; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %edx
849; ATHLON-NEXT:  LBB13_2:
850; ATHLON-NEXT:    retl
851;
852; MCU-LABEL: test11a:
853; MCU:       # %bb.0:
854; MCU-NEXT:    orl %edx, %eax
855; MCU-NEXT:    movl $-1, %eax
856; MCU-NEXT:    movl $-1, %edx
857; MCU-NEXT:    jne .LBB13_2
858; MCU-NEXT:  # %bb.1:
859; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
860; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
861; MCU-NEXT:  .LBB13_2:
862; MCU-NEXT:    retl
863  %cmp = icmp ne i64 %x, 0
864  %cond = select i1 %cmp, i64 -1, i64 %y
865  ret i64 %cond
866}
867
868define i32 @test13(i32 %a, i32 %b) nounwind {
869; GENERIC-LABEL: test13:
870; GENERIC:       ## %bb.0:
871; GENERIC-NEXT:    cmpl %esi, %edi
872; GENERIC-NEXT:    sbbl %eax, %eax
873; GENERIC-NEXT:    retq
874;
875; ATOM-LABEL: test13:
876; ATOM:       ## %bb.0:
877; ATOM-NEXT:    cmpl %esi, %edi
878; ATOM-NEXT:    sbbl %eax, %eax
879; ATOM-NEXT:    nop
880; ATOM-NEXT:    nop
881; ATOM-NEXT:    nop
882; ATOM-NEXT:    nop
883; ATOM-NEXT:    retq
884;
885; ATHLON-LABEL: test13:
886; ATHLON:       ## %bb.0:
887; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
888; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %eax
889; ATHLON-NEXT:    sbbl %eax, %eax
890; ATHLON-NEXT:    retl
891;
892; MCU-LABEL: test13:
893; MCU:       # %bb.0:
894; MCU-NEXT:    cmpl %edx, %eax
895; MCU-NEXT:    sbbl %eax, %eax
896; MCU-NEXT:    retl
897  %c = icmp ult i32 %a, %b
898  %d = sext i1 %c to i32
899  ret i32 %d
900}
901
902define i32 @test14(i32 %a, i32 %b) nounwind {
903; GENERIC-LABEL: test14:
904; GENERIC:       ## %bb.0:
905; GENERIC-NEXT:    xorl %eax, %eax
906; GENERIC-NEXT:    cmpl %esi, %edi
907; GENERIC-NEXT:    adcl $-1, %eax
908; GENERIC-NEXT:    retq
909;
910; ATOM-LABEL: test14:
911; ATOM:       ## %bb.0:
912; ATOM-NEXT:    xorl %eax, %eax
913; ATOM-NEXT:    cmpl %esi, %edi
914; ATOM-NEXT:    adcl $-1, %eax
915; ATOM-NEXT:    nop
916; ATOM-NEXT:    nop
917; ATOM-NEXT:    retq
918;
919; ATHLON-LABEL: test14:
920; ATHLON:       ## %bb.0:
921; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
922; ATHLON-NEXT:    xorl %eax, %eax
923; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %ecx
924; ATHLON-NEXT:    adcl $-1, %eax
925; ATHLON-NEXT:    retl
926;
927; MCU-LABEL: test14:
928; MCU:       # %bb.0:
929; MCU-NEXT:    xorl %ecx, %ecx
930; MCU-NEXT:    cmpl %edx, %eax
931; MCU-NEXT:    adcl $-1, %ecx
932; MCU-NEXT:    movl %ecx, %eax
933; MCU-NEXT:    retl
934  %c = icmp uge i32 %a, %b
935  %d = sext i1 %c to i32
936  ret i32 %d
937}
938
939; rdar://10961709
940define i32 @test15(i32 %x) nounwind {
941; GENERIC-LABEL: test15:
942; GENERIC:       ## %bb.0: ## %entry
943; GENERIC-NEXT:    negl %edi
944; GENERIC-NEXT:    sbbl %eax, %eax
945; GENERIC-NEXT:    retq
946;
947; ATOM-LABEL: test15:
948; ATOM:       ## %bb.0: ## %entry
949; ATOM-NEXT:    negl %edi
950; ATOM-NEXT:    sbbl %eax, %eax
951; ATOM-NEXT:    nop
952; ATOM-NEXT:    nop
953; ATOM-NEXT:    nop
954; ATOM-NEXT:    nop
955; ATOM-NEXT:    retq
956;
957; ATHLON-LABEL: test15:
958; ATHLON:       ## %bb.0: ## %entry
959; ATHLON-NEXT:    xorl %eax, %eax
960; ATHLON-NEXT:    cmpl {{[0-9]+}}(%esp), %eax
961; ATHLON-NEXT:    sbbl %eax, %eax
962; ATHLON-NEXT:    retl
963;
964; MCU-LABEL: test15:
965; MCU:       # %bb.0: # %entry
966; MCU-NEXT:    negl %eax
967; MCU-NEXT:    sbbl %eax, %eax
968; MCU-NEXT:    retl
969entry:
970  %cmp = icmp ne i32 %x, 0
971  %sub = sext i1 %cmp to i32
972  ret i32 %sub
973}
974
975define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
976; GENERIC-LABEL: test16:
977; GENERIC:       ## %bb.0: ## %entry
978; GENERIC-NEXT:    negq %rdi
979; GENERIC-NEXT:    sbbq %rax, %rax
980; GENERIC-NEXT:    retq
981;
982; ATOM-LABEL: test16:
983; ATOM:       ## %bb.0: ## %entry
984; ATOM-NEXT:    negq %rdi
985; ATOM-NEXT:    sbbq %rax, %rax
986; ATOM-NEXT:    nop
987; ATOM-NEXT:    nop
988; ATOM-NEXT:    nop
989; ATOM-NEXT:    nop
990; ATOM-NEXT:    retq
991;
992; ATHLON-LABEL: test16:
993; ATHLON:       ## %bb.0: ## %entry
994; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
995; ATHLON-NEXT:    xorl %eax, %eax
996; ATHLON-NEXT:    orl {{[0-9]+}}(%esp), %ecx
997; ATHLON-NEXT:    setne %al
998; ATHLON-NEXT:    negl %eax
999; ATHLON-NEXT:    movl %eax, %edx
1000; ATHLON-NEXT:    retl
1001;
1002; MCU-LABEL: test16:
1003; MCU:       # %bb.0: # %entry
1004; MCU-NEXT:    movl %eax, %ecx
1005; MCU-NEXT:    xorl %eax, %eax
1006; MCU-NEXT:    orl %edx, %ecx
1007; MCU-NEXT:    setne %al
1008; MCU-NEXT:    negl %eax
1009; MCU-NEXT:    movl %eax, %edx
1010; MCU-NEXT:    retl
1011entry:
1012  %cmp = icmp ne i64 %x, 0
1013  %conv1 = sext i1 %cmp to i64
1014  ret i64 %conv1
1015}
1016
1017define i16 @test17(i16 %x) nounwind {
1018; GENERIC-LABEL: test17:
1019; GENERIC:       ## %bb.0: ## %entry
1020; GENERIC-NEXT:    negw %di
1021; GENERIC-NEXT:    sbbl %eax, %eax
1022; GENERIC-NEXT:    ## kill: def $ax killed $ax killed $eax
1023; GENERIC-NEXT:    retq
1024;
1025; ATOM-LABEL: test17:
1026; ATOM:       ## %bb.0: ## %entry
1027; ATOM-NEXT:    negw %di
1028; ATOM-NEXT:    sbbl %eax, %eax
1029; ATOM-NEXT:    ## kill: def $ax killed $ax killed $eax
1030; ATOM-NEXT:    nop
1031; ATOM-NEXT:    nop
1032; ATOM-NEXT:    nop
1033; ATOM-NEXT:    nop
1034; ATOM-NEXT:    retq
1035;
1036; ATHLON-LABEL: test17:
1037; ATHLON:       ## %bb.0: ## %entry
1038; ATHLON-NEXT:    xorl %eax, %eax
1039; ATHLON-NEXT:    cmpw {{[0-9]+}}(%esp), %ax
1040; ATHLON-NEXT:    sbbl %eax, %eax
1041; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1042; ATHLON-NEXT:    retl
1043;
1044; MCU-LABEL: test17:
1045; MCU:       # %bb.0: # %entry
1046; MCU-NEXT:    negw %ax
1047; MCU-NEXT:    sbbl %eax, %eax
1048; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1049; MCU-NEXT:    retl
1050entry:
1051  %cmp = icmp ne i16 %x, 0
1052  %sub = sext i1 %cmp to i16
1053  ret i16 %sub
1054}
1055
1056define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
1057; GENERIC-LABEL: test18:
1058; GENERIC:       ## %bb.0:
1059; GENERIC-NEXT:    movl %esi, %eax
1060; GENERIC-NEXT:    cmpl $15, %edi
1061; GENERIC-NEXT:    cmovgel %edx, %eax
1062; GENERIC-NEXT:    ## kill: def $al killed $al killed $eax
1063; GENERIC-NEXT:    retq
1064;
1065; ATOM-LABEL: test18:
1066; ATOM:       ## %bb.0:
1067; ATOM-NEXT:    movl %esi, %eax
1068; ATOM-NEXT:    cmpl $15, %edi
1069; ATOM-NEXT:    cmovgel %edx, %eax
1070; ATOM-NEXT:    ## kill: def $al killed $al killed $eax
1071; ATOM-NEXT:    nop
1072; ATOM-NEXT:    nop
1073; ATOM-NEXT:    retq
1074;
1075; ATHLON-LABEL: test18:
1076; ATHLON:       ## %bb.0:
1077; ATHLON-NEXT:    cmpl $15, {{[0-9]+}}(%esp)
1078; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
1079; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
1080; ATHLON-NEXT:    cmovll %eax, %ecx
1081; ATHLON-NEXT:    movb (%ecx), %al
1082; ATHLON-NEXT:    retl
1083;
1084; MCU-LABEL: test18:
1085; MCU:       # %bb.0:
1086; MCU-NEXT:    cmpl $15, %eax
1087; MCU-NEXT:    jl .LBB19_2
1088; MCU-NEXT:  # %bb.1:
1089; MCU-NEXT:    movl %ecx, %edx
1090; MCU-NEXT:  .LBB19_2:
1091; MCU-NEXT:    movl %edx, %eax
1092; MCU-NEXT:    retl
1093  %cmp = icmp slt i32 %x, 15
1094  %sel = select i1 %cmp, i8 %a, i8 %b
1095  ret i8 %sel
1096}
1097
1098define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
1099; GENERIC-LABEL: trunc_select_miscompile:
1100; GENERIC:       ## %bb.0:
1101; GENERIC-NEXT:    ## kill: def $esi killed $esi def $rsi
1102; GENERIC-NEXT:    movl %edi, %eax
1103; GENERIC-NEXT:    leal 2(%rsi), %ecx
1104; GENERIC-NEXT:    ## kill: def $cl killed $cl killed $ecx
1105; GENERIC-NEXT:    shll %cl, %eax
1106; GENERIC-NEXT:    retq
1107;
1108; ATOM-LABEL: trunc_select_miscompile:
1109; ATOM:       ## %bb.0:
1110; ATOM-NEXT:    ## kill: def $esi killed $esi def $rsi
1111; ATOM-NEXT:    leal 2(%rsi), %ecx
1112; ATOM-NEXT:    movl %edi, %eax
1113; ATOM-NEXT:    ## kill: def $cl killed $cl killed $ecx
1114; ATOM-NEXT:    shll %cl, %eax
1115; ATOM-NEXT:    nop
1116; ATOM-NEXT:    nop
1117; ATOM-NEXT:    retq
1118;
1119; ATHLON-LABEL: trunc_select_miscompile:
1120; ATHLON:       ## %bb.0:
1121; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1122; ATHLON-NEXT:    movb {{[0-9]+}}(%esp), %cl
1123; ATHLON-NEXT:    orb $2, %cl
1124; ATHLON-NEXT:    shll %cl, %eax
1125; ATHLON-NEXT:    retl
1126;
1127; MCU-LABEL: trunc_select_miscompile:
1128; MCU:       # %bb.0:
1129; MCU-NEXT:    movl %edx, %ecx
1130; MCU-NEXT:    orb $2, %cl
1131; MCU-NEXT:    # kill: def $cl killed $cl killed $ecx
1132; MCU-NEXT:    shll %cl, %eax
1133; MCU-NEXT:    retl
1134  %tmp1 = select i1 %cc, i32 3, i32 2
1135  %tmp2 = shl i32 %a, %tmp1
1136  ret i32 %tmp2
1137}
1138
1139; reproducer for pr29002
1140define void @clamp_i8(i32 %src, i8* %dst) {
1141; GENERIC-LABEL: clamp_i8:
1142; GENERIC:       ## %bb.0:
1143; GENERIC-NEXT:    cmpl $127, %edi
1144; GENERIC-NEXT:    movl $127, %eax
1145; GENERIC-NEXT:    cmovlel %edi, %eax
1146; GENERIC-NEXT:    cmpl $-128, %eax
1147; GENERIC-NEXT:    movl $128, %ecx
1148; GENERIC-NEXT:    cmovgel %eax, %ecx
1149; GENERIC-NEXT:    movb %cl, (%rsi)
1150; GENERIC-NEXT:    retq
1151;
1152; ATOM-LABEL: clamp_i8:
1153; ATOM:       ## %bb.0:
1154; ATOM-NEXT:    cmpl $127, %edi
1155; ATOM-NEXT:    movl $127, %eax
1156; ATOM-NEXT:    movl $128, %ecx
1157; ATOM-NEXT:    cmovlel %edi, %eax
1158; ATOM-NEXT:    cmpl $-128, %eax
1159; ATOM-NEXT:    cmovgel %eax, %ecx
1160; ATOM-NEXT:    movb %cl, (%rsi)
1161; ATOM-NEXT:    retq
1162;
1163; ATHLON-LABEL: clamp_i8:
1164; ATHLON:       ## %bb.0:
1165; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1166; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1167; ATHLON-NEXT:    cmpl $127, %ecx
1168; ATHLON-NEXT:    movl $127, %edx
1169; ATHLON-NEXT:    cmovlel %ecx, %edx
1170; ATHLON-NEXT:    cmpl $-128, %edx
1171; ATHLON-NEXT:    movl $128, %ecx
1172; ATHLON-NEXT:    cmovgel %edx, %ecx
1173; ATHLON-NEXT:    movb %cl, (%eax)
1174; ATHLON-NEXT:    retl
1175;
1176; MCU-LABEL: clamp_i8:
1177; MCU:       # %bb.0:
1178; MCU-NEXT:    cmpl $127, %eax
1179; MCU-NEXT:    movl $127, %ecx
1180; MCU-NEXT:    jg .LBB21_2
1181; MCU-NEXT:  # %bb.1:
1182; MCU-NEXT:    movl %eax, %ecx
1183; MCU-NEXT:  .LBB21_2:
1184; MCU-NEXT:    cmpl $-128, %ecx
1185; MCU-NEXT:    movb $-128, %al
1186; MCU-NEXT:    jl .LBB21_4
1187; MCU-NEXT:  # %bb.3:
1188; MCU-NEXT:    movl %ecx, %eax
1189; MCU-NEXT:  .LBB21_4:
1190; MCU-NEXT:    movb %al, (%edx)
1191; MCU-NEXT:    retl
1192  %cmp = icmp sgt i32 %src, 127
1193  %sel1 = select i1 %cmp, i32 127, i32 %src
1194  %cmp1 = icmp slt i32 %sel1, -128
1195  %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
1196  %conv = trunc i32 %sel2 to i8
1197  store i8 %conv, i8* %dst, align 2
1198  ret void
1199}
1200
1201; reproducer for pr29002
1202define void @clamp(i32 %src, i16* %dst) {
1203; GENERIC-LABEL: clamp:
1204; GENERIC:       ## %bb.0:
1205; GENERIC-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
1206; GENERIC-NEXT:    movl $32767, %eax ## imm = 0x7FFF
1207; GENERIC-NEXT:    cmovlel %edi, %eax
1208; GENERIC-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
1209; GENERIC-NEXT:    movl $32768, %ecx ## imm = 0x8000
1210; GENERIC-NEXT:    cmovgel %eax, %ecx
1211; GENERIC-NEXT:    movw %cx, (%rsi)
1212; GENERIC-NEXT:    retq
1213;
1214; ATOM-LABEL: clamp:
1215; ATOM:       ## %bb.0:
1216; ATOM-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
1217; ATOM-NEXT:    movl $32767, %eax ## imm = 0x7FFF
1218; ATOM-NEXT:    movl $32768, %ecx ## imm = 0x8000
1219; ATOM-NEXT:    cmovlel %edi, %eax
1220; ATOM-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
1221; ATOM-NEXT:    cmovgel %eax, %ecx
1222; ATOM-NEXT:    movw %cx, (%rsi)
1223; ATOM-NEXT:    retq
1224;
1225; ATHLON-LABEL: clamp:
1226; ATHLON:       ## %bb.0:
1227; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1228; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1229; ATHLON-NEXT:    cmpl $32767, %ecx ## imm = 0x7FFF
1230; ATHLON-NEXT:    movl $32767, %edx ## imm = 0x7FFF
1231; ATHLON-NEXT:    cmovlel %ecx, %edx
1232; ATHLON-NEXT:    cmpl $-32768, %edx ## imm = 0x8000
1233; ATHLON-NEXT:    movl $32768, %ecx ## imm = 0x8000
1234; ATHLON-NEXT:    cmovgel %edx, %ecx
1235; ATHLON-NEXT:    movw %cx, (%eax)
1236; ATHLON-NEXT:    retl
1237;
1238; MCU-LABEL: clamp:
1239; MCU:       # %bb.0:
1240; MCU-NEXT:    cmpl $32767, %eax # imm = 0x7FFF
1241; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
1242; MCU-NEXT:    jg .LBB22_2
1243; MCU-NEXT:  # %bb.1:
1244; MCU-NEXT:    movl %eax, %ecx
1245; MCU-NEXT:  .LBB22_2:
1246; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
1247; MCU-NEXT:    movl $32768, %eax # imm = 0x8000
1248; MCU-NEXT:    jl .LBB22_4
1249; MCU-NEXT:  # %bb.3:
1250; MCU-NEXT:    movl %ecx, %eax
1251; MCU-NEXT:  .LBB22_4:
1252; MCU-NEXT:    movw %ax, (%edx)
1253; MCU-NEXT:    retl
1254  %cmp = icmp sgt i32 %src, 32767
1255  %sel1 = select i1 %cmp, i32 32767, i32 %src
1256  %cmp1 = icmp slt i32 %sel1, -32768
1257  %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
1258  %conv = trunc i32 %sel2 to i16
1259  store i16 %conv, i16* %dst, align 2
1260  ret void
1261}
1262
1263define i16 @select_xor_1(i16 %A, i8 %cond) {
1264; CHECK-LABEL: select_xor_1:
1265; CHECK:       ## %bb.0: ## %entry
1266; CHECK-NEXT:    movl %edi, %eax
1267; CHECK-NEXT:    xorl $43, %eax
1268; CHECK-NEXT:    testb $1, %sil
1269; CHECK-NEXT:    cmovel %edi, %eax
1270; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
1271; CHECK-NEXT:    retq
1272;
1273; ATHLON-LABEL: select_xor_1:
1274; ATHLON:       ## %bb.0: ## %entry
1275; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1276; ATHLON-NEXT:    movl %ecx, %eax
1277; ATHLON-NEXT:    xorl $43, %eax
1278; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1279; ATHLON-NEXT:    cmovel %ecx, %eax
1280; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1281; ATHLON-NEXT:    retl
1282;
1283; MCU-LABEL: select_xor_1:
1284; MCU:       # %bb.0: # %entry
1285; MCU-NEXT:    andl $1, %edx
1286; MCU-NEXT:    negl %edx
1287; MCU-NEXT:    andl $43, %edx
1288; MCU-NEXT:    xorl %edx, %eax
1289; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1290; MCU-NEXT:    retl
1291entry:
1292 %and = and i8 %cond, 1
1293 %cmp10 = icmp eq i8 %and, 0
1294 %0 = xor i16 %A, 43
1295 %1 = select i1 %cmp10, i16 %A, i16 %0
1296 ret i16 %1
1297}
1298
1299; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1300; icmp eq (and %cond, 1), 0
1301define i16 @select_xor_1b(i16 %A, i8 %cond) {
1302; CHECK-LABEL: select_xor_1b:
1303; CHECK:       ## %bb.0: ## %entry
1304; CHECK-NEXT:    movl %edi, %eax
1305; CHECK-NEXT:    xorl $43, %eax
1306; CHECK-NEXT:    testb $1, %sil
1307; CHECK-NEXT:    cmovel %edi, %eax
1308; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
1309; CHECK-NEXT:    retq
1310;
1311; ATHLON-LABEL: select_xor_1b:
1312; ATHLON:       ## %bb.0: ## %entry
1313; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1314; ATHLON-NEXT:    movl %ecx, %eax
1315; ATHLON-NEXT:    xorl $43, %eax
1316; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1317; ATHLON-NEXT:    cmovel %ecx, %eax
1318; ATHLON-NEXT:    ## kill: def $ax killed $ax killed $eax
1319; ATHLON-NEXT:    retl
1320;
1321; MCU-LABEL: select_xor_1b:
1322; MCU:       # %bb.0: # %entry
1323; MCU-NEXT:    testb $1, %dl
1324; MCU-NEXT:    je .LBB24_2
1325; MCU-NEXT:  # %bb.1:
1326; MCU-NEXT:    xorl $43, %eax
1327; MCU-NEXT:  .LBB24_2: # %entry
1328; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1329; MCU-NEXT:    retl
1330entry:
1331 %and = and i8 %cond, 1
1332 %cmp10 = icmp ne i8 %and, 1
1333 %0 = xor i16 %A, 43
1334 %1 = select i1 %cmp10, i16 %A, i16 %0
1335 ret i16 %1
1336}
1337
1338define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1339; CHECK-LABEL: select_xor_2:
1340; CHECK:       ## %bb.0: ## %entry
1341; CHECK-NEXT:    movl %esi, %eax
1342; CHECK-NEXT:    xorl %edi, %eax
1343; CHECK-NEXT:    testb $1, %dl
1344; CHECK-NEXT:    cmovel %edi, %eax
1345; CHECK-NEXT:    retq
1346;
1347; ATHLON-LABEL: select_xor_2:
1348; ATHLON:       ## %bb.0: ## %entry
1349; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1350; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1351; ATHLON-NEXT:    xorl %ecx, %eax
1352; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1353; ATHLON-NEXT:    cmovel %ecx, %eax
1354; ATHLON-NEXT:    retl
1355;
1356; MCU-LABEL: select_xor_2:
1357; MCU:       # %bb.0: # %entry
1358; MCU-NEXT:    andl $1, %ecx
1359; MCU-NEXT:    negl %ecx
1360; MCU-NEXT:    andl %edx, %ecx
1361; MCU-NEXT:    xorl %ecx, %eax
1362; MCU-NEXT:    retl
1363entry:
1364 %and = and i8 %cond, 1
1365 %cmp10 = icmp eq i8 %and, 0
1366 %0 = xor i32 %B, %A
1367 %1 = select i1 %cmp10, i32 %A, i32 %0
1368 ret i32 %1
1369}
1370
1371; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1372; icmp eq (and %cond, 1), 0
1373define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) {
1374; CHECK-LABEL: select_xor_2b:
1375; CHECK:       ## %bb.0: ## %entry
1376; CHECK-NEXT:    movl %esi, %eax
1377; CHECK-NEXT:    xorl %edi, %eax
1378; CHECK-NEXT:    testb $1, %dl
1379; CHECK-NEXT:    cmovel %edi, %eax
1380; CHECK-NEXT:    retq
1381;
1382; ATHLON-LABEL: select_xor_2b:
1383; ATHLON:       ## %bb.0: ## %entry
1384; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1385; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1386; ATHLON-NEXT:    xorl %ecx, %eax
1387; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1388; ATHLON-NEXT:    cmovel %ecx, %eax
1389; ATHLON-NEXT:    retl
1390;
1391; MCU-LABEL: select_xor_2b:
1392; MCU:       # %bb.0: # %entry
1393; MCU-NEXT:    testb $1, %cl
1394; MCU-NEXT:    je .LBB26_2
1395; MCU-NEXT:  # %bb.1:
1396; MCU-NEXT:    xorl %edx, %eax
1397; MCU-NEXT:  .LBB26_2: # %entry
1398; MCU-NEXT:    retl
1399entry:
1400 %and = and i8 %cond, 1
1401 %cmp10 = icmp ne i8 %and, 1
1402 %0 = xor i32 %B, %A
1403 %1 = select i1 %cmp10, i32 %A, i32 %0
1404 ret i32 %1
1405}
1406
1407define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1408; CHECK-LABEL: select_or:
1409; CHECK:       ## %bb.0: ## %entry
1410; CHECK-NEXT:    movl %esi, %eax
1411; CHECK-NEXT:    orl %edi, %eax
1412; CHECK-NEXT:    testb $1, %dl
1413; CHECK-NEXT:    cmovel %edi, %eax
1414; CHECK-NEXT:    retq
1415;
1416; ATHLON-LABEL: select_or:
1417; ATHLON:       ## %bb.0: ## %entry
1418; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1419; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1420; ATHLON-NEXT:    orl %ecx, %eax
1421; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1422; ATHLON-NEXT:    cmovel %ecx, %eax
1423; ATHLON-NEXT:    retl
1424;
1425; MCU-LABEL: select_or:
1426; MCU:       # %bb.0: # %entry
1427; MCU-NEXT:    andl $1, %ecx
1428; MCU-NEXT:    negl %ecx
1429; MCU-NEXT:    andl %edx, %ecx
1430; MCU-NEXT:    orl %ecx, %eax
1431; MCU-NEXT:    retl
1432entry:
1433 %and = and i8 %cond, 1
1434 %cmp10 = icmp eq i8 %and, 0
1435 %0 = or i32 %B, %A
1436 %1 = select i1 %cmp10, i32 %A, i32 %0
1437 ret i32 %1
1438}
1439
1440; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1441; icmp eq (and %cond, 1), 0
1442define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) {
1443; CHECK-LABEL: select_or_b:
1444; CHECK:       ## %bb.0: ## %entry
1445; CHECK-NEXT:    movl %esi, %eax
1446; CHECK-NEXT:    orl %edi, %eax
1447; CHECK-NEXT:    testb $1, %dl
1448; CHECK-NEXT:    cmovel %edi, %eax
1449; CHECK-NEXT:    retq
1450;
1451; ATHLON-LABEL: select_or_b:
1452; ATHLON:       ## %bb.0: ## %entry
1453; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1454; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1455; ATHLON-NEXT:    orl %ecx, %eax
1456; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1457; ATHLON-NEXT:    cmovel %ecx, %eax
1458; ATHLON-NEXT:    retl
1459;
1460; MCU-LABEL: select_or_b:
1461; MCU:       # %bb.0: # %entry
1462; MCU-NEXT:    testb $1, %cl
1463; MCU-NEXT:    je .LBB28_2
1464; MCU-NEXT:  # %bb.1:
1465; MCU-NEXT:    orl %edx, %eax
1466; MCU-NEXT:  .LBB28_2: # %entry
1467; MCU-NEXT:    retl
1468entry:
1469 %and = and i8 %cond, 1
1470 %cmp10 = icmp ne i8 %and, 1
1471 %0 = or i32 %B, %A
1472 %1 = select i1 %cmp10, i32 %A, i32 %0
1473 ret i32 %1
1474}
1475
1476define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1477; CHECK-LABEL: select_or_1:
1478; CHECK:       ## %bb.0: ## %entry
1479; CHECK-NEXT:    movl %esi, %eax
1480; CHECK-NEXT:    orl %edi, %eax
1481; CHECK-NEXT:    testb $1, %dl
1482; CHECK-NEXT:    cmovel %edi, %eax
1483; CHECK-NEXT:    retq
1484;
1485; ATHLON-LABEL: select_or_1:
1486; ATHLON:       ## %bb.0: ## %entry
1487; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1488; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1489; ATHLON-NEXT:    orl %ecx, %eax
1490; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1491; ATHLON-NEXT:    cmovel %ecx, %eax
1492; ATHLON-NEXT:    retl
1493;
1494; MCU-LABEL: select_or_1:
1495; MCU:       # %bb.0: # %entry
1496; MCU-NEXT:    andl $1, %ecx
1497; MCU-NEXT:    negl %ecx
1498; MCU-NEXT:    andl %edx, %ecx
1499; MCU-NEXT:    orl %ecx, %eax
1500; MCU-NEXT:    retl
1501entry:
1502 %and = and i32 %cond, 1
1503 %cmp10 = icmp eq i32 %and, 0
1504 %0 = or i32 %B, %A
1505 %1 = select i1 %cmp10, i32 %A, i32 %0
1506 ret i32 %1
1507}
1508
1509; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1510; icmp eq (and %cond, 1), 0
1511define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) {
1512; CHECK-LABEL: select_or_1b:
1513; CHECK:       ## %bb.0: ## %entry
1514; CHECK-NEXT:    movl %esi, %eax
1515; CHECK-NEXT:    orl %edi, %eax
1516; CHECK-NEXT:    testb $1, %dl
1517; CHECK-NEXT:    cmovel %edi, %eax
1518; CHECK-NEXT:    retq
1519;
1520; ATHLON-LABEL: select_or_1b:
1521; ATHLON:       ## %bb.0: ## %entry
1522; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
1523; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
1524; ATHLON-NEXT:    orl %ecx, %eax
1525; ATHLON-NEXT:    testb $1, {{[0-9]+}}(%esp)
1526; ATHLON-NEXT:    cmovel %ecx, %eax
1527; ATHLON-NEXT:    retl
1528;
1529; MCU-LABEL: select_or_1b:
1530; MCU:       # %bb.0: # %entry
1531; MCU-NEXT:    testb $1, %cl
1532; MCU-NEXT:    je .LBB30_2
1533; MCU-NEXT:  # %bb.1:
1534; MCU-NEXT:    orl %edx, %eax
1535; MCU-NEXT:  .LBB30_2: # %entry
1536; MCU-NEXT:    retl
1537entry:
1538 %and = and i32 %cond, 1
1539 %cmp10 = icmp ne i32 %and, 1
1540 %0 = or i32 %B, %A
1541 %1 = select i1 %cmp10, i32 %A, i32 %0
1542 ret i32 %1
1543}
1544