1# RUN: llc -mtriple=i386-unknown-unknown -mcpu=i486 %s -o - -run-pass greedy \
2# RUN:   -debug-only=regalloc 2>&1 | FileCheck %s
3# REQUIRES: asserts
4
5--- |
6  define void @fun() { ret void }
7
8  declare noalias nonnull i8* @_Znwj()
9  declare void @_ZNSt3__127__tree_balance_after_insertIPNS_16__tree_node_baseIPvEEEEvT_S5_()
10  declare zeroext i1 @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private14_end__commentsEv()
11  declare zeroext i1 @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private15_preEnd__authorEv()
12...
13---
14# A physreg should always only be hinted once per getRegAllocationHints() query.
15# CHECK: hints: $ebx $edi
16# CHECK-NOT: hints: $ebx $edi $ebx $edi
17name:            fun
18alignment:       16
19tracksRegLiveness: true
20registers:
21  - { id: 0, class: gr32 }
22  - { id: 1, class: gr32 }
23  - { id: 2, class: gr32 }
24  - { id: 3, class: gr32 }
25  - { id: 4, class: gr32 }
26  - { id: 5, class: gr32 }
27  - { id: 6, class: gr32 }
28  - { id: 7, class: gr32 }
29  - { id: 8, class: gr32 }
30  - { id: 9, class: gr32 }
31  - { id: 10, class: gr32 }
32  - { id: 11, class: gr32 }
33  - { id: 12, class: gr32 }
34  - { id: 13, class: gr32_abcd }
35  - { id: 14, class: gr8 }
36  - { id: 15, class: gr32_abcd }
37  - { id: 16, class: gr8 }
38  - { id: 17, class: gr32 }
39  - { id: 18, class: gr32_abcd }
40  - { id: 19, class: gr8 }
41  - { id: 20, class: gr32_abcd }
42  - { id: 21, class: gr8 }
43  - { id: 22, class: gr32_abcd }
44  - { id: 23, class: gr8 }
45  - { id: 24, class: gr32_abcd }
46  - { id: 25, class: gr8 }
47  - { id: 26, class: gr32_abcd }
48  - { id: 27, class: gr8 }
49  - { id: 28, class: gr32_abcd }
50  - { id: 29, class: gr8 }
51  - { id: 30, class: gr32_abcd }
52  - { id: 31, class: gr8 }
53  - { id: 32, class: gr32_abcd }
54  - { id: 33, class: gr8 }
55  - { id: 34, class: gr32 }
56  - { id: 35, class: gr32_abcd }
57  - { id: 36, class: gr8 }
58  - { id: 37, class: gr32 }
59  - { id: 38, class: gr32 }
60  - { id: 39, class: gr32_abcd }
61  - { id: 40, class: gr8 }
62  - { id: 41, class: gr32_abcd }
63  - { id: 42, class: gr8 }
64  - { id: 43, class: gr32_abcd }
65  - { id: 44, class: gr8 }
66  - { id: 45, class: gr32_abcd }
67  - { id: 46, class: gr8 }
68  - { id: 47, class: gr32_abcd }
69  - { id: 48, class: gr8 }
70  - { id: 49, class: gr8 }
71  - { id: 50, class: gr32_abcd }
72  - { id: 51, class: gr8 }
73  - { id: 52, class: gr32 }
74  - { id: 53, class: gr32 }
75  - { id: 54, class: gr32 }
76  - { id: 55, class: gr32 }
77  - { id: 56, class: gr32_abcd }
78  - { id: 57, class: gr8 }
79  - { id: 58, class: gr32_abcd }
80  - { id: 59, class: gr8 }
81  - { id: 60, class: gr32_abcd }
82  - { id: 61, class: gr8 }
83  - { id: 62, class: gr32_abcd }
84  - { id: 63, class: gr8 }
85  - { id: 64, class: gr32_abcd }
86  - { id: 65, class: gr8 }
87  - { id: 66, class: gr32_abcd }
88  - { id: 67, class: gr8 }
89  - { id: 68, class: gr32_abcd }
90  - { id: 69, class: gr8 }
91  - { id: 70, class: gr32_abcd }
92  - { id: 71, class: gr8 }
93  - { id: 72, class: gr32_abcd }
94  - { id: 73, class: gr8 }
95  - { id: 74, class: gr32 }
96  - { id: 75, class: gr32 }
97  - { id: 76, class: gr32_abcd }
98  - { id: 77, class: gr8 }
99  - { id: 78, class: gr32_abcd }
100  - { id: 79, class: gr32 }
101  - { id: 80, class: gr32 }
102  - { id: 81, class: gr32_abcd }
103  - { id: 82, class: gr32 }
104frameInfo:
105  maxAlignment:    4
106  hasCalls:        true
107fixedStack:
108  - { id: 0, size: 4, alignment: 4, stack-id: default, isImmutable: true }
109body:             |
110  bb.0:
111    successors: %bb.1(0x00000001), %bb.2(0x7fffffff)
112
113    %13:gr32_abcd = MOV32r0 implicit-def dead $eflags
114    TEST8rr %13.sub_8bit, %13.sub_8bit, implicit-def $eflags
115    JCC_1 %bb.2, 5, implicit killed $eflags
116    JMP_1 %bb.1
117
118  bb.1:
119    successors:
120
121
122  bb.2:
123    successors: %bb.4(0x7fffffff), %bb.3(0x00000001)
124
125    %15:gr32_abcd = MOV32r0 implicit-def dead $eflags
126    TEST8rr %15.sub_8bit, %15.sub_8bit, implicit-def $eflags
127    JCC_1 %bb.4, 5, implicit killed $eflags
128    JMP_1 %bb.3
129
130  bb.3:
131    successors:
132
133
134  bb.4:
135    successors: %bb.6(0x7fffffff), %bb.5(0x00000001)
136
137    %12:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg
138    %1:gr32 = LEA32r %12, 1, $noreg, 144, $noreg
139    MOV32mr undef %17:gr32, 1, $noreg, 0, $noreg, %1
140    %18:gr32_abcd = MOV32r0 implicit-def dead $eflags
141    TEST8rr %18.sub_8bit, %18.sub_8bit, implicit-def $eflags
142    JCC_1 %bb.6, 5, implicit killed $eflags
143    JMP_1 %bb.5
144
145  bb.5:
146    successors:
147
148
149  bb.6:
150    successors: %bb.7(0x00000001), %bb.8(0x7fffffff)
151
152    %20:gr32_abcd = MOV32r0 implicit-def dead $eflags
153    TEST8rr %20.sub_8bit, %20.sub_8bit, implicit-def $eflags
154    JCC_1 %bb.8, 5, implicit killed $eflags
155    JMP_1 %bb.7
156
157  bb.7:
158    successors:
159
160
161  bb.8:
162    successors: %bb.10(0x7fffffff), %bb.9(0x00000001)
163
164    %22:gr32_abcd = MOV32r0 implicit-def dead $eflags
165    TEST8rr %22.sub_8bit, %22.sub_8bit, implicit-def $eflags
166    JCC_1 %bb.10, 5, implicit killed $eflags
167    JMP_1 %bb.9
168
169  bb.9:
170    successors:
171
172
173  bb.10:
174    successors: %bb.12(0x7fffffff), %bb.11(0x00000001)
175
176    %24:gr32_abcd = MOV32r0 implicit-def dead $eflags
177    TEST8rr %24.sub_8bit, %24.sub_8bit, implicit-def $eflags
178    JCC_1 %bb.12, 5, implicit killed $eflags
179    JMP_1 %bb.11
180
181  bb.11:
182    successors:
183
184
185  bb.12:
186    successors: %bb.13(0x00000001), %bb.14(0x7fffffff)
187
188    %26:gr32_abcd = MOV32r0 implicit-def dead $eflags
189    TEST8rr %26.sub_8bit, %26.sub_8bit, implicit-def $eflags
190    JCC_1 %bb.14, 5, implicit killed $eflags
191    JMP_1 %bb.13
192
193  bb.13:
194    successors:
195
196
197  bb.14:
198    %0:gr32 = LEA32r %12, 1, $noreg, 80, $noreg
199    %28:gr32_abcd = MOV32r0 implicit-def dead $eflags
200    TEST8rr %28.sub_8bit, %28.sub_8bit, implicit-def $eflags
201    JCC_1 %bb.20, 5, implicit killed $eflags
202    JMP_1 %bb.15
203
204  bb.15:
205    successors: %bb.16(0x00000001), %bb.17(0x7fffffff)
206
207    %78:gr32_abcd = MOV32r0 implicit-def dead $eflags
208    TEST8rr %78.sub_8bit, %78.sub_8bit, implicit-def $eflags
209    JCC_1 %bb.17, 5, implicit killed $eflags
210    JMP_1 %bb.16
211
212  bb.16:
213    successors:
214
215
216  bb.17:
217    successors: %bb.18(0x7fffffff), %bb.19(0x00000001)
218
219    TEST8rr %78.sub_8bit, %78.sub_8bit, implicit-def $eflags
220    JCC_1 %bb.19, 4, implicit killed $eflags
221
222  bb.18:
223    %79:gr32 = LEA32r %12, 1, $noreg, 80, $noreg
224    JMP_1 %bb.21
225
226  bb.19:
227    successors:
228
229
230  bb.20:
231    %78:gr32_abcd = COPY %0
232    %79:gr32 = COPY %0
233
234  bb.21:
235    successors: %bb.22, %bb.23
236
237    %35:gr32_abcd = MOV32r0 implicit-def dead $eflags
238    TEST8rr %35.sub_8bit, %35.sub_8bit, implicit-def $eflags
239    %80:gr32 = IMPLICIT_DEF
240    JCC_1 %bb.23, 5, implicit killed $eflags
241    JMP_1 %bb.22
242
243  bb.22:
244    ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
245    CALLpcrel32 @_Znwj, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def $ssp, implicit-def $eax
246    ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
247    %80:gr32 = COPY killed $eax
248    MOV32mr undef %38:gr32, 1, $noreg, 0, $noreg, %78
249    MOV32mr %79, 1, $noreg, 0, $noreg, %80
250    ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
251    CALLpcrel32 @_ZNSt3__127__tree_balance_after_insertIPNS_16__tree_node_baseIPvEEEEvT_S5_, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def $ssp
252    ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
253
254  bb.23:
255    successors: %bb.24(0x00000001), %bb.25(0x7fffffff)
256
257    MOV32mi %80, 1, $noreg, 52, $noreg, @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private15_preEnd__authorEv
258    %39:gr32_abcd = MOV32r0 implicit-def dead $eflags
259    TEST8rr %39.sub_8bit, %39.sub_8bit, implicit-def $eflags
260    JCC_1 %bb.25, 5, implicit killed $eflags
261    JMP_1 %bb.24
262
263  bb.24:
264    successors:
265
266
267  bb.25:
268    successors: %bb.27(0x7fffffff), %bb.26(0x00000001)
269
270    %41:gr32_abcd = MOV32r0 implicit-def dead $eflags
271    TEST8rr %41.sub_8bit, %41.sub_8bit, implicit-def $eflags
272    JCC_1 %bb.27, 5, implicit killed $eflags
273    JMP_1 %bb.26
274
275  bb.26:
276    successors:
277
278
279  bb.27:
280    successors: %bb.29(0x7fffffff), %bb.28(0x00000001)
281
282    %43:gr32_abcd = MOV32r0 implicit-def dead $eflags
283    TEST8rr %43.sub_8bit, %43.sub_8bit, implicit-def $eflags
284    JCC_1 %bb.29, 5, implicit killed $eflags
285    JMP_1 %bb.28
286
287  bb.28:
288    successors:
289
290
291  bb.29:
292    successors: %bb.31(0x7fffffff), %bb.30(0x00000001)
293
294    %45:gr32_abcd = MOV32r0 implicit-def dead $eflags
295    TEST8rr %45.sub_8bit, %45.sub_8bit, implicit-def $eflags
296    JCC_1 %bb.31, 5, implicit killed $eflags
297    JMP_1 %bb.30
298
299  bb.30:
300    successors:
301
302
303  bb.31:
304    successors: %bb.32(0x00000001), %bb.33(0x7fffffff)
305
306    %47:gr32_abcd = MOV32r0 implicit-def dead $eflags
307    TEST8rr %47.sub_8bit, %47.sub_8bit, implicit-def $eflags
308    JCC_1 %bb.33, 5, implicit killed $eflags
309    JMP_1 %bb.32
310
311  bb.32:
312    successors:
313
314
315  bb.33:
316    successors: %bb.37(0x30000000), %bb.34(0x50000000)
317
318    %49:gr8 = MOV8ri 1
319    TEST8rr %49, %49, implicit-def $eflags
320    JCC_1 %bb.37, 5, implicit killed $eflags
321    JMP_1 %bb.34
322
323  bb.34:
324    successors: %bb.36(0x00000001), %bb.35(0x7fffffff)
325
326    %81:gr32_abcd = MOV32r0 implicit-def dead $eflags
327    TEST8rr %81.sub_8bit, %81.sub_8bit, implicit-def $eflags
328    JCC_1 %bb.36, 4, implicit killed $eflags
329
330  bb.35:
331    %82:gr32 = LEA32r %12, 1, $noreg, 80, $noreg
332    JMP_1 %bb.38
333
334  bb.36:
335    successors:
336
337
338  bb.37:
339    %81:gr32_abcd = COPY %0
340    %82:gr32 = COPY %0
341
342  bb.38:
343    successors: %bb.40(0x7fffffff), %bb.39(0x00000001)
344
345    ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
346    CALLpcrel32 @_Znwj, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def $ssp, implicit-def $eax
347    ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
348    %52:gr32 = COPY killed $eax
349    MOV32mr undef %53:gr32, 1, $noreg, 0, $noreg, %81
350    MOV32mr %82, 1, $noreg, 0, $noreg, %52
351    ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
352    CALLpcrel32 @_ZNSt3__127__tree_balance_after_insertIPNS_16__tree_node_baseIPvEEEEvT_S5_, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def $ssp
353    ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
354    MOV32mi %52, 1, $noreg, 36, $noreg, @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private14_end__commentsEv
355    MOV32mr undef %54:gr32, 1, $noreg, 0, $noreg, %1
356    %55:gr32 = MOV32rm %12, 1, $noreg, 140, $noreg
357    CMP32mi8 %55, 1, $noreg, 0, $noreg, 0, implicit-def $eflags
358    JCC_1 %bb.40, 4, implicit killed $eflags
359    JMP_1 %bb.39
360
361  bb.39:
362    successors:
363
364
365  bb.40:
366    successors: %bb.42(0x00000001), %bb.41(0x7fffffff)
367
368    %56:gr32_abcd = MOV32r0 implicit-def dead $eflags
369    TEST8rr %56.sub_8bit, %56.sub_8bit, implicit-def $eflags
370    JCC_1 %bb.42, 5, implicit killed $eflags
371    JMP_1 %bb.41
372
373  bb.41:
374    successors: %bb.43(0x00000001), %bb.44(0x7fffffff)
375
376    %58:gr32_abcd = MOV32r0 implicit-def dead $eflags
377    TEST8rr %58.sub_8bit, %58.sub_8bit, implicit-def $eflags
378    JCC_1 %bb.43, 5, implicit killed $eflags
379    JMP_1 %bb.44
380
381  bb.42:
382    successors:
383
384
385  bb.43:
386    successors:
387
388
389  bb.44:
390    successors: %bb.45(0x00000001), %bb.46(0x7fffffff)
391
392    %60:gr32_abcd = MOV32r0 implicit-def dead $eflags
393    TEST8rr %60.sub_8bit, %60.sub_8bit, implicit-def $eflags
394    JCC_1 %bb.46, 5, implicit killed $eflags
395    JMP_1 %bb.45
396
397  bb.45:
398    successors:
399
400
401  bb.46:
402    successors: %bb.48(0x7fffffff), %bb.47(0x00000001)
403
404    %62:gr32_abcd = MOV32r0 implicit-def dead $eflags
405    TEST8rr %62.sub_8bit, %62.sub_8bit, implicit-def $eflags
406    JCC_1 %bb.48, 5, implicit killed $eflags
407    JMP_1 %bb.47
408
409  bb.47:
410    successors:
411
412
413  bb.48:
414    successors: %bb.50(0x7fffffff), %bb.49(0x00000001)
415
416    %64:gr32_abcd = MOV32r0 implicit-def dead $eflags
417    TEST8rr %64.sub_8bit, %64.sub_8bit, implicit-def $eflags
418    JCC_1 %bb.50, 5, implicit killed $eflags
419    JMP_1 %bb.49
420
421  bb.49:
422    successors:
423
424
425  bb.50:
426    successors: %bb.51(0x00000001), %bb.52(0x7fffffff)
427
428    %66:gr32_abcd = MOV32r0 implicit-def dead $eflags
429    TEST8rr %66.sub_8bit, %66.sub_8bit, implicit-def $eflags
430    JCC_1 %bb.52, 5, implicit killed $eflags
431    JMP_1 %bb.51
432
433  bb.51:
434    successors:
435
436
437  bb.52:
438    successors: %bb.54(0x7fffffff), %bb.53(0x00000001)
439
440    %68:gr32_abcd = MOV32r0 implicit-def dead $eflags
441    TEST8rr %68.sub_8bit, %68.sub_8bit, implicit-def $eflags
442    JCC_1 %bb.54, 5, implicit killed $eflags
443    JMP_1 %bb.53
444
445  bb.53:
446    successors:
447
448
449  bb.54:
450    successors: %bb.55(0x00000001), %bb.56(0x7fffffff)
451
452    %70:gr32_abcd = MOV32r0 implicit-def dead $eflags
453    TEST8rr %70.sub_8bit, %70.sub_8bit, implicit-def $eflags
454    JCC_1 %bb.56, 5, implicit killed $eflags
455    JMP_1 %bb.55
456
457  bb.55:
458    successors:
459
460
461  bb.56:
462    successors: %bb.57(0x00000001), %bb.58(0x7fffffff)
463
464    %72:gr32_abcd = MOV32r0 implicit-def dead $eflags
465    TEST8rr %72.sub_8bit, %72.sub_8bit, implicit-def $eflags
466    JCC_1 %bb.58, 5, implicit killed $eflags
467    JMP_1 %bb.57
468
469  bb.57:
470    successors:
471
472
473  bb.58:
474    successors: %bb.62(0x00000001), %bb.59(0x7fffffff)
475
476    CMP32mi8 %0, 1, $noreg, 0, $noreg, 0, implicit-def $eflags
477    JCC_1 %bb.62, 4, implicit killed $eflags
478    JMP_1 %bb.59
479
480  bb.59:
481
482  bb.60:
483    successors: %bb.60(0x7fffffff), %bb.61(0x00000001)
484
485    CMP32ri undef %75:gr32, 95406325, implicit-def $eflags
486    JCC_1 %bb.61, 2, implicit killed $eflags
487    JMP_1 %bb.60
488
489  bb.61:
490    successors:
491
492
493  bb.62:
494    successors: %bb.63, %bb.64
495
496    %76:gr32_abcd = MOV32r0 implicit-def dead $eflags
497    TEST8rr %76.sub_8bit, %76.sub_8bit, implicit-def $eflags
498    JCC_1 %bb.64, 5, implicit killed $eflags
499    JMP_1 %bb.63
500
501  bb.63:
502    successors:
503
504
505  bb.64:
506
507...
508