1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
3
4define i8 @shl_i8(i8 %a, i8 %b) {
5; CHECK-LABEL: shl_i8:
6; CHECK:       ## %bb.0:
7; CHECK-NEXT:    movl %esi, %ecx
8; CHECK-NEXT:    movl %edi, %eax
9; CHECK-NEXT:    ## kill: def $cl killed $cl killed $ecx
10; CHECK-NEXT:    shlb %cl, %al
11; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
12; CHECK-NEXT:    retq
13  %c = shl i8 %a, %b
14  ret i8 %c
15}
16
17define i16 @shl_i16(i16 %a, i16 %b) {
18; CHECK-LABEL: shl_i16:
19; CHECK:       ## %bb.0:
20; CHECK-NEXT:    movl %esi, %ecx
21; CHECK-NEXT:    movl %edi, %eax
22; CHECK-NEXT:    ## kill: def $cx killed $cx killed $ecx
23; CHECK-NEXT:    ## kill: def $cl killed $cx
24; CHECK-NEXT:    shlw %cl, %ax
25; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
26; CHECK-NEXT:    retq
27  %c = shl i16 %a, %b
28  ret i16 %c
29}
30
31define i32 @shl_i32(i32 %a, i32 %b) {
32; CHECK-LABEL: shl_i32:
33; CHECK:       ## %bb.0:
34; CHECK-NEXT:    movl %esi, %ecx
35; CHECK-NEXT:    movl %edi, %eax
36; CHECK-NEXT:    ## kill: def $cl killed $ecx
37; CHECK-NEXT:    shll %cl, %eax
38; CHECK-NEXT:    retq
39  %c = shl i32 %a, %b
40  ret i32 %c
41}
42
43define i64 @shl_i64(i64 %a, i64 %b) {
44; CHECK-LABEL: shl_i64:
45; CHECK:       ## %bb.0:
46; CHECK-NEXT:    movq %rsi, %rcx
47; CHECK-NEXT:    movq %rdi, %rax
48; CHECK-NEXT:    ## kill: def $cl killed $rcx
49; CHECK-NEXT:    shlq %cl, %rax
50; CHECK-NEXT:    retq
51  %c = shl i64 %a, %b
52  ret i64 %c
53}
54
55define i8 @lshr_i8(i8 %a, i8 %b) {
56; CHECK-LABEL: lshr_i8:
57; CHECK:       ## %bb.0:
58; CHECK-NEXT:    movl %esi, %ecx
59; CHECK-NEXT:    movl %edi, %eax
60; CHECK-NEXT:    ## kill: def $cl killed $cl killed $ecx
61; CHECK-NEXT:    shrb %cl, %al
62; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
63; CHECK-NEXT:    retq
64  %c = lshr i8 %a, %b
65  ret i8 %c
66}
67
68define i16 @lshr_i16(i16 %a, i16 %b) {
69; CHECK-LABEL: lshr_i16:
70; CHECK:       ## %bb.0:
71; CHECK-NEXT:    movl %esi, %ecx
72; CHECK-NEXT:    movl %edi, %eax
73; CHECK-NEXT:    ## kill: def $cx killed $cx killed $ecx
74; CHECK-NEXT:    ## kill: def $cl killed $cx
75; CHECK-NEXT:    shrw %cl, %ax
76; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
77; CHECK-NEXT:    retq
78  %c = lshr i16 %a, %b
79  ret i16 %c
80}
81
82define i32 @lshr_i32(i32 %a, i32 %b) {
83; CHECK-LABEL: lshr_i32:
84; CHECK:       ## %bb.0:
85; CHECK-NEXT:    movl %esi, %ecx
86; CHECK-NEXT:    movl %edi, %eax
87; CHECK-NEXT:    ## kill: def $cl killed $ecx
88; CHECK-NEXT:    shrl %cl, %eax
89; CHECK-NEXT:    retq
90  %c = lshr i32 %a, %b
91  ret i32 %c
92}
93
94define i64 @lshr_i64(i64 %a, i64 %b) {
95; CHECK-LABEL: lshr_i64:
96; CHECK:       ## %bb.0:
97; CHECK-NEXT:    movq %rsi, %rcx
98; CHECK-NEXT:    movq %rdi, %rax
99; CHECK-NEXT:    ## kill: def $cl killed $rcx
100; CHECK-NEXT:    shrq %cl, %rax
101; CHECK-NEXT:    retq
102  %c = lshr i64 %a, %b
103  ret i64 %c
104}
105
106define i8 @ashr_i8(i8 %a, i8 %b) {
107; CHECK-LABEL: ashr_i8:
108; CHECK:       ## %bb.0:
109; CHECK-NEXT:    movl %esi, %ecx
110; CHECK-NEXT:    movl %edi, %eax
111; CHECK-NEXT:    ## kill: def $cl killed $cl killed $ecx
112; CHECK-NEXT:    sarb %cl, %al
113; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
114; CHECK-NEXT:    retq
115  %c = ashr i8 %a, %b
116  ret i8 %c
117}
118
119define i16 @ashr_i16(i16 %a, i16 %b) {
120; CHECK-LABEL: ashr_i16:
121; CHECK:       ## %bb.0:
122; CHECK-NEXT:    movl %esi, %ecx
123; CHECK-NEXT:    movl %edi, %eax
124; CHECK-NEXT:    ## kill: def $cx killed $cx killed $ecx
125; CHECK-NEXT:    ## kill: def $cl killed $cx
126; CHECK-NEXT:    sarw %cl, %ax
127; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
128; CHECK-NEXT:    retq
129  %c = ashr i16 %a, %b
130  ret i16 %c
131}
132
133define i32 @ashr_i32(i32 %a, i32 %b) {
134; CHECK-LABEL: ashr_i32:
135; CHECK:       ## %bb.0:
136; CHECK-NEXT:    movl %esi, %ecx
137; CHECK-NEXT:    movl %edi, %eax
138; CHECK-NEXT:    ## kill: def $cl killed $ecx
139; CHECK-NEXT:    sarl %cl, %eax
140; CHECK-NEXT:    retq
141  %c = ashr i32 %a, %b
142  ret i32 %c
143}
144
145define i64 @ashr_i64(i64 %a, i64 %b) {
146; CHECK-LABEL: ashr_i64:
147; CHECK:       ## %bb.0:
148; CHECK-NEXT:    movq %rsi, %rcx
149; CHECK-NEXT:    movq %rdi, %rax
150; CHECK-NEXT:    ## kill: def $cl killed $rcx
151; CHECK-NEXT:    sarq %cl, %rax
152; CHECK-NEXT:    retq
153  %c = ashr i64 %a, %b
154  ret i64 %c
155}
156
157define i8 @shl_imm1_i8(i8 %a) {
158; CHECK-LABEL: shl_imm1_i8:
159; CHECK:       ## %bb.0:
160; CHECK-NEXT:    ## kill: def $edi killed $edi def $rdi
161; CHECK-NEXT:    leal (,%rdi,2), %eax
162; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
163; CHECK-NEXT:    retq
164  %c = shl i8 %a, 1
165  ret i8 %c
166}
167
168define i16 @shl_imm1_i16(i16 %a) {
169; CHECK-LABEL: shl_imm1_i16:
170; CHECK:       ## %bb.0:
171; CHECK-NEXT:    ## kill: def $edi killed $edi def $rdi
172; CHECK-NEXT:    leal (,%rdi,2), %eax
173; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
174; CHECK-NEXT:    retq
175  %c = shl i16 %a, 1
176  ret i16 %c
177}
178
179define i32 @shl_imm1_i32(i32 %a) {
180; CHECK-LABEL: shl_imm1_i32:
181; CHECK:       ## %bb.0:
182; CHECK-NEXT:    ## kill: def $edi killed $edi def $rdi
183; CHECK-NEXT:    leal (,%rdi,2), %eax
184; CHECK-NEXT:    retq
185  %c = shl i32 %a, 1
186  ret i32 %c
187}
188
189define i64 @shl_imm1_i64(i64 %a) {
190; CHECK-LABEL: shl_imm1_i64:
191; CHECK:       ## %bb.0:
192; CHECK-NEXT:    leaq (,%rdi,2), %rax
193; CHECK-NEXT:    retq
194  %c = shl i64 %a, 1
195  ret i64 %c
196}
197
198define i8 @lshr_imm1_i8(i8 %a) {
199; CHECK-LABEL: lshr_imm1_i8:
200; CHECK:       ## %bb.0:
201; CHECK-NEXT:    movl %edi, %eax
202; CHECK-NEXT:    shrb $1, %al
203; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
204; CHECK-NEXT:    retq
205  %c = lshr i8 %a, 1
206  ret i8 %c
207}
208
209define i16 @lshr_imm1_i16(i16 %a) {
210; CHECK-LABEL: lshr_imm1_i16:
211; CHECK:       ## %bb.0:
212; CHECK-NEXT:    movl %edi, %eax
213; CHECK-NEXT:    shrw $1, %ax
214; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
215; CHECK-NEXT:    retq
216  %c = lshr i16 %a, 1
217  ret i16 %c
218}
219
220define i32 @lshr_imm1_i32(i32 %a) {
221; CHECK-LABEL: lshr_imm1_i32:
222; CHECK:       ## %bb.0:
223; CHECK-NEXT:    movl %edi, %eax
224; CHECK-NEXT:    shrl $1, %eax
225; CHECK-NEXT:    retq
226  %c = lshr i32 %a, 1
227  ret i32 %c
228}
229
230define i64 @lshr_imm1_i64(i64 %a) {
231; CHECK-LABEL: lshr_imm1_i64:
232; CHECK:       ## %bb.0:
233; CHECK-NEXT:    movq %rdi, %rax
234; CHECK-NEXT:    shrq $1, %rax
235; CHECK-NEXT:    retq
236  %c = lshr i64 %a, 1
237  ret i64 %c
238}
239
240define i8 @ashr_imm1_i8(i8 %a) {
241; CHECK-LABEL: ashr_imm1_i8:
242; CHECK:       ## %bb.0:
243; CHECK-NEXT:    movl %edi, %eax
244; CHECK-NEXT:    sarb $1, %al
245; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
246; CHECK-NEXT:    retq
247  %c = ashr i8 %a, 1
248  ret i8 %c
249}
250
251define i16 @ashr_imm1_i16(i16 %a) {
252; CHECK-LABEL: ashr_imm1_i16:
253; CHECK:       ## %bb.0:
254; CHECK-NEXT:    movl %edi, %eax
255; CHECK-NEXT:    sarw $1, %ax
256; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
257; CHECK-NEXT:    retq
258  %c = ashr i16 %a, 1
259  ret i16 %c
260}
261
262define i32 @ashr_imm1_i32(i32 %a) {
263; CHECK-LABEL: ashr_imm1_i32:
264; CHECK:       ## %bb.0:
265; CHECK-NEXT:    movl %edi, %eax
266; CHECK-NEXT:    sarl $1, %eax
267; CHECK-NEXT:    retq
268  %c = ashr i32 %a, 1
269  ret i32 %c
270}
271
272define i64 @ashr_imm1_i64(i64 %a) {
273; CHECK-LABEL: ashr_imm1_i64:
274; CHECK:       ## %bb.0:
275; CHECK-NEXT:    movq %rdi, %rax
276; CHECK-NEXT:    sarq $1, %rax
277; CHECK-NEXT:    retq
278  %c = ashr i64 %a, 1
279  ret i64 %c
280}
281
282define i8 @shl_imm4_i8(i8 %a) {
283; CHECK-LABEL: shl_imm4_i8:
284; CHECK:       ## %bb.0:
285; CHECK-NEXT:    movl %edi, %eax
286; CHECK-NEXT:    shlb $4, %al
287; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
288; CHECK-NEXT:    retq
289  %c = shl i8 %a, 4
290  ret i8 %c
291}
292
293define i16 @shl_imm4_i16(i16 %a) {
294; CHECK-LABEL: shl_imm4_i16:
295; CHECK:       ## %bb.0:
296; CHECK-NEXT:    movl %edi, %eax
297; CHECK-NEXT:    shlw $4, %ax
298; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
299; CHECK-NEXT:    retq
300  %c = shl i16 %a, 4
301  ret i16 %c
302}
303
304define i32 @shl_imm4_i32(i32 %a) {
305; CHECK-LABEL: shl_imm4_i32:
306; CHECK:       ## %bb.0:
307; CHECK-NEXT:    movl %edi, %eax
308; CHECK-NEXT:    shll $4, %eax
309; CHECK-NEXT:    retq
310  %c = shl i32 %a, 4
311  ret i32 %c
312}
313
314define i64 @shl_imm4_i64(i64 %a) {
315; CHECK-LABEL: shl_imm4_i64:
316; CHECK:       ## %bb.0:
317; CHECK-NEXT:    movq %rdi, %rax
318; CHECK-NEXT:    shlq $4, %rax
319; CHECK-NEXT:    retq
320  %c = shl i64 %a, 4
321  ret i64 %c
322}
323
324define i8 @lshr_imm4_i8(i8 %a) {
325; CHECK-LABEL: lshr_imm4_i8:
326; CHECK:       ## %bb.0:
327; CHECK-NEXT:    movl %edi, %eax
328; CHECK-NEXT:    shrb $4, %al
329; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
330; CHECK-NEXT:    retq
331  %c = lshr i8 %a, 4
332  ret i8 %c
333}
334
335define i16 @lshr_imm4_i16(i16 %a) {
336; CHECK-LABEL: lshr_imm4_i16:
337; CHECK:       ## %bb.0:
338; CHECK-NEXT:    movl %edi, %eax
339; CHECK-NEXT:    shrw $4, %ax
340; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
341; CHECK-NEXT:    retq
342  %c = lshr i16 %a, 4
343  ret i16 %c
344}
345
346define i32 @lshr_imm4_i32(i32 %a) {
347; CHECK-LABEL: lshr_imm4_i32:
348; CHECK:       ## %bb.0:
349; CHECK-NEXT:    movl %edi, %eax
350; CHECK-NEXT:    shrl $4, %eax
351; CHECK-NEXT:    retq
352  %c = lshr i32 %a, 4
353  ret i32 %c
354}
355
356define i64 @lshr_imm4_i64(i64 %a) {
357; CHECK-LABEL: lshr_imm4_i64:
358; CHECK:       ## %bb.0:
359; CHECK-NEXT:    movq %rdi, %rax
360; CHECK-NEXT:    shrq $4, %rax
361; CHECK-NEXT:    retq
362  %c = lshr i64 %a, 4
363  ret i64 %c
364}
365
366define i8 @ashr_imm4_i8(i8 %a) {
367; CHECK-LABEL: ashr_imm4_i8:
368; CHECK:       ## %bb.0:
369; CHECK-NEXT:    movl %edi, %eax
370; CHECK-NEXT:    sarb $4, %al
371; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
372; CHECK-NEXT:    retq
373  %c = ashr i8 %a, 4
374  ret i8 %c
375}
376
377define i16 @ashr_imm4_i16(i16 %a) {
378; CHECK-LABEL: ashr_imm4_i16:
379; CHECK:       ## %bb.0:
380; CHECK-NEXT:    movl %edi, %eax
381; CHECK-NEXT:    sarw $4, %ax
382; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
383; CHECK-NEXT:    retq
384  %c = ashr i16 %a, 4
385  ret i16 %c
386}
387
388define i32 @ashr_imm4_i32(i32 %a) {
389; CHECK-LABEL: ashr_imm4_i32:
390; CHECK:       ## %bb.0:
391; CHECK-NEXT:    movl %edi, %eax
392; CHECK-NEXT:    sarl $4, %eax
393; CHECK-NEXT:    retq
394  %c = ashr i32 %a, 4
395  ret i32 %c
396}
397
398define i64 @ashr_imm4_i64(i64 %a) {
399; CHECK-LABEL: ashr_imm4_i64:
400; CHECK:       ## %bb.0:
401; CHECK-NEXT:    movq %rdi, %rax
402; CHECK-NEXT:    sarq $4, %rax
403; CHECK-NEXT:    retq
404  %c = ashr i64 %a, 4
405  ret i64 %c
406}
407
408; Make sure we don't crash on out of bounds i8 shifts.
409define i8 @PR36731(i8 %a) {
410; CHECK-LABEL: PR36731:
411; CHECK:       ## %bb.0:
412; CHECK-NEXT:    movl %edi, %eax
413; CHECK-NEXT:    movb $255, %cl
414; CHECK-NEXT:    shlb %cl, %al
415; CHECK-NEXT:    ## kill: def $al killed $al killed $eax
416; CHECK-NEXT:    retq
417  %b = shl i8 %a, -1
418  ret i8 %b
419}
420