1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2   | FileCheck %s --check-prefixes=SSE,SSE2
3; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
4; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx    | FileCheck %s --check-prefix=AVX
5
6define <2 x i64> @extract0_i32_zext_insert0_i64_undef(<4 x i32> %x) {
7; SSE2-LABEL: extract0_i32_zext_insert0_i64_undef:
8; SSE2:       # %bb.0:
9; SSE2-NEXT:    xorps %xmm1, %xmm1
10; SSE2-NEXT:    unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
11; SSE2-NEXT:    retq
12;
13; SSE41-LABEL: extract0_i32_zext_insert0_i64_undef:
14; SSE41:       # %bb.0:
15; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
16; SSE41-NEXT:    retq
17;
18; AVX-LABEL: extract0_i32_zext_insert0_i64_undef:
19; AVX:       # %bb.0:
20; AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
21; AVX-NEXT:    retq
22  %e = extractelement <4 x i32> %x, i32 0
23  %z = zext i32 %e to i64
24  %r = insertelement <2 x i64> undef, i64 %z, i32 0
25  ret <2 x i64> %r
26}
27
28define <2 x i64> @extract0_i32_zext_insert0_i64_zero(<4 x i32> %x) {
29; SSE2-LABEL: extract0_i32_zext_insert0_i64_zero:
30; SSE2:       # %bb.0:
31; SSE2-NEXT:    xorps %xmm1, %xmm1
32; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
33; SSE2-NEXT:    movaps %xmm1, %xmm0
34; SSE2-NEXT:    retq
35;
36; SSE41-LABEL: extract0_i32_zext_insert0_i64_zero:
37; SSE41:       # %bb.0:
38; SSE41-NEXT:    xorps %xmm1, %xmm1
39; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
40; SSE41-NEXT:    retq
41;
42; AVX-LABEL: extract0_i32_zext_insert0_i64_zero:
43; AVX:       # %bb.0:
44; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
45; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
46; AVX-NEXT:    retq
47  %e = extractelement <4 x i32> %x, i32 0
48  %z = zext i32 %e to i64
49  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
50  ret <2 x i64> %r
51}
52
53define <2 x i64> @extract1_i32_zext_insert0_i64_undef(<4 x i32> %x) {
54; SSE-LABEL: extract1_i32_zext_insert0_i64_undef:
55; SSE:       # %bb.0:
56; SSE-NEXT:    psrlq $32, %xmm0
57; SSE-NEXT:    retq
58;
59; AVX-LABEL: extract1_i32_zext_insert0_i64_undef:
60; AVX:       # %bb.0:
61; AVX-NEXT:    vpsrlq $32, %xmm0, %xmm0
62; AVX-NEXT:    retq
63  %e = extractelement <4 x i32> %x, i32 1
64  %z = zext i32 %e to i64
65  %r = insertelement <2 x i64> undef, i64 %z, i32 0
66  ret <2 x i64> %r
67}
68
69define <2 x i64> @extract1_i32_zext_insert0_i64_zero(<4 x i32> %x) {
70; SSE2-LABEL: extract1_i32_zext_insert0_i64_zero:
71; SSE2:       # %bb.0:
72; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
73; SSE2-NEXT:    pxor %xmm0, %xmm0
74; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
75; SSE2-NEXT:    retq
76;
77; SSE41-LABEL: extract1_i32_zext_insert0_i64_zero:
78; SSE41:       # %bb.0:
79; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
80; SSE41-NEXT:    pxor %xmm0, %xmm0
81; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
82; SSE41-NEXT:    retq
83;
84; AVX-LABEL: extract1_i32_zext_insert0_i64_zero:
85; AVX:       # %bb.0:
86; AVX-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1]
87; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
88; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
89; AVX-NEXT:    retq
90  %e = extractelement <4 x i32> %x, i32 1
91  %z = zext i32 %e to i64
92  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
93  ret <2 x i64> %r
94}
95
96define <2 x i64> @extract2_i32_zext_insert0_i64_undef(<4 x i32> %x) {
97; SSE-LABEL: extract2_i32_zext_insert0_i64_undef:
98; SSE:       # %bb.0:
99; SSE-NEXT:    xorps %xmm1, %xmm1
100; SSE-NEXT:    unpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
101; SSE-NEXT:    retq
102;
103; AVX-LABEL: extract2_i32_zext_insert0_i64_undef:
104; AVX:       # %bb.0:
105; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
106; AVX-NEXT:    vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
107; AVX-NEXT:    retq
108  %e = extractelement <4 x i32> %x, i32 2
109  %z = zext i32 %e to i64
110  %r = insertelement <2 x i64> undef, i64 %z, i32 0
111  ret <2 x i64> %r
112}
113
114define <2 x i64> @extract2_i32_zext_insert0_i64_zero(<4 x i32> %x) {
115; SSE2-LABEL: extract2_i32_zext_insert0_i64_zero:
116; SSE2:       # %bb.0:
117; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
118; SSE2-NEXT:    pxor %xmm0, %xmm0
119; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
120; SSE2-NEXT:    retq
121;
122; SSE41-LABEL: extract2_i32_zext_insert0_i64_zero:
123; SSE41:       # %bb.0:
124; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
125; SSE41-NEXT:    pxor %xmm0, %xmm0
126; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
127; SSE41-NEXT:    retq
128;
129; AVX-LABEL: extract2_i32_zext_insert0_i64_zero:
130; AVX:       # %bb.0:
131; AVX-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[2,3,2,3]
132; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
133; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
134; AVX-NEXT:    retq
135  %e = extractelement <4 x i32> %x, i32 2
136  %z = zext i32 %e to i64
137  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
138  ret <2 x i64> %r
139}
140
141define <2 x i64> @extract3_i32_zext_insert0_i64_undef(<4 x i32> %x) {
142; SSE-LABEL: extract3_i32_zext_insert0_i64_undef:
143; SSE:       # %bb.0:
144; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
145; SSE-NEXT:    retq
146;
147; AVX-LABEL: extract3_i32_zext_insert0_i64_undef:
148; AVX:       # %bb.0:
149; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
150; AVX-NEXT:    retq
151  %e = extractelement <4 x i32> %x, i32 3
152  %z = zext i32 %e to i64
153  %r = insertelement <2 x i64> undef, i64 %z, i32 0
154  ret <2 x i64> %r
155}
156
157define <2 x i64> @extract3_i32_zext_insert0_i64_zero(<4 x i32> %x) {
158; SSE-LABEL: extract3_i32_zext_insert0_i64_zero:
159; SSE:       # %bb.0:
160; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
161; SSE-NEXT:    retq
162;
163; AVX-LABEL: extract3_i32_zext_insert0_i64_zero:
164; AVX:       # %bb.0:
165; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
166; AVX-NEXT:    retq
167  %e = extractelement <4 x i32> %x, i32 3
168  %z = zext i32 %e to i64
169  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
170  ret <2 x i64> %r
171}
172
173define <2 x i64> @extract0_i32_zext_insert1_i64_undef(<4 x i32> %x) {
174; SSE2-LABEL: extract0_i32_zext_insert1_i64_undef:
175; SSE2:       # %bb.0:
176; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
177; SSE2-NEXT:    pxor %xmm1, %xmm1
178; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
179; SSE2-NEXT:    retq
180;
181; SSE41-LABEL: extract0_i32_zext_insert1_i64_undef:
182; SSE41:       # %bb.0:
183; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
184; SSE41-NEXT:    pxor %xmm0, %xmm0
185; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7]
186; SSE41-NEXT:    retq
187;
188; AVX-LABEL: extract0_i32_zext_insert1_i64_undef:
189; AVX:       # %bb.0:
190; AVX-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[0,1,0,1]
191; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
192; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
193; AVX-NEXT:    retq
194  %e = extractelement <4 x i32> %x, i32 0
195  %z = zext i32 %e to i64
196  %r = insertelement <2 x i64> undef, i64 %z, i32 1
197  ret <2 x i64> %r
198}
199
200define <2 x i64> @extract0_i32_zext_insert1_i64_zero(<4 x i32> %x) {
201; SSE-LABEL: extract0_i32_zext_insert1_i64_zero:
202; SSE:       # %bb.0:
203; SSE-NEXT:    movd %xmm0, %eax
204; SSE-NEXT:    movq %rax, %xmm0
205; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
206; SSE-NEXT:    retq
207;
208; AVX-LABEL: extract0_i32_zext_insert1_i64_zero:
209; AVX:       # %bb.0:
210; AVX-NEXT:    vmovd %xmm0, %eax
211; AVX-NEXT:    vmovq %rax, %xmm0
212; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
213; AVX-NEXT:    retq
214  %e = extractelement <4 x i32> %x, i32 0
215  %z = zext i32 %e to i64
216  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
217  ret <2 x i64> %r
218}
219
220define <2 x i64> @extract1_i32_zext_insert1_i64_undef(<4 x i32> %x) {
221; SSE2-LABEL: extract1_i32_zext_insert1_i64_undef:
222; SSE2:       # %bb.0:
223; SSE2-NEXT:    xorps %xmm1, %xmm1
224; SSE2-NEXT:    unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
225; SSE2-NEXT:    retq
226;
227; SSE41-LABEL: extract1_i32_zext_insert1_i64_undef:
228; SSE41:       # %bb.0:
229; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
230; SSE41-NEXT:    retq
231;
232; AVX-LABEL: extract1_i32_zext_insert1_i64_undef:
233; AVX:       # %bb.0:
234; AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
235; AVX-NEXT:    retq
236  %e = extractelement <4 x i32> %x, i32 1
237  %z = zext i32 %e to i64
238  %r = insertelement <2 x i64> undef, i64 %z, i32 1
239  ret <2 x i64> %r
240}
241
242define <2 x i64> @extract1_i32_zext_insert1_i64_zero(<4 x i32> %x) {
243; SSE2-LABEL: extract1_i32_zext_insert1_i64_zero:
244; SSE2:       # %bb.0:
245; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
246; SSE2-NEXT:    movd %xmm0, %eax
247; SSE2-NEXT:    movq %rax, %xmm0
248; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
249; SSE2-NEXT:    retq
250;
251; SSE41-LABEL: extract1_i32_zext_insert1_i64_zero:
252; SSE41:       # %bb.0:
253; SSE41-NEXT:    extractps $1, %xmm0, %eax
254; SSE41-NEXT:    movq %rax, %xmm0
255; SSE41-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
256; SSE41-NEXT:    retq
257;
258; AVX-LABEL: extract1_i32_zext_insert1_i64_zero:
259; AVX:       # %bb.0:
260; AVX-NEXT:    vextractps $1, %xmm0, %eax
261; AVX-NEXT:    vmovq %rax, %xmm0
262; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
263; AVX-NEXT:    retq
264  %e = extractelement <4 x i32> %x, i32 1
265  %z = zext i32 %e to i64
266  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
267  ret <2 x i64> %r
268}
269
270define <2 x i64> @extract2_i32_zext_insert1_i64_undef(<4 x i32> %x) {
271; SSE2-LABEL: extract2_i32_zext_insert1_i64_undef:
272; SSE2:       # %bb.0:
273; SSE2-NEXT:    andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
274; SSE2-NEXT:    retq
275;
276; SSE41-LABEL: extract2_i32_zext_insert1_i64_undef:
277; SSE41:       # %bb.0:
278; SSE41-NEXT:    xorps %xmm1, %xmm1
279; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
280; SSE41-NEXT:    retq
281;
282; AVX-LABEL: extract2_i32_zext_insert1_i64_undef:
283; AVX:       # %bb.0:
284; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
285; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
286; AVX-NEXT:    retq
287  %e = extractelement <4 x i32> %x, i32 2
288  %z = zext i32 %e to i64
289  %r = insertelement <2 x i64> undef, i64 %z, i32 1
290  ret <2 x i64> %r
291}
292
293define <2 x i64> @extract2_i32_zext_insert1_i64_zero(<4 x i32> %x) {
294; SSE2-LABEL: extract2_i32_zext_insert1_i64_zero:
295; SSE2:       # %bb.0:
296; SSE2-NEXT:    andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
297; SSE2-NEXT:    retq
298;
299; SSE41-LABEL: extract2_i32_zext_insert1_i64_zero:
300; SSE41:       # %bb.0:
301; SSE41-NEXT:    xorps %xmm1, %xmm1
302; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2],xmm1[3]
303; SSE41-NEXT:    retq
304;
305; AVX-LABEL: extract2_i32_zext_insert1_i64_zero:
306; AVX:       # %bb.0:
307; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
308; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2],xmm1[3]
309; AVX-NEXT:    retq
310  %e = extractelement <4 x i32> %x, i32 2
311  %z = zext i32 %e to i64
312  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
313  ret <2 x i64> %r
314}
315
316define <2 x i64> @extract3_i32_zext_insert1_i64_undef(<4 x i32> %x) {
317; SSE-LABEL: extract3_i32_zext_insert1_i64_undef:
318; SSE:       # %bb.0:
319; SSE-NEXT:    psrlq $32, %xmm0
320; SSE-NEXT:    retq
321;
322; AVX-LABEL: extract3_i32_zext_insert1_i64_undef:
323; AVX:       # %bb.0:
324; AVX-NEXT:    vpsrlq $32, %xmm0, %xmm0
325; AVX-NEXT:    retq
326  %e = extractelement <4 x i32> %x, i32 3
327  %z = zext i32 %e to i64
328  %r = insertelement <2 x i64> undef, i64 %z, i32 1
329  ret <2 x i64> %r
330}
331
332define <2 x i64> @extract3_i32_zext_insert1_i64_zero(<4 x i32> %x) {
333; SSE2-LABEL: extract3_i32_zext_insert1_i64_zero:
334; SSE2:       # %bb.0:
335; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
336; SSE2-NEXT:    movd %xmm0, %eax
337; SSE2-NEXT:    movq %rax, %xmm0
338; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
339; SSE2-NEXT:    retq
340;
341; SSE41-LABEL: extract3_i32_zext_insert1_i64_zero:
342; SSE41:       # %bb.0:
343; SSE41-NEXT:    extractps $3, %xmm0, %eax
344; SSE41-NEXT:    movq %rax, %xmm0
345; SSE41-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
346; SSE41-NEXT:    retq
347;
348; AVX-LABEL: extract3_i32_zext_insert1_i64_zero:
349; AVX:       # %bb.0:
350; AVX-NEXT:    vextractps $3, %xmm0, %eax
351; AVX-NEXT:    vmovq %rax, %xmm0
352; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
353; AVX-NEXT:    retq
354  %e = extractelement <4 x i32> %x, i32 3
355  %z = zext i32 %e to i64
356  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
357  ret <2 x i64> %r
358}
359
360define <2 x i64> @extract0_i16_zext_insert0_i64_undef(<8 x i16> %x) {
361; SSE2-LABEL: extract0_i16_zext_insert0_i64_undef:
362; SSE2:       # %bb.0:
363; SSE2-NEXT:    pxor %xmm1, %xmm1
364; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
365; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
366; SSE2-NEXT:    retq
367;
368; SSE41-LABEL: extract0_i16_zext_insert0_i64_undef:
369; SSE41:       # %bb.0:
370; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
371; SSE41-NEXT:    retq
372;
373; AVX-LABEL: extract0_i16_zext_insert0_i64_undef:
374; AVX:       # %bb.0:
375; AVX-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
376; AVX-NEXT:    retq
377  %e = extractelement <8 x i16> %x, i32 0
378  %z = zext i16 %e to i64
379  %r = insertelement <2 x i64> undef, i64 %z, i32 0
380  ret <2 x i64> %r
381}
382
383define <2 x i64> @extract0_i16_zext_insert0_i64_zero(<8 x i16> %x) {
384; SSE2-LABEL: extract0_i16_zext_insert0_i64_zero:
385; SSE2:       # %bb.0:
386; SSE2-NEXT:    pextrw $0, %xmm0, %eax
387; SSE2-NEXT:    movd %eax, %xmm0
388; SSE2-NEXT:    retq
389;
390; SSE41-LABEL: extract0_i16_zext_insert0_i64_zero:
391; SSE41:       # %bb.0:
392; SSE41-NEXT:    pxor %xmm1, %xmm1
393; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
394; SSE41-NEXT:    retq
395;
396; AVX-LABEL: extract0_i16_zext_insert0_i64_zero:
397; AVX:       # %bb.0:
398; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
399; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
400; AVX-NEXT:    retq
401  %e = extractelement <8 x i16> %x, i32 0
402  %z = zext i16 %e to i64
403  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
404  ret <2 x i64> %r
405}
406
407define <2 x i64> @extract1_i16_zext_insert0_i64_undef(<8 x i16> %x) {
408; SSE-LABEL: extract1_i16_zext_insert0_i64_undef:
409; SSE:       # %bb.0:
410; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
411; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
412; SSE-NEXT:    retq
413;
414; AVX-LABEL: extract1_i16_zext_insert0_i64_undef:
415; AVX:       # %bb.0:
416; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
417; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
418; AVX-NEXT:    retq
419  %e = extractelement <8 x i16> %x, i32 1
420  %z = zext i16 %e to i64
421  %r = insertelement <2 x i64> undef, i64 %z, i32 0
422  ret <2 x i64> %r
423}
424
425define <2 x i64> @extract1_i16_zext_insert0_i64_zero(<8 x i16> %x) {
426; SSE-LABEL: extract1_i16_zext_insert0_i64_zero:
427; SSE:       # %bb.0:
428; SSE-NEXT:    pextrw $1, %xmm0, %eax
429; SSE-NEXT:    movd %eax, %xmm0
430; SSE-NEXT:    retq
431;
432; AVX-LABEL: extract1_i16_zext_insert0_i64_zero:
433; AVX:       # %bb.0:
434; AVX-NEXT:    vpextrw $1, %xmm0, %eax
435; AVX-NEXT:    vmovd %eax, %xmm0
436; AVX-NEXT:    retq
437  %e = extractelement <8 x i16> %x, i32 1
438  %z = zext i16 %e to i64
439  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
440  ret <2 x i64> %r
441}
442
443define <2 x i64> @extract2_i16_zext_insert0_i64_undef(<8 x i16> %x) {
444; SSE-LABEL: extract2_i16_zext_insert0_i64_undef:
445; SSE:       # %bb.0:
446; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
447; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
448; SSE-NEXT:    retq
449;
450; AVX-LABEL: extract2_i16_zext_insert0_i64_undef:
451; AVX:       # %bb.0:
452; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
453; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
454; AVX-NEXT:    retq
455  %e = extractelement <8 x i16> %x, i32 2
456  %z = zext i16 %e to i64
457  %r = insertelement <2 x i64> undef, i64 %z, i32 0
458  ret <2 x i64> %r
459}
460
461define <2 x i64> @extract2_i16_zext_insert0_i64_zero(<8 x i16> %x) {
462; SSE-LABEL: extract2_i16_zext_insert0_i64_zero:
463; SSE:       # %bb.0:
464; SSE-NEXT:    pextrw $2, %xmm0, %eax
465; SSE-NEXT:    movd %eax, %xmm0
466; SSE-NEXT:    retq
467;
468; AVX-LABEL: extract2_i16_zext_insert0_i64_zero:
469; AVX:       # %bb.0:
470; AVX-NEXT:    vpextrw $2, %xmm0, %eax
471; AVX-NEXT:    vmovd %eax, %xmm0
472; AVX-NEXT:    retq
473  %e = extractelement <8 x i16> %x, i32 2
474  %z = zext i16 %e to i64
475  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
476  ret <2 x i64> %r
477}
478
479define <2 x i64> @extract3_i16_zext_insert0_i64_undef(<8 x i16> %x) {
480; SSE-LABEL: extract3_i16_zext_insert0_i64_undef:
481; SSE:       # %bb.0:
482; SSE-NEXT:    psrlq $48, %xmm0
483; SSE-NEXT:    retq
484;
485; AVX-LABEL: extract3_i16_zext_insert0_i64_undef:
486; AVX:       # %bb.0:
487; AVX-NEXT:    vpsrlq $48, %xmm0, %xmm0
488; AVX-NEXT:    retq
489  %e = extractelement <8 x i16> %x, i32 3
490  %z = zext i16 %e to i64
491  %r = insertelement <2 x i64> undef, i64 %z, i32 0
492  ret <2 x i64> %r
493}
494
495define <2 x i64> @extract3_i16_zext_insert0_i64_zero(<8 x i16> %x) {
496; SSE-LABEL: extract3_i16_zext_insert0_i64_zero:
497; SSE:       # %bb.0:
498; SSE-NEXT:    pextrw $3, %xmm0, %eax
499; SSE-NEXT:    movd %eax, %xmm0
500; SSE-NEXT:    retq
501;
502; AVX-LABEL: extract3_i16_zext_insert0_i64_zero:
503; AVX:       # %bb.0:
504; AVX-NEXT:    vpextrw $3, %xmm0, %eax
505; AVX-NEXT:    vmovd %eax, %xmm0
506; AVX-NEXT:    retq
507  %e = extractelement <8 x i16> %x, i32 3
508  %z = zext i16 %e to i64
509  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
510  ret <2 x i64> %r
511}
512
513define <2 x i64> @extract0_i16_zext_insert1_i64_undef(<8 x i16> %x) {
514; SSE2-LABEL: extract0_i16_zext_insert1_i64_undef:
515; SSE2:       # %bb.0:
516; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1]
517; SSE2-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
518; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
519; SSE2-NEXT:    retq
520;
521; SSE41-LABEL: extract0_i16_zext_insert1_i64_undef:
522; SSE41:       # %bb.0:
523; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
524; SSE41-NEXT:    pxor %xmm0, %xmm0
525; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4],xmm0[5,6,7]
526; SSE41-NEXT:    retq
527;
528; AVX-LABEL: extract0_i16_zext_insert1_i64_undef:
529; AVX:       # %bb.0:
530; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
531; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
532; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
533; AVX-NEXT:    retq
534  %e = extractelement <8 x i16> %x, i32 0
535  %z = zext i16 %e to i64
536  %r = insertelement <2 x i64> undef, i64 %z, i32 1
537  ret <2 x i64> %r
538}
539
540define <2 x i64> @extract0_i16_zext_insert1_i64_zero(<8 x i16> %x) {
541; SSE-LABEL: extract0_i16_zext_insert1_i64_zero:
542; SSE:       # %bb.0:
543; SSE-NEXT:    pextrw $0, %xmm0, %eax
544; SSE-NEXT:    movq %rax, %xmm0
545; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
546; SSE-NEXT:    retq
547;
548; AVX-LABEL: extract0_i16_zext_insert1_i64_zero:
549; AVX:       # %bb.0:
550; AVX-NEXT:    vpextrw $0, %xmm0, %eax
551; AVX-NEXT:    vmovq %rax, %xmm0
552; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
553; AVX-NEXT:    retq
554  %e = extractelement <8 x i16> %x, i32 0
555  %z = zext i16 %e to i64
556  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
557  ret <2 x i64> %r
558}
559
560define <2 x i64> @extract1_i16_zext_insert1_i64_undef(<8 x i16> %x) {
561; SSE2-LABEL: extract1_i16_zext_insert1_i64_undef:
562; SSE2:       # %bb.0:
563; SSE2-NEXT:    pxor %xmm1, %xmm1
564; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
565; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
566; SSE2-NEXT:    retq
567;
568; SSE41-LABEL: extract1_i16_zext_insert1_i64_undef:
569; SSE41:       # %bb.0:
570; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
571; SSE41-NEXT:    retq
572;
573; AVX-LABEL: extract1_i16_zext_insert1_i64_undef:
574; AVX:       # %bb.0:
575; AVX-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
576; AVX-NEXT:    retq
577  %e = extractelement <8 x i16> %x, i32 1
578  %z = zext i16 %e to i64
579  %r = insertelement <2 x i64> undef, i64 %z, i32 1
580  ret <2 x i64> %r
581}
582
583define <2 x i64> @extract1_i16_zext_insert1_i64_zero(<8 x i16> %x) {
584; SSE-LABEL: extract1_i16_zext_insert1_i64_zero:
585; SSE:       # %bb.0:
586; SSE-NEXT:    pextrw $1, %xmm0, %eax
587; SSE-NEXT:    movq %rax, %xmm0
588; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
589; SSE-NEXT:    retq
590;
591; AVX-LABEL: extract1_i16_zext_insert1_i64_zero:
592; AVX:       # %bb.0:
593; AVX-NEXT:    vpextrw $1, %xmm0, %eax
594; AVX-NEXT:    vmovq %rax, %xmm0
595; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
596; AVX-NEXT:    retq
597  %e = extractelement <8 x i16> %x, i32 1
598  %z = zext i16 %e to i64
599  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
600  ret <2 x i64> %r
601}
602
603define <2 x i64> @extract2_i16_zext_insert1_i64_undef(<8 x i16> %x) {
604; SSE2-LABEL: extract2_i16_zext_insert1_i64_undef:
605; SSE2:       # %bb.0:
606; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
607; SSE2-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
608; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
609; SSE2-NEXT:    retq
610;
611; SSE41-LABEL: extract2_i16_zext_insert1_i64_undef:
612; SSE41:       # %bb.0:
613; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero
614; SSE41-NEXT:    pxor %xmm0, %xmm0
615; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4],xmm0[5,6,7]
616; SSE41-NEXT:    retq
617;
618; AVX-LABEL: extract2_i16_zext_insert1_i64_undef:
619; AVX:       # %bb.0:
620; AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
621; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
622; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
623; AVX-NEXT:    retq
624  %e = extractelement <8 x i16> %x, i32 2
625  %z = zext i16 %e to i64
626  %r = insertelement <2 x i64> undef, i64 %z, i32 1
627  ret <2 x i64> %r
628}
629
630define <2 x i64> @extract2_i16_zext_insert1_i64_zero(<8 x i16> %x) {
631; SSE-LABEL: extract2_i16_zext_insert1_i64_zero:
632; SSE:       # %bb.0:
633; SSE-NEXT:    pextrw $2, %xmm0, %eax
634; SSE-NEXT:    movq %rax, %xmm0
635; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
636; SSE-NEXT:    retq
637;
638; AVX-LABEL: extract2_i16_zext_insert1_i64_zero:
639; AVX:       # %bb.0:
640; AVX-NEXT:    vpextrw $2, %xmm0, %eax
641; AVX-NEXT:    vmovq %rax, %xmm0
642; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
643; AVX-NEXT:    retq
644  %e = extractelement <8 x i16> %x, i32 2
645  %z = zext i16 %e to i64
646  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
647  ret <2 x i64> %r
648}
649
650define <2 x i64> @extract3_i16_zext_insert1_i64_undef(<8 x i16> %x) {
651; SSE2-LABEL: extract3_i16_zext_insert1_i64_undef:
652; SSE2:       # %bb.0:
653; SSE2-NEXT:    psrlq $48, %xmm0
654; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
655; SSE2-NEXT:    retq
656;
657; SSE41-LABEL: extract3_i16_zext_insert1_i64_undef:
658; SSE41:       # %bb.0:
659; SSE41-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
660; SSE41-NEXT:    pxor %xmm1, %xmm1
661; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
662; SSE41-NEXT:    retq
663;
664; AVX-LABEL: extract3_i16_zext_insert1_i64_undef:
665; AVX:       # %bb.0:
666; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
667; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
668; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
669; AVX-NEXT:    retq
670  %e = extractelement <8 x i16> %x, i32 3
671  %z = zext i16 %e to i64
672  %r = insertelement <2 x i64> undef, i64 %z, i32 1
673  ret <2 x i64> %r
674}
675
676define <2 x i64> @extract3_i16_zext_insert1_i64_zero(<8 x i16> %x) {
677; SSE-LABEL: extract3_i16_zext_insert1_i64_zero:
678; SSE:       # %bb.0:
679; SSE-NEXT:    pextrw $3, %xmm0, %eax
680; SSE-NEXT:    movq %rax, %xmm0
681; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
682; SSE-NEXT:    retq
683;
684; AVX-LABEL: extract3_i16_zext_insert1_i64_zero:
685; AVX:       # %bb.0:
686; AVX-NEXT:    vpextrw $3, %xmm0, %eax
687; AVX-NEXT:    vmovq %rax, %xmm0
688; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
689; AVX-NEXT:    retq
690  %e = extractelement <8 x i16> %x, i32 3
691  %z = zext i16 %e to i64
692  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
693  ret <2 x i64> %r
694}
695
696