1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
3
4@sc64 = external dso_local global i64
5
6define void @atomic_fetch_add64() nounwind {
7; X32-LABEL: atomic_fetch_add64:
8; X32:       # %bb.0: # %entry
9; X32-NEXT:    pushl %ebx
10; X32-NEXT:    pushl %esi
11; X32-NEXT:    subl $40, %esp
12; X32-NEXT:    movl sc64+4, %edx
13; X32-NEXT:    movl sc64, %eax
14; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
15; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
16; X32-NEXT:    jmp .LBB0_1
17; X32-NEXT:  .LBB0_1: # %atomicrmw.start
18; X32-NEXT:    # =>This Inner Loop Header: Depth=1
19; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
20; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
21; X32-NEXT:    movl %eax, %ebx
22; X32-NEXT:    addl $1, %ebx
23; X32-NEXT:    movl %edx, %ecx
24; X32-NEXT:    adcl $0, %ecx
25; X32-NEXT:    lock cmpxchg8b sc64
26; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
27; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
28; X32-NEXT:    jne .LBB0_1
29; X32-NEXT:    jmp .LBB0_2
30; X32-NEXT:  .LBB0_2: # %atomicrmw.end
31; X32-NEXT:    movl sc64+4, %edx
32; X32-NEXT:    movl sc64, %eax
33; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
34; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
35; X32-NEXT:    jmp .LBB0_3
36; X32-NEXT:  .LBB0_3: # %atomicrmw.start2
37; X32-NEXT:    # =>This Inner Loop Header: Depth=1
38; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
39; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
40; X32-NEXT:    movl %eax, %ebx
41; X32-NEXT:    addl $3, %ebx
42; X32-NEXT:    movl %edx, %ecx
43; X32-NEXT:    adcl $0, %ecx
44; X32-NEXT:    lock cmpxchg8b sc64
45; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
46; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
47; X32-NEXT:    jne .LBB0_3
48; X32-NEXT:    jmp .LBB0_4
49; X32-NEXT:  .LBB0_4: # %atomicrmw.end1
50; X32-NEXT:    movl sc64+4, %edx
51; X32-NEXT:    movl sc64, %eax
52; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
53; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
54; X32-NEXT:    jmp .LBB0_5
55; X32-NEXT:  .LBB0_5: # %atomicrmw.start8
56; X32-NEXT:    # =>This Inner Loop Header: Depth=1
57; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
58; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
59; X32-NEXT:    movl %eax, %ebx
60; X32-NEXT:    addl $5, %ebx
61; X32-NEXT:    movl %edx, %ecx
62; X32-NEXT:    adcl $0, %ecx
63; X32-NEXT:    lock cmpxchg8b sc64
64; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
65; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
66; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
67; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
68; X32-NEXT:    jne .LBB0_5
69; X32-NEXT:    jmp .LBB0_6
70; X32-NEXT:  .LBB0_6: # %atomicrmw.end7
71; X32-NEXT:    movl sc64+4, %edx
72; X32-NEXT:    movl sc64, %eax
73; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
74; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
75; X32-NEXT:    jmp .LBB0_7
76; X32-NEXT:  .LBB0_7: # %atomicrmw.start14
77; X32-NEXT:    # =>This Inner Loop Header: Depth=1
78; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
79; X32-NEXT:    movl (%esp), %eax # 4-byte Reload
80; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
81; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
82; X32-NEXT:    movl %eax, %ebx
83; X32-NEXT:    addl %ecx, %ebx
84; X32-NEXT:    movl %edx, %ecx
85; X32-NEXT:    adcl %esi, %ecx
86; X32-NEXT:    lock cmpxchg8b sc64
87; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
88; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
89; X32-NEXT:    jne .LBB0_7
90; X32-NEXT:    jmp .LBB0_8
91; X32-NEXT:  .LBB0_8: # %atomicrmw.end13
92; X32-NEXT:    addl $40, %esp
93; X32-NEXT:    popl %esi
94; X32-NEXT:    popl %ebx
95; X32-NEXT:    retl
96entry:
97  %t1 = atomicrmw add  ptr @sc64, i64 1 acquire
98  %t2 = atomicrmw add  ptr @sc64, i64 3 acquire
99  %t3 = atomicrmw add  ptr @sc64, i64 5 acquire
100  %t4 = atomicrmw add  ptr @sc64, i64 %t3 acquire
101  ret void
102}
103
104define void @atomic_fetch_sub64() nounwind {
105; X32-LABEL: atomic_fetch_sub64:
106; X32:       # %bb.0:
107; X32-NEXT:    pushl %ebx
108; X32-NEXT:    pushl %esi
109; X32-NEXT:    subl $40, %esp
110; X32-NEXT:    movl sc64+4, %edx
111; X32-NEXT:    movl sc64, %eax
112; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
113; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
114; X32-NEXT:    jmp .LBB1_1
115; X32-NEXT:  .LBB1_1: # %atomicrmw.start
116; X32-NEXT:    # =>This Inner Loop Header: Depth=1
117; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
118; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
119; X32-NEXT:    movl %eax, %ebx
120; X32-NEXT:    addl $-1, %ebx
121; X32-NEXT:    movl %edx, %ecx
122; X32-NEXT:    adcl $-1, %ecx
123; X32-NEXT:    lock cmpxchg8b sc64
124; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
125; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
126; X32-NEXT:    jne .LBB1_1
127; X32-NEXT:    jmp .LBB1_2
128; X32-NEXT:  .LBB1_2: # %atomicrmw.end
129; X32-NEXT:    movl sc64+4, %edx
130; X32-NEXT:    movl sc64, %eax
131; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
132; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
133; X32-NEXT:    jmp .LBB1_3
134; X32-NEXT:  .LBB1_3: # %atomicrmw.start2
135; X32-NEXT:    # =>This Inner Loop Header: Depth=1
136; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
137; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
138; X32-NEXT:    movl %eax, %ebx
139; X32-NEXT:    addl $-3, %ebx
140; X32-NEXT:    movl %edx, %ecx
141; X32-NEXT:    adcl $-1, %ecx
142; X32-NEXT:    lock cmpxchg8b sc64
143; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
144; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
145; X32-NEXT:    jne .LBB1_3
146; X32-NEXT:    jmp .LBB1_4
147; X32-NEXT:  .LBB1_4: # %atomicrmw.end1
148; X32-NEXT:    movl sc64+4, %edx
149; X32-NEXT:    movl sc64, %eax
150; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
151; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
152; X32-NEXT:    jmp .LBB1_5
153; X32-NEXT:  .LBB1_5: # %atomicrmw.start8
154; X32-NEXT:    # =>This Inner Loop Header: Depth=1
155; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
156; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
157; X32-NEXT:    movl %eax, %ebx
158; X32-NEXT:    addl $-5, %ebx
159; X32-NEXT:    movl %edx, %ecx
160; X32-NEXT:    adcl $-1, %ecx
161; X32-NEXT:    lock cmpxchg8b sc64
162; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
163; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
164; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
165; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
166; X32-NEXT:    jne .LBB1_5
167; X32-NEXT:    jmp .LBB1_6
168; X32-NEXT:  .LBB1_6: # %atomicrmw.end7
169; X32-NEXT:    movl sc64+4, %edx
170; X32-NEXT:    movl sc64, %eax
171; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
172; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
173; X32-NEXT:    jmp .LBB1_7
174; X32-NEXT:  .LBB1_7: # %atomicrmw.start14
175; X32-NEXT:    # =>This Inner Loop Header: Depth=1
176; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
177; X32-NEXT:    movl (%esp), %eax # 4-byte Reload
178; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
179; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
180; X32-NEXT:    movl %eax, %ebx
181; X32-NEXT:    subl %ecx, %ebx
182; X32-NEXT:    movl %edx, %ecx
183; X32-NEXT:    sbbl %esi, %ecx
184; X32-NEXT:    lock cmpxchg8b sc64
185; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
186; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
187; X32-NEXT:    jne .LBB1_7
188; X32-NEXT:    jmp .LBB1_8
189; X32-NEXT:  .LBB1_8: # %atomicrmw.end13
190; X32-NEXT:    addl $40, %esp
191; X32-NEXT:    popl %esi
192; X32-NEXT:    popl %ebx
193; X32-NEXT:    retl
194  %t1 = atomicrmw sub  ptr @sc64, i64 1 acquire
195  %t2 = atomicrmw sub  ptr @sc64, i64 3 acquire
196  %t3 = atomicrmw sub  ptr @sc64, i64 5 acquire
197  %t4 = atomicrmw sub  ptr @sc64, i64 %t3 acquire
198  ret void
199}
200
201define void @atomic_fetch_and64() nounwind {
202; X32-LABEL: atomic_fetch_and64:
203; X32:       # %bb.0:
204; X32-NEXT:    pushl %ebx
205; X32-NEXT:    pushl %esi
206; X32-NEXT:    subl $32, %esp
207; X32-NEXT:    movl sc64+4, %edx
208; X32-NEXT:    movl sc64, %eax
209; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
210; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
211; X32-NEXT:    jmp .LBB2_1
212; X32-NEXT:  .LBB2_1: # %atomicrmw.start
213; X32-NEXT:    # =>This Inner Loop Header: Depth=1
214; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
215; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
216; X32-NEXT:    movl %eax, %ebx
217; X32-NEXT:    andl $3, %ebx
218; X32-NEXT:    xorl %ecx, %ecx
219; X32-NEXT:    lock cmpxchg8b sc64
220; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
221; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
222; X32-NEXT:    jne .LBB2_1
223; X32-NEXT:    jmp .LBB2_2
224; X32-NEXT:  .LBB2_2: # %atomicrmw.end
225; X32-NEXT:    movl sc64+4, %edx
226; X32-NEXT:    movl sc64, %eax
227; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
228; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
229; X32-NEXT:    jmp .LBB2_3
230; X32-NEXT:  .LBB2_3: # %atomicrmw.start2
231; X32-NEXT:    # =>This Inner Loop Header: Depth=1
232; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
233; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
234; X32-NEXT:    movl %eax, %ebx
235; X32-NEXT:    andl $1, %ebx
236; X32-NEXT:    movl %edx, %ecx
237; X32-NEXT:    andl $1, %ecx
238; X32-NEXT:    lock cmpxchg8b sc64
239; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
240; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
241; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
242; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
243; X32-NEXT:    jne .LBB2_3
244; X32-NEXT:    jmp .LBB2_4
245; X32-NEXT:  .LBB2_4: # %atomicrmw.end1
246; X32-NEXT:    movl sc64+4, %edx
247; X32-NEXT:    movl sc64, %eax
248; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
249; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
250; X32-NEXT:    jmp .LBB2_5
251; X32-NEXT:  .LBB2_5: # %atomicrmw.start8
252; X32-NEXT:    # =>This Inner Loop Header: Depth=1
253; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
254; X32-NEXT:    movl (%esp), %eax # 4-byte Reload
255; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
256; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
257; X32-NEXT:    movl %eax, %ebx
258; X32-NEXT:    andl %ecx, %ebx
259; X32-NEXT:    movl %edx, %ecx
260; X32-NEXT:    andl %esi, %ecx
261; X32-NEXT:    lock cmpxchg8b sc64
262; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
263; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
264; X32-NEXT:    jne .LBB2_5
265; X32-NEXT:    jmp .LBB2_6
266; X32-NEXT:  .LBB2_6: # %atomicrmw.end7
267; X32-NEXT:    addl $32, %esp
268; X32-NEXT:    popl %esi
269; X32-NEXT:    popl %ebx
270; X32-NEXT:    retl
271  %t1 = atomicrmw and  ptr @sc64, i64 3 acquire
272  %t2 = atomicrmw and  ptr @sc64, i64 4294967297 acquire
273  %t3 = atomicrmw and  ptr @sc64, i64 %t2 acquire
274  ret void
275}
276
277define void @atomic_fetch_or64() nounwind {
278; X32-LABEL: atomic_fetch_or64:
279; X32:       # %bb.0:
280; X32-NEXT:    pushl %ebx
281; X32-NEXT:    pushl %esi
282; X32-NEXT:    subl $32, %esp
283; X32-NEXT:    movl sc64+4, %edx
284; X32-NEXT:    movl sc64, %eax
285; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
286; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
287; X32-NEXT:    jmp .LBB3_1
288; X32-NEXT:  .LBB3_1: # %atomicrmw.start
289; X32-NEXT:    # =>This Inner Loop Header: Depth=1
290; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
291; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
292; X32-NEXT:    movl %eax, %ebx
293; X32-NEXT:    orl $3, %ebx
294; X32-NEXT:    movl %ecx, %edx
295; X32-NEXT:    lock cmpxchg8b sc64
296; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
297; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
298; X32-NEXT:    jne .LBB3_1
299; X32-NEXT:    jmp .LBB3_2
300; X32-NEXT:  .LBB3_2: # %atomicrmw.end
301; X32-NEXT:    movl sc64+4, %edx
302; X32-NEXT:    movl sc64, %eax
303; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
304; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
305; X32-NEXT:    jmp .LBB3_3
306; X32-NEXT:  .LBB3_3: # %atomicrmw.start2
307; X32-NEXT:    # =>This Inner Loop Header: Depth=1
308; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
309; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
310; X32-NEXT:    movl %eax, %ebx
311; X32-NEXT:    orl $1, %ebx
312; X32-NEXT:    movl %edx, %ecx
313; X32-NEXT:    orl $1, %ecx
314; X32-NEXT:    lock cmpxchg8b sc64
315; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
316; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
317; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
318; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
319; X32-NEXT:    jne .LBB3_3
320; X32-NEXT:    jmp .LBB3_4
321; X32-NEXT:  .LBB3_4: # %atomicrmw.end1
322; X32-NEXT:    movl sc64+4, %edx
323; X32-NEXT:    movl sc64, %eax
324; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
325; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
326; X32-NEXT:    jmp .LBB3_5
327; X32-NEXT:  .LBB3_5: # %atomicrmw.start8
328; X32-NEXT:    # =>This Inner Loop Header: Depth=1
329; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
330; X32-NEXT:    movl (%esp), %eax # 4-byte Reload
331; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
332; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
333; X32-NEXT:    movl %eax, %ebx
334; X32-NEXT:    orl %ecx, %ebx
335; X32-NEXT:    movl %edx, %ecx
336; X32-NEXT:    orl %esi, %ecx
337; X32-NEXT:    lock cmpxchg8b sc64
338; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
339; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
340; X32-NEXT:    jne .LBB3_5
341; X32-NEXT:    jmp .LBB3_6
342; X32-NEXT:  .LBB3_6: # %atomicrmw.end7
343; X32-NEXT:    addl $32, %esp
344; X32-NEXT:    popl %esi
345; X32-NEXT:    popl %ebx
346; X32-NEXT:    retl
347  %t1 = atomicrmw or   ptr @sc64, i64 3 acquire
348  %t2 = atomicrmw or   ptr @sc64, i64 4294967297 acquire
349  %t3 = atomicrmw or   ptr @sc64, i64 %t2 acquire
350  ret void
351}
352
353define void @atomic_fetch_xor64() nounwind {
354; X32-LABEL: atomic_fetch_xor64:
355; X32:       # %bb.0:
356; X32-NEXT:    pushl %ebx
357; X32-NEXT:    pushl %esi
358; X32-NEXT:    subl $32, %esp
359; X32-NEXT:    movl sc64+4, %edx
360; X32-NEXT:    movl sc64, %eax
361; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
362; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
363; X32-NEXT:    jmp .LBB4_1
364; X32-NEXT:  .LBB4_1: # %atomicrmw.start
365; X32-NEXT:    # =>This Inner Loop Header: Depth=1
366; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
367; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
368; X32-NEXT:    movl %eax, %ebx
369; X32-NEXT:    xorl $3, %ebx
370; X32-NEXT:    movl %ecx, %edx
371; X32-NEXT:    lock cmpxchg8b sc64
372; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
373; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
374; X32-NEXT:    jne .LBB4_1
375; X32-NEXT:    jmp .LBB4_2
376; X32-NEXT:  .LBB4_2: # %atomicrmw.end
377; X32-NEXT:    movl sc64+4, %edx
378; X32-NEXT:    movl sc64, %eax
379; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
380; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
381; X32-NEXT:    jmp .LBB4_3
382; X32-NEXT:  .LBB4_3: # %atomicrmw.start2
383; X32-NEXT:    # =>This Inner Loop Header: Depth=1
384; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
385; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
386; X32-NEXT:    movl %eax, %ebx
387; X32-NEXT:    xorl $1, %ebx
388; X32-NEXT:    movl %edx, %ecx
389; X32-NEXT:    xorl $1, %ecx
390; X32-NEXT:    lock cmpxchg8b sc64
391; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
392; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
393; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
394; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
395; X32-NEXT:    jne .LBB4_3
396; X32-NEXT:    jmp .LBB4_4
397; X32-NEXT:  .LBB4_4: # %atomicrmw.end1
398; X32-NEXT:    movl sc64+4, %edx
399; X32-NEXT:    movl sc64, %eax
400; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
401; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
402; X32-NEXT:    jmp .LBB4_5
403; X32-NEXT:  .LBB4_5: # %atomicrmw.start8
404; X32-NEXT:    # =>This Inner Loop Header: Depth=1
405; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
406; X32-NEXT:    movl (%esp), %eax # 4-byte Reload
407; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
408; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
409; X32-NEXT:    movl %eax, %ebx
410; X32-NEXT:    xorl %ecx, %ebx
411; X32-NEXT:    movl %edx, %ecx
412; X32-NEXT:    xorl %esi, %ecx
413; X32-NEXT:    lock cmpxchg8b sc64
414; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
415; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
416; X32-NEXT:    jne .LBB4_5
417; X32-NEXT:    jmp .LBB4_6
418; X32-NEXT:  .LBB4_6: # %atomicrmw.end7
419; X32-NEXT:    addl $32, %esp
420; X32-NEXT:    popl %esi
421; X32-NEXT:    popl %ebx
422; X32-NEXT:    retl
423  %t1 = atomicrmw xor  ptr @sc64, i64 3 acquire
424  %t2 = atomicrmw xor  ptr @sc64, i64 4294967297 acquire
425  %t3 = atomicrmw xor  ptr @sc64, i64 %t2 acquire
426  ret void
427}
428
429define void @atomic_fetch_nand64(i64 %x) nounwind {
430; X32-LABEL: atomic_fetch_nand64:
431; X32:       # %bb.0:
432; X32-NEXT:    pushl %ebx
433; X32-NEXT:    pushl %edi
434; X32-NEXT:    pushl %esi
435; X32-NEXT:    subl $16, %esp
436; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
437; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
438; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
439; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
440; X32-NEXT:    movl sc64+4, %edx
441; X32-NEXT:    movl sc64, %eax
442; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
443; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
444; X32-NEXT:    jmp .LBB5_1
445; X32-NEXT:  .LBB5_1: # %atomicrmw.start
446; X32-NEXT:    # =>This Inner Loop Header: Depth=1
447; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
448; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
449; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
450; X32-NEXT:    movl (%esp), %edi # 4-byte Reload
451; X32-NEXT:    movl %edx, %ecx
452; X32-NEXT:    andl %edi, %ecx
453; X32-NEXT:    movl %eax, %ebx
454; X32-NEXT:    andl %esi, %ebx
455; X32-NEXT:    notl %ebx
456; X32-NEXT:    notl %ecx
457; X32-NEXT:    lock cmpxchg8b sc64
458; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
459; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
460; X32-NEXT:    jne .LBB5_1
461; X32-NEXT:    jmp .LBB5_2
462; X32-NEXT:  .LBB5_2: # %atomicrmw.end
463; X32-NEXT:    addl $16, %esp
464; X32-NEXT:    popl %esi
465; X32-NEXT:    popl %edi
466; X32-NEXT:    popl %ebx
467; X32-NEXT:    retl
468  %t1 = atomicrmw nand ptr @sc64, i64 %x acquire
469  ret void
470}
471
472define void @atomic_fetch_max64(i64 %x) nounwind {
473; X32-LABEL: atomic_fetch_max64:
474; X32:       # %bb.0:
475; X32-NEXT:    pushl %ebx
476; X32-NEXT:    pushl %esi
477; X32-NEXT:    subl $16, %esp
478; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
479; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
480; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
481; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
482; X32-NEXT:    movl sc64+4, %edx
483; X32-NEXT:    movl sc64, %eax
484; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
485; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
486; X32-NEXT:    jmp .LBB6_1
487; X32-NEXT:  .LBB6_1: # %atomicrmw.start
488; X32-NEXT:    # =>This Inner Loop Header: Depth=1
489; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
490; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
491; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
492; X32-NEXT:    movl (%esp), %ecx # 4-byte Reload
493; X32-NEXT:    movl %ebx, %esi
494; X32-NEXT:    subl %eax, %esi
495; X32-NEXT:    movl %ecx, %esi
496; X32-NEXT:    sbbl %edx, %esi
497; X32-NEXT:    cmovll %edx, %ecx
498; X32-NEXT:    cmovll %eax, %ebx
499; X32-NEXT:    lock cmpxchg8b sc64
500; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
501; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
502; X32-NEXT:    jne .LBB6_1
503; X32-NEXT:    jmp .LBB6_2
504; X32-NEXT:  .LBB6_2: # %atomicrmw.end
505; X32-NEXT:    addl $16, %esp
506; X32-NEXT:    popl %esi
507; X32-NEXT:    popl %ebx
508; X32-NEXT:    retl
509  %t1 = atomicrmw max  ptr @sc64, i64 %x acquire
510  ret void
511}
512
513define void @atomic_fetch_min64(i64 %x) nounwind {
514; X32-LABEL: atomic_fetch_min64:
515; X32:       # %bb.0:
516; X32-NEXT:    pushl %ebx
517; X32-NEXT:    pushl %esi
518; X32-NEXT:    subl $16, %esp
519; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
520; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
521; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
522; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
523; X32-NEXT:    movl sc64+4, %edx
524; X32-NEXT:    movl sc64, %eax
525; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
526; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
527; X32-NEXT:    jmp .LBB7_1
528; X32-NEXT:  .LBB7_1: # %atomicrmw.start
529; X32-NEXT:    # =>This Inner Loop Header: Depth=1
530; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
531; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
532; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
533; X32-NEXT:    movl (%esp), %ecx # 4-byte Reload
534; X32-NEXT:    movl %ebx, %esi
535; X32-NEXT:    subl %eax, %esi
536; X32-NEXT:    movl %ecx, %esi
537; X32-NEXT:    sbbl %edx, %esi
538; X32-NEXT:    cmovgel %edx, %ecx
539; X32-NEXT:    cmovgel %eax, %ebx
540; X32-NEXT:    lock cmpxchg8b sc64
541; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
542; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
543; X32-NEXT:    jne .LBB7_1
544; X32-NEXT:    jmp .LBB7_2
545; X32-NEXT:  .LBB7_2: # %atomicrmw.end
546; X32-NEXT:    addl $16, %esp
547; X32-NEXT:    popl %esi
548; X32-NEXT:    popl %ebx
549; X32-NEXT:    retl
550  %t1 = atomicrmw min  ptr @sc64, i64 %x acquire
551  ret void
552}
553
554define void @atomic_fetch_umax64(i64 %x) nounwind {
555; X32-LABEL: atomic_fetch_umax64:
556; X32:       # %bb.0:
557; X32-NEXT:    pushl %ebx
558; X32-NEXT:    pushl %esi
559; X32-NEXT:    subl $16, %esp
560; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
561; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
562; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
563; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
564; X32-NEXT:    movl sc64+4, %edx
565; X32-NEXT:    movl sc64, %eax
566; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
567; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
568; X32-NEXT:    jmp .LBB8_1
569; X32-NEXT:  .LBB8_1: # %atomicrmw.start
570; X32-NEXT:    # =>This Inner Loop Header: Depth=1
571; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
572; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
573; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
574; X32-NEXT:    movl (%esp), %ecx # 4-byte Reload
575; X32-NEXT:    movl %ebx, %esi
576; X32-NEXT:    subl %eax, %esi
577; X32-NEXT:    movl %ecx, %esi
578; X32-NEXT:    sbbl %edx, %esi
579; X32-NEXT:    cmovbl %edx, %ecx
580; X32-NEXT:    cmovbl %eax, %ebx
581; X32-NEXT:    lock cmpxchg8b sc64
582; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
583; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
584; X32-NEXT:    jne .LBB8_1
585; X32-NEXT:    jmp .LBB8_2
586; X32-NEXT:  .LBB8_2: # %atomicrmw.end
587; X32-NEXT:    addl $16, %esp
588; X32-NEXT:    popl %esi
589; X32-NEXT:    popl %ebx
590; X32-NEXT:    retl
591  %t1 = atomicrmw umax ptr @sc64, i64 %x acquire
592  ret void
593}
594
595define void @atomic_fetch_umin64(i64 %x) nounwind {
596; X32-LABEL: atomic_fetch_umin64:
597; X32:       # %bb.0:
598; X32-NEXT:    pushl %ebx
599; X32-NEXT:    pushl %esi
600; X32-NEXT:    subl $16, %esp
601; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
602; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
603; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
604; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
605; X32-NEXT:    movl sc64+4, %edx
606; X32-NEXT:    movl sc64, %eax
607; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
608; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
609; X32-NEXT:    jmp .LBB9_1
610; X32-NEXT:  .LBB9_1: # %atomicrmw.start
611; X32-NEXT:    # =>This Inner Loop Header: Depth=1
612; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
613; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
614; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
615; X32-NEXT:    movl (%esp), %ecx # 4-byte Reload
616; X32-NEXT:    movl %ebx, %esi
617; X32-NEXT:    subl %eax, %esi
618; X32-NEXT:    movl %ecx, %esi
619; X32-NEXT:    sbbl %edx, %esi
620; X32-NEXT:    cmovael %edx, %ecx
621; X32-NEXT:    cmovael %eax, %ebx
622; X32-NEXT:    lock cmpxchg8b sc64
623; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
624; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
625; X32-NEXT:    jne .LBB9_1
626; X32-NEXT:    jmp .LBB9_2
627; X32-NEXT:  .LBB9_2: # %atomicrmw.end
628; X32-NEXT:    addl $16, %esp
629; X32-NEXT:    popl %esi
630; X32-NEXT:    popl %ebx
631; X32-NEXT:    retl
632  %t1 = atomicrmw umin ptr @sc64, i64 %x acquire
633  ret void
634}
635
636define void @atomic_fetch_cmpxchg64() nounwind {
637; X32-LABEL: atomic_fetch_cmpxchg64:
638; X32:       # %bb.0:
639; X32-NEXT:    pushl %ebx
640; X32-NEXT:    xorl %ecx, %ecx
641; X32-NEXT:    movl $1, %ebx
642; X32-NEXT:    movl %ecx, %eax
643; X32-NEXT:    movl %ecx, %edx
644; X32-NEXT:    lock cmpxchg8b sc64
645; X32-NEXT:    popl %ebx
646; X32-NEXT:    retl
647  %t1 = cmpxchg ptr @sc64, i64 0, i64 1 acquire acquire
648  ret void
649}
650
651define void @atomic_fetch_store64(i64 %x) nounwind {
652; X32-LABEL: atomic_fetch_store64:
653; X32:       # %bb.0:
654; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
655; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
656; X32-NEXT:    movd %ecx, %xmm0
657; X32-NEXT:    pinsrd $1, %eax, %xmm0
658; X32-NEXT:    movq %xmm0, sc64
659; X32-NEXT:    retl
660  store atomic i64 %x, ptr @sc64 release, align 8
661  ret void
662}
663
664define void @atomic_fetch_swap64(i64 %x) nounwind {
665; X32-LABEL: atomic_fetch_swap64:
666; X32:       # %bb.0:
667; X32-NEXT:    pushl %ebx
668; X32-NEXT:    subl $16, %esp
669; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
670; X32-NEXT:    movl %eax, (%esp) # 4-byte Spill
671; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
672; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
673; X32-NEXT:    movl sc64+4, %edx
674; X32-NEXT:    movl sc64, %eax
675; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
676; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
677; X32-NEXT:    jmp .LBB12_1
678; X32-NEXT:  .LBB12_1: # %atomicrmw.start
679; X32-NEXT:    # =>This Inner Loop Header: Depth=1
680; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
681; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
682; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
683; X32-NEXT:    movl (%esp), %ecx # 4-byte Reload
684; X32-NEXT:    lock cmpxchg8b sc64
685; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
686; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
687; X32-NEXT:    jne .LBB12_1
688; X32-NEXT:    jmp .LBB12_2
689; X32-NEXT:  .LBB12_2: # %atomicrmw.end
690; X32-NEXT:    addl $16, %esp
691; X32-NEXT:    popl %ebx
692; X32-NEXT:    retl
693  %t1 = atomicrmw xchg ptr @sc64, i64 %x acquire
694  ret void
695}
696