1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-int8,+amx-bf16,+avx512f -verify-machineinstrs | FileCheck %s
3
4define void @test_amx(ptr %pointer, ptr %base, i64 %stride) {
5; CHECK-LABEL: test_amx:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
8; CHECK-NEXT:    vmovups %zmm0, -{{[0-9]+}}(%rsp)
9; CHECK-NEXT:    movb $1, -{{[0-9]+}}(%rsp)
10; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
11; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
12; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
13; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
14; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
15; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
16; CHECK-NEXT:    ldtilecfg -{{[0-9]+}}(%rsp)
17; CHECK-NEXT:    movw $8, %ax
18; CHECK-NEXT:    tilezero %tmm0
19; CHECK-NEXT:    tileloadd (%rsi,%rdx), %tmm1
20; CHECK-NEXT:    tileloadd (%rsi,%rdx), %tmm2
21; CHECK-NEXT:    tdpbssd %tmm2, %tmm1, %tmm0
22; CHECK-NEXT:    tdpbsud %tmm2, %tmm1, %tmm0
23; CHECK-NEXT:    tdpbusd %tmm2, %tmm1, %tmm0
24; CHECK-NEXT:    tdpbuud %tmm2, %tmm1, %tmm0
25; CHECK-NEXT:    tdpbf16ps %tmm2, %tmm1, %tmm0
26; CHECK-NEXT:    tileloaddt1 (%rsi,%rdx), %tmm1
27; CHECK-NEXT:    tilestored %tmm0, (%rdi,%rdx)
28; CHECK-NEXT:    tilerelease
29; CHECK-NEXT:    vzeroupper
30; CHECK-NEXT:    retq
31  %c = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 8)
32  %a = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, ptr %base, i64 %stride)
33  %b = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, ptr %base, i64 %stride)
34  %d0 = call x86_amx @llvm.x86.tdpbssd.internal(i16 8, i16 8, i16 8, x86_amx %c, x86_amx %a, x86_amx %b)
35  %d1 = call x86_amx @llvm.x86.tdpbsud.internal(i16 8, i16 8, i16 8, x86_amx %d0, x86_amx %a, x86_amx %b)
36  %d2 = call x86_amx @llvm.x86.tdpbusd.internal(i16 8, i16 8, i16 8, x86_amx %d1, x86_amx %a, x86_amx %b)
37  %d3 = call x86_amx @llvm.x86.tdpbuud.internal(i16 8, i16 8, i16 8, x86_amx %d2, x86_amx %a, x86_amx %b)
38  %d4 = call x86_amx @llvm.x86.tdpbf16ps.internal(i16 8, i16 8, i16 8, x86_amx %d3, x86_amx %a, x86_amx %b)
39  %e = call x86_amx @llvm.x86.tileloaddt164.internal(i16 8, i16 8, ptr %base, i64 %stride)
40  call void @llvm.x86.tilestored64.internal(i16 8, i16 8, ptr %pointer, i64 %stride, x86_amx %d4)
41
42  ret void
43}
44
45declare x86_amx @llvm.x86.tilezero.internal(i16, i16)
46declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)
47declare x86_amx @llvm.x86.tileloaddt164.internal(i16, i16, ptr, i64)
48declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
49declare x86_amx @llvm.x86.tdpbsud.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
50declare x86_amx @llvm.x86.tdpbusd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
51declare x86_amx @llvm.x86.tdpbuud.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
52declare x86_amx @llvm.x86.tdpbf16ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
53declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx)
54