1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+unimplemented-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
3; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,NO-SIMD128
4
5; Test that basic SIMD128 vector manipulation operations assemble as expected.
6
7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
8target triple = "wasm32-unknown-unknown"
9
10; ==============================================================================
11; 16 x i8
12; ==============================================================================
13; CHECK-LABEL: const_v16i8:
14; NO-SIMD128-NOT: i8x16
15; SIMD128-VM-NOT: v128.const
16; SIMD128-NEXT: .functype const_v16i8 () -> (v128){{$}}
17; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
18; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
19; SIMD128-NEXT: return $pop[[R]]{{$}}
20define <16 x i8> @const_v16i8() {
21  ret <16 x i8> <i8 00, i8 01, i8 02, i8 03, i8 04, i8 05, i8 06, i8 07,
22                 i8 08, i8 09, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
23}
24
25; CHECK-LABEL: splat_v16i8:
26; NO-SIMD128-NOT: i8x16
27; SIMD128-NEXT: .functype splat_v16i8 (i32) -> (v128){{$}}
28; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}}
29; SIMD128-NEXT: return $pop[[R]]{{$}}
30define <16 x i8> @splat_v16i8(i8 %x) {
31  %v = insertelement <16 x i8> undef, i8 %x, i32 0
32  %res = shufflevector <16 x i8> %v, <16 x i8> undef,
33    <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0,
34                i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
35  ret <16 x i8> %res
36}
37
38; CHECK-LABEL: const_splat_v16i8:
39; SIMD128: i8x16.splat
40define <16 x i8> @const_splat_v16i8() {
41  ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
42                 i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
43}
44
45; CHECK-LABEL: extract_v16i8_s:
46; NO-SIMD128-NOT: i8x16
47; SIMD128-NEXT: .functype extract_v16i8_s (v128) -> (i32){{$}}
48; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}}
49; SIMD128-NEXT: return $pop[[R]]{{$}}
50define i32 @extract_v16i8_s(<16 x i8> %v) {
51  %elem = extractelement <16 x i8> %v, i8 13
52  %a = sext i8 %elem to i32
53  ret i32 %a
54}
55
56; CHECK-LABEL: extract_var_v16i8_s:
57; NO-SIMD128-NOT: i8x16
58; SIMD128-NEXT: .functype extract_var_v16i8_s (v128, i32) -> (i32){{$}}
59; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer
60; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
61; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
62; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
63; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
64; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15
65; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
66; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]
67; SIMD128-NEXT: i32.load8_s $push[[R:[0-9]+]]=, 0($pop[[L6]])
68; SIMD128-NEXT: return $pop[[R]]
69define i32 @extract_var_v16i8_s(<16 x i8> %v, i32 %i) {
70  %elem = extractelement <16 x i8> %v, i32 %i
71  %a = sext i8 %elem to i32
72  ret i32 %a
73}
74
75; CHECK-LABEL: extract_undef_v16i8_s:
76; NO-SIMD128-NOT: i8x16
77; SIMD128-NEXT: .functype extract_undef_v16i8_s (v128) -> (i32){{$}}
78; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
79; SIMD128-NEXT: return $pop[[R]]{{$}}
80define i32 @extract_undef_v16i8_s(<16 x i8> %v) {
81  %elem = extractelement <16 x i8> %v, i8 undef
82  %a = sext i8 %elem to i32
83  ret i32 %a
84}
85
86; CHECK-LABEL: extract_v16i8_u:
87; NO-SIMD128-NOT: i8x16
88; SIMD128-VM-NOT: i8x16.extract_lane_u
89; SIMD128-NEXT: .functype extract_v16i8_u (v128) -> (i32){{$}}
90; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
91; SIMD128-NEXT: return $pop[[R]]{{$}}
92define i32 @extract_v16i8_u(<16 x i8> %v) {
93  %elem = extractelement <16 x i8> %v, i8 13
94  %a = zext i8 %elem to i32
95  ret i32 %a
96}
97
98; CHECK-LABEL: extract_var_v16i8_u:
99; NO-SIMD128-NOT: i8x16
100; SIMD128-NEXT: .functype extract_var_v16i8_u (v128, i32) -> (i32){{$}}
101; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
102; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
103; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
104; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
105; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
106; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
107; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
108; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
109; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
110; SIMD128-NEXT: return $pop[[R]]{{$}}
111define i32 @extract_var_v16i8_u(<16 x i8> %v, i32 %i) {
112  %elem = extractelement <16 x i8> %v, i32 %i
113  %a = zext i8 %elem to i32
114  ret i32 %a
115}
116
117; CHECK-LABEL: extract_undef_v16i8_u:
118; NO-SIMD128-NOT: i8x16
119; SIMD128-VM-NOT: i8x16.extract_lane_u
120; SIMD128-NEXT: .functype extract_undef_v16i8_u (v128) -> (i32){{$}}
121; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
122; SIMD128-NEXT: return $pop[[R]]{{$}}
123define i32 @extract_undef_v16i8_u(<16 x i8> %v) {
124  %elem = extractelement <16 x i8> %v, i8 undef
125  %a = zext i8 %elem to i32
126  ret i32 %a
127}
128
129; CHECK-LABEL: extract_v16i8:
130; NO-SIMD128-NOT: i8x16
131; SIMD128-NEXT: .functype extract_v16i8 (v128) -> (i32){{$}}
132; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}}
133; SIMD128-NEXT: return $pop[[R]]{{$}}
134define i8 @extract_v16i8(<16 x i8> %v) {
135  %elem = extractelement <16 x i8> %v, i8 13
136  ret i8 %elem
137}
138
139; CHECK-LABEL: extract_var_v16i8:
140; NO-SIMD128-NOT: i8x16
141; SIMD128-NEXT: .functype extract_var_v16i8 (v128, i32) -> (i32){{$}}
142; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
143; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
144; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
145; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
146; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
147; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
148; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
149; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
150; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
151; SIMD128-NEXT: return $pop[[R]]{{$}}
152define i8 @extract_var_v16i8(<16 x i8> %v, i32 %i) {
153  %elem = extractelement <16 x i8> %v, i32 %i
154  ret i8 %elem
155}
156
157; CHECK-LABEL: extract_undef_v16i8:
158; NO-SIMD128-NOT: i8x16
159; SIMD128-NEXT: .functype extract_undef_v16i8 (v128) -> (i32){{$}}
160; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
161; SIMD128-NEXT: return $pop[[R]]{{$}}
162define i8 @extract_undef_v16i8(<16 x i8> %v) {
163  %elem = extractelement <16 x i8> %v, i8 undef
164  ret i8 %elem
165}
166
167; CHECK-LABEL: replace_v16i8:
168; NO-SIMD128-NOT: i8x16
169; SIMD128-NEXT: .functype replace_v16i8 (v128, i32) -> (v128){{$}}
170; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}}
171; SIMD128-NEXT: return $pop[[R]]{{$}}
172define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
173  %res = insertelement <16 x i8> %v, i8 %x, i32 11
174  ret <16 x i8> %res
175}
176
177; CHECK-LABEL: replace_var_v16i8:
178; NO-SIMD128-NOT: i8x16
179; SIMD128-NEXT: .functype replace_var_v16i8 (v128, i32, i32) -> (v128){{$}}
180; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
181; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
182; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
183; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
184; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
185; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
186; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
187; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $3, $pop[[L5]]{{$}}
188; SIMD128-NEXT: i32.store8 0($pop[[L6]]), $2{{$}}
189; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
190; SIMD128-NEXT: return $pop[[R]]{{$}}
191define <16 x i8> @replace_var_v16i8(<16 x i8> %v, i32 %i, i8 %x) {
192  %res = insertelement <16 x i8> %v, i8 %x, i32 %i
193  ret <16 x i8> %res
194}
195
196; CHECK-LABEL: replace_zero_v16i8:
197; NO-SIMD128-NOT: i8x16
198; SIMD128-NEXT: .functype replace_zero_v16i8 (v128, i32) -> (v128){{$}}
199; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
200; SIMD128-NEXT: return $pop[[R]]{{$}}
201define <16 x i8> @replace_zero_v16i8(<16 x i8> %v, i8 %x) {
202  %res = insertelement <16 x i8> %v, i8 %x, i32 0
203  ret <16 x i8> %res
204}
205
206; CHECK-LABEL: shuffle_v16i8:
207; NO-SIMD128-NOT: v8x16
208; SIMD128-NEXT: .functype shuffle_v16i8 (v128, v128) -> (v128){{$}}
209; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
210; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}}
211; SIMD128-NEXT: return $pop[[R]]{{$}}
212define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
213  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
214    <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23,
215                i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
216  ret <16 x i8> %res
217}
218
219; CHECK-LABEL: shuffle_undef_v16i8:
220; NO-SIMD128-NOT: v8x16
221; SIMD128-NEXT: .functype shuffle_undef_v16i8 (v128, v128) -> (v128){{$}}
222; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
223; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
224; SIMD128-NEXT: return $pop[[R]]{{$}}
225define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) {
226  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
227    <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
228                i32 undef, i32 undef, i32 undef, i32 undef,
229                i32 undef, i32 undef, i32 undef, i32 undef,
230                i32 undef, i32 undef, i32 undef, i32 undef>
231  ret <16 x i8> %res
232}
233
234; CHECK-LABEL: build_v16i8:
235; NO-SIMD128-NOT: i8x16
236; SIMD128-NEXT: .functype build_v16i8 (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}}
237; SIMD128-NEXT: i8x16.splat $push[[L0:[0-9]+]]=, $0{{$}}
238; SIMD128-NEXT: i8x16.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
239; SIMD128-NEXT: i8x16.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
240; SIMD128-NEXT: i8x16.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
241; SIMD128-NEXT: i8x16.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
242; SIMD128-NEXT: i8x16.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
243; SIMD128-NEXT: i8x16.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
244; SIMD128-NEXT: i8x16.replace_lane $push[[L7:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
245; SIMD128-NEXT: i8x16.replace_lane $push[[L8:[0-9]+]]=, $pop[[L7]], 8, $8{{$}}
246; SIMD128-NEXT: i8x16.replace_lane $push[[L9:[0-9]+]]=, $pop[[L8]], 9, $9{{$}}
247; SIMD128-NEXT: i8x16.replace_lane $push[[L10:[0-9]+]]=, $pop[[L9]], 10, $10{{$}}
248; SIMD128-NEXT: i8x16.replace_lane $push[[L11:[0-9]+]]=, $pop[[L10]], 11, $11{{$}}
249; SIMD128-NEXT: i8x16.replace_lane $push[[L12:[0-9]+]]=, $pop[[L11]], 12, $12{{$}}
250; SIMD128-NEXT: i8x16.replace_lane $push[[L13:[0-9]+]]=, $pop[[L12]], 13, $13{{$}}
251; SIMD128-NEXT: i8x16.replace_lane $push[[L14:[0-9]+]]=, $pop[[L13]], 14, $14{{$}}
252; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $pop[[L14]], 15, $15{{$}}
253; SIMD128-NEXT: return $pop[[R]]{{$}}
254define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3,
255                              i8 %x4, i8 %x5, i8 %x6, i8 %x7,
256                              i8 %x8, i8 %x9, i8 %x10, i8 %x11,
257                              i8 %x12, i8 %x13, i8 %x14, i8 %x15) {
258  %t0 = insertelement <16 x i8> undef, i8 %x0, i32 0
259  %t1 = insertelement <16 x i8> %t0, i8 %x1, i32 1
260  %t2 = insertelement <16 x i8> %t1, i8 %x2, i32 2
261  %t3 = insertelement <16 x i8> %t2, i8 %x3, i32 3
262  %t4 = insertelement <16 x i8> %t3, i8 %x4, i32 4
263  %t5 = insertelement <16 x i8> %t4, i8 %x5, i32 5
264  %t6 = insertelement <16 x i8> %t5, i8 %x6, i32 6
265  %t7 = insertelement <16 x i8> %t6, i8 %x7, i32 7
266  %t8 = insertelement <16 x i8> %t7, i8 %x8, i32 8
267  %t9 = insertelement <16 x i8> %t8, i8 %x9, i32 9
268  %t10 = insertelement <16 x i8> %t9, i8 %x10, i32 10
269  %t11 = insertelement <16 x i8> %t10, i8 %x11, i32 11
270  %t12 = insertelement <16 x i8> %t11, i8 %x12, i32 12
271  %t13 = insertelement <16 x i8> %t12, i8 %x13, i32 13
272  %t14 = insertelement <16 x i8> %t13, i8 %x14, i32 14
273  %res = insertelement <16 x i8> %t14, i8 %x15, i32 15
274  ret <16 x i8> %res
275}
276
277; ==============================================================================
278; 8 x i16
279; ==============================================================================
280; CHECK-LABEL: const_v8i16:
281; NO-SIMD128-NOT: i16x8
282; SIMD128-NEXT: .functype const_v8i16 () -> (v128){{$}}
283; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}}
284; SIMD128-NEXT: return $pop[[R]]{{$}}
285define <8 x i16> @const_v8i16() {
286  ret <8 x i16> <i16 256, i16 770, i16 1284, i16 1798,
287                 i16 2312, i16 2826, i16 3340, i16 3854>
288}
289
290; CHECK-LABEL: splat_v8i16:
291; NO-SIMD128-NOT: i16x8
292; SIMD128-NEXT: .functype splat_v8i16 (i32) -> (v128){{$}}
293; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}}
294; SIMD128-NEXT: return $pop[[R]]{{$}}
295define <8 x i16> @splat_v8i16(i16 %x) {
296  %v = insertelement <8 x i16> undef, i16 %x, i32 0
297  %res = shufflevector <8 x i16> %v, <8 x i16> undef,
298    <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
299  ret <8 x i16> %res
300}
301
302; CHECK-LABEL: const_splat_v8i16:
303; SIMD128: i16x8.splat
304define <8 x i16> @const_splat_v8i16() {
305  ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
306}
307
308; CHECK-LABEL: extract_v8i16_s:
309; NO-SIMD128-NOT: i16x8
310; SIMD128-NEXT: .functype extract_v8i16_s (v128) -> (i32){{$}}
311; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}}
312; SIMD128-NEXT: return $pop[[R]]{{$}}
313define i32 @extract_v8i16_s(<8 x i16> %v) {
314  %elem = extractelement <8 x i16> %v, i16 5
315  %a = sext i16 %elem to i32
316  ret i32 %a
317}
318
319; CHECK-LABEL: extract_var_v8i16_s:
320; NO-SIMD128-NOT: i16x8
321; SIMD128-NEXT: .functype extract_var_v8i16_s (v128, i32) -> (i32){{$}}
322; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
323; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
324; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
325; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
326; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
327; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
328; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
329; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
330; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
331; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
332; SIMD128-NEXT: i32.load16_s $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
333; SIMD128-NEXT: return $pop[[R]]{{$}}
334define i32 @extract_var_v8i16_s(<8 x i16> %v, i32 %i) {
335  %elem = extractelement <8 x i16> %v, i32 %i
336  %a = sext i16 %elem to i32
337  ret i32 %a
338}
339
340; CHECK-LABEL: extract_undef_v8i16_s:
341; NO-SIMD128-NOT: i16x8
342; SIMD128-NEXT: .functype extract_undef_v8i16_s (v128) -> (i32){{$}}
343; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
344; SIMD128-NEXT: return $pop[[R]]{{$}}
345define i32 @extract_undef_v8i16_s(<8 x i16> %v) {
346  %elem = extractelement <8 x i16> %v, i16 undef
347  %a = sext i16 %elem to i32
348  ret i32 %a
349}
350
351; CHECK-LABEL: extract_v8i16_u:
352; NO-SIMD128-NOT: i16x8
353; SIMD128-VM-NOT: i16x8.extract_lane_u
354; SIMD128-NEXT: .functype extract_v8i16_u (v128) -> (i32){{$}}
355; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
356; SIMD128-NEXT: return $pop[[R]]{{$}}
357define i32 @extract_v8i16_u(<8 x i16> %v) {
358  %elem = extractelement <8 x i16> %v, i16 5
359  %a = zext i16 %elem to i32
360  ret i32 %a
361}
362
363; CHECK-LABEL: extract_var_v8i16_u:
364; NO-SIMD128-NOT: i16x8
365; SIMD128-NEXT: .functype extract_var_v8i16_u (v128, i32) -> (i32){{$}}
366; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
367; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
368; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
369; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
370; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
371; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
372; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
373; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
374; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
375; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
376; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
377; SIMD128-NEXT: return $pop[[R]]{{$}}
378define i32 @extract_var_v8i16_u(<8 x i16> %v, i32 %i) {
379  %elem = extractelement <8 x i16> %v, i32 %i
380  %a = zext i16 %elem to i32
381  ret i32 %a
382}
383
384; CHECK-LABEL: extract_undef_v8i16_u:
385; NO-SIMD128-NOT: i16x8
386; SIMD128-VM-NOT: i16x8.extract_lane_u
387; SIMD128-NEXT: .functype extract_undef_v8i16_u (v128) -> (i32){{$}}
388; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
389; SIMD128-NEXT: return $pop[[R]]{{$}}
390define i32 @extract_undef_v8i16_u(<8 x i16> %v) {
391  %elem = extractelement <8 x i16> %v, i16 undef
392  %a = zext i16 %elem to i32
393  ret i32 %a
394}
395
396; CHECK-LABEL: extract_v8i16:
397; NO-SIMD128-NOT: i16x8
398; SIMD128-NEXT: .functype extract_v8i16 (v128) -> (i32){{$}}
399; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}}
400; SIMD128-NEXT: return $pop[[R]]{{$}}
401define i16 @extract_v8i16(<8 x i16> %v) {
402  %elem = extractelement <8 x i16> %v, i16 5
403  ret i16 %elem
404}
405
406; CHECK-LABEL: extract_var_v8i16:
407; NO-SIMD128-NOT: i16x8
408; SIMD128-NEXT: .functype extract_var_v8i16 (v128, i32) -> (i32){{$}}
409; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
410; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
411; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
412; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
413; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
414; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
415; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
416; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
417; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
418; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
419; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
420; SIMD128-NEXT: return $pop[[R]]{{$}}
421define i16 @extract_var_v8i16(<8 x i16> %v, i32 %i) {
422  %elem = extractelement <8 x i16> %v, i32 %i
423  ret i16 %elem
424}
425
426; CHECK-LABEL: extract_undef_v8i16:
427; NO-SIMD128-NOT: i16x8
428; SIMD128-NEXT: .functype extract_undef_v8i16 (v128) -> (i32){{$}}
429; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
430; SIMD128-NEXT: return $pop[[R]]{{$}}
431define i16 @extract_undef_v8i16(<8 x i16> %v) {
432  %elem = extractelement <8 x i16> %v, i16 undef
433  ret i16 %elem
434}
435
436; CHECK-LABEL: replace_v8i16:
437; NO-SIMD128-NOT: i16x8
438; SIMD128-NEXT: .functype replace_v8i16 (v128, i32) -> (v128){{$}}
439; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}}
440; SIMD128-NEXT: return $pop[[R]]{{$}}
441define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
442  %res = insertelement <8 x i16> %v, i16 %x, i32 7
443  ret <8 x i16> %res
444}
445
446; CHECK-LABEL: replace_var_v8i16:
447; NO-SIMD128-NOT: i16x8
448; SIMD128-NEXT: .functype replace_var_v8i16 (v128, i32, i32) -> (v128){{$}}
449; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
450; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
451; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
452; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
453; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
454; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
455; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
456; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
457; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
458; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $3, $pop[[L7]]{{$}}
459; SIMD128-NEXT: i32.store16 0($pop[[L8]]), $2{{$}}
460; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
461; SIMD128-NEXT: return $pop[[R]]{{$}}
462define <8 x i16> @replace_var_v8i16(<8 x i16> %v, i32 %i, i16 %x) {
463  %res = insertelement <8 x i16> %v, i16 %x, i32 %i
464  ret <8 x i16> %res
465}
466
467; CHECK-LABEL: replace_zero_v8i16:
468; NO-SIMD128-NOT: i16x8
469; SIMD128-NEXT: .functype replace_zero_v8i16 (v128, i32) -> (v128){{$}}
470; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
471; SIMD128-NEXT: return $pop[[R]]{{$}}
472define <8 x i16> @replace_zero_v8i16(<8 x i16> %v, i16 %x) {
473  %res = insertelement <8 x i16> %v, i16 %x, i32 0
474  ret <8 x i16> %res
475}
476
477; CHECK-LABEL: shuffle_v8i16:
478; NO-SIMD128-NOT: v8x16
479; SIMD128-NEXT: .functype shuffle_v8i16 (v128, v128) -> (v128){{$}}
480; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
481; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}}
482; SIMD128-NEXT: return $pop[[R]]{{$}}
483define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) {
484  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
485    <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
486  ret <8 x i16> %res
487}
488
489; CHECK-LABEL: shuffle_undef_v8i16:
490; NO-SIMD128-NOT: v8x16
491; SIMD128-NEXT: .functype shuffle_undef_v8i16 (v128, v128) -> (v128){{$}}
492; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
493; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
494; SIMD128-NEXT: return $pop[[R]]{{$}}
495define <8 x i16> @shuffle_undef_v8i16(<8 x i16> %x, <8 x i16> %y) {
496  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
497    <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
498               i32 undef, i32 undef, i32 undef, i32 undef>
499  ret <8 x i16> %res
500}
501
502; CHECK-LABEL: build_v8i16:
503; NO-SIMD128-NOT: i16x8
504; SIMD128-NEXT: .functype build_v8i16 (i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}}
505; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}}
506; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
507; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
508; SIMD128-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
509; SIMD128-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
510; SIMD128-NEXT: i16x8.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
511; SIMD128-NEXT: i16x8.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
512; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
513; SIMD128-NEXT: return $pop[[R]]{{$}}
514define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3,
515                              i16 %x4, i16 %x5, i16 %x6, i16 %x7) {
516  %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0
517  %t1 = insertelement <8 x i16> %t0, i16 %x1, i32 1
518  %t2 = insertelement <8 x i16> %t1, i16 %x2, i32 2
519  %t3 = insertelement <8 x i16> %t2, i16 %x3, i32 3
520  %t4 = insertelement <8 x i16> %t3, i16 %x4, i32 4
521  %t5 = insertelement <8 x i16> %t4, i16 %x5, i32 5
522  %t6 = insertelement <8 x i16> %t5, i16 %x6, i32 6
523  %res = insertelement <8 x i16> %t6, i16 %x7, i32 7
524  ret <8 x i16> %res
525}
526
527; ==============================================================================
528; 4 x i32
529; ==============================================================================
530; CHECK-LABEL: const_v4i32:
531; NO-SIMD128-NOT: i32x4
532; SIMD128-NEXT: .functype const_v4i32 () -> (v128){{$}}
533; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}}
534; SIMD128-NEXT: return $pop[[R]]{{$}}
535define <4 x i32> @const_v4i32() {
536  ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084>
537}
538
539; CHECK-LABEL: splat_v4i32:
540; NO-SIMD128-NOT: i32x4
541; SIMD128-NEXT: .functype splat_v4i32 (i32) -> (v128){{$}}
542; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
543; SIMD128-NEXT: return $pop[[R]]{{$}}
544define <4 x i32> @splat_v4i32(i32 %x) {
545  %v = insertelement <4 x i32> undef, i32 %x, i32 0
546  %res = shufflevector <4 x i32> %v, <4 x i32> undef,
547    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
548  ret <4 x i32> %res
549}
550
551; CHECK-LABEL: const_splat_v4i32:
552; SIMD128: i32x4.splat
553define <4 x i32> @const_splat_v4i32() {
554  ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
555}
556
557; CHECK-LABEL: extract_v4i32:
558; NO-SIMD128-NOT: i32x4
559; SIMD128-NEXT: .functype extract_v4i32 (v128) -> (i32){{$}}
560; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
561; SIMD128-NEXT: return $pop[[R]]{{$}}
562define i32 @extract_v4i32(<4 x i32> %v) {
563  %elem = extractelement <4 x i32> %v, i32 3
564  ret i32 %elem
565}
566
567; CHECK-LABEL: extract_var_v4i32:
568; NO-SIMD128-NOT: i32x4
569; SIMD128-NEXT: .functype extract_var_v4i32 (v128, i32) -> (i32){{$}}
570; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
571; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
572; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
573; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
574; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
575; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
576; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
577; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
578; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
579; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $2, $pop[[L7]]{{$}}
580; SIMD128-NEXT: i32.load $push[[R:[0-9]+]]=, 0($pop[[L4]]){{$}}
581; SIMD128-NEXT: return $pop[[R]]{{$}}
582define i32 @extract_var_v4i32(<4 x i32> %v, i32 %i) {
583  %elem = extractelement <4 x i32> %v, i32 %i
584  ret i32 %elem
585}
586
587; CHECK-LABEL: extract_zero_v4i32:
588; NO-SIMD128-NOT: i32x4
589; SIMD128-NEXT: .functype extract_zero_v4i32 (v128) -> (i32){{$}}
590; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
591; SIMD128-NEXT: return $pop[[R]]{{$}}
592define i32 @extract_zero_v4i32(<4 x i32> %v) {
593  %elem = extractelement <4 x i32> %v, i32 0
594  ret i32 %elem
595}
596
597; CHECK-LABEL: replace_v4i32:
598; NO-SIMD128-NOT: i32x4
599; SIMD128-NEXT: .functype replace_v4i32 (v128, i32) -> (v128){{$}}
600; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
601; SIMD128-NEXT: return $pop[[R]]{{$}}
602define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
603  %res = insertelement <4 x i32> %v, i32 %x, i32 2
604  ret <4 x i32> %res
605}
606
607; CHECK-LABEL: replace_var_v4i32:
608; NO-SIMD128-NOT: i32x4
609; SIMD128-NEXT: .functype replace_var_v4i32 (v128, i32, i32) -> (v128){{$}}
610; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
611; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
612; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
613; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
614; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
615; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
616; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
617; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
618; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
619; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $3, $pop[[L7]]{{$}}
620; SIMD128-NEXT: i32.store 0($pop[[L4]]), $2{{$}}
621; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
622; SIMD128-NEXT: return $pop[[R]]{{$}}
623define <4 x i32> @replace_var_v4i32(<4 x i32> %v, i32 %i, i32 %x) {
624  %res = insertelement <4 x i32> %v, i32 %x, i32 %i
625  ret <4 x i32> %res
626}
627
628; CHECK-LABEL: replace_zero_v4i32:
629; NO-SIMD128-NOT: i32x4
630; SIMD128-NEXT: .functype replace_zero_v4i32 (v128, i32) -> (v128){{$}}
631; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
632; SIMD128-NEXT: return $pop[[R]]{{$}}
633define <4 x i32> @replace_zero_v4i32(<4 x i32> %v, i32 %x) {
634  %res = insertelement <4 x i32> %v, i32 %x, i32 0
635  ret <4 x i32> %res
636}
637
638; CHECK-LABEL: shuffle_v4i32:
639; NO-SIMD128-NOT: v8x16
640; SIMD128-NEXT: .functype shuffle_v4i32 (v128, v128) -> (v128){{$}}
641; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
642; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
643; SIMD128-NEXT: return $pop[[R]]{{$}}
644define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) {
645  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
646    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
647  ret <4 x i32> %res
648}
649
650; CHECK-LABEL: shuffle_undef_v4i32:
651; NO-SIMD128-NOT: v8x16
652; SIMD128-NEXT: .functype shuffle_undef_v4i32 (v128, v128) -> (v128){{$}}
653; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
654; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
655; SIMD128-NEXT: return $pop[[R]]{{$}}
656define <4 x i32> @shuffle_undef_v4i32(<4 x i32> %x, <4 x i32> %y) {
657  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
658    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
659  ret <4 x i32> %res
660}
661
662; CHECK-LABEL: build_v4i32:
663; NO-SIMD128-NOT: i32x4
664; SIMD128-NEXT: .functype build_v4i32 (i32, i32, i32, i32) -> (v128){{$}}
665; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
666; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
667; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
668; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
669; SIMD128-NEXT: return $pop[[R]]{{$}}
670define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
671  %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0
672  %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1
673  %t2 = insertelement <4 x i32> %t1, i32 %x2, i32 2
674  %res = insertelement <4 x i32> %t2, i32 %x3, i32 3
675  ret <4 x i32> %res
676}
677
678; ==============================================================================
679; 2 x i64
680; ==============================================================================
681; CHECK-LABEL: const_v2i64:
682; NO-SIMD128-NOT: i64x2
683; SIMD128-VM-NOT: i64x2
684; SIMD128-NEXT: .functype const_v2i64 () -> (v128){{$}}
685; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}}
686; SIMD128-NEXT: return $pop[[R]]{{$}}
687define <2 x i64> @const_v2i64() {
688  ret <2 x i64> <i64 506097522914230528, i64 1084818905618843912>
689}
690
691; CHECK-LABEL: splat_v2i64:
692; NO-SIMD128-NOT: i64x2
693; SIMD128-VM-NOT: i64x2
694; SIMD128-NEXT: .functype splat_v2i64 (i64) -> (v128){{$}}
695; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
696; SIMD128-NEXT: return $pop[[R]]{{$}}
697define <2 x i64> @splat_v2i64(i64 %x) {
698  %t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
699  %res = insertelement <2 x i64> %t1, i64 %x, i32 1
700  ret <2 x i64> %res
701}
702
703; CHECK-LABEL: const_splat_v2i64:
704; SIMD128: i64x2.splat
705define <2 x i64> @const_splat_v2i64() {
706  ret <2 x i64> <i64 42, i64 42>
707}
708
709; CHECK-LABEL: extract_v2i64:
710; NO-SIMD128-NOT: i64x2
711; SIMD128-VM-NOT: i64x2
712; SIMD128-NEXT: .functype extract_v2i64 (v128) -> (i64){{$}}
713; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
714; SIMD128-NEXT: return $pop[[R]]{{$}}
715define i64 @extract_v2i64(<2 x i64> %v) {
716  %elem = extractelement <2 x i64> %v, i64 1
717  ret i64 %elem
718}
719
720; CHECK-LABEL: extract_var_v2i64:
721; NO-SIMD128-NOT: i64x2
722; SIMD128-NEXT: .functype extract_var_v2i64 (v128, i32) -> (i64){{$}}
723; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
724; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
725; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
726; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
727; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
728; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
729; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
730; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
731; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
732; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
733; SIMD128-NEXT: i64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
734; SIMD128-NEXT: return $pop[[R]]{{$}}
735define i64 @extract_var_v2i64(<2 x i64> %v, i32 %i) {
736  %elem = extractelement <2 x i64> %v, i32 %i
737  ret i64 %elem
738}
739
740; CHECK-LABEL: extract_zero_v2i64:
741; NO-SIMD128-NOT: i64x2
742; SIMD128-VM-NOT: i64x2
743; SIMD128-NEXT: .functype extract_zero_v2i64 (v128) -> (i64){{$}}
744; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
745; SIMD128-NEXT: return $pop[[R]]{{$}}
746define i64 @extract_zero_v2i64(<2 x i64> %v) {
747  %elem = extractelement <2 x i64> %v, i64 0
748  ret i64 %elem
749}
750
751; CHECK-LABEL: replace_v2i64:
752; NO-SIMD128-NOT: i64x2
753; SIMD128-VM-NOT: i64x2
754; SIMD128-NEXT: .functype replace_v2i64 (v128, i64) -> (v128){{$}}
755; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
756; SIMD128-NEXT: return $pop[[R]]{{$}}
757define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
758  %res = insertelement <2 x i64> %v, i64 %x, i32 0
759  ret <2 x i64> %res
760}
761
762; CHECK-LABEL: replace_var_v2i64:
763; NO-SIMD128-NOT: i64x2
764; SIMD128-VM-NOT: i64x2
765; SIMD128-NEXT: .functype replace_var_v2i64 (v128, i32, i64) -> (v128){{$}}
766; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
767; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
768; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
769; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
770; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
771; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
772; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
773; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
774; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
775; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
776; SIMD128-NEXT: i64.store 0($pop[[L2]]), $2{{$}}
777; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
778; SIMD128-NEXT: return $pop[[R]]{{$}}
779define <2 x i64> @replace_var_v2i64(<2 x i64> %v, i32 %i, i64 %x) {
780  %res = insertelement <2 x i64> %v, i64 %x, i32 %i
781  ret <2 x i64> %res
782}
783
784; CHECK-LABEL: replace_zero_v2i64:
785; NO-SIMD128-NOT: i64x2
786; SIMD128-VM-NOT: i64x2
787; SIMD128-NEXT: .functype replace_zero_v2i64 (v128, i64) -> (v128){{$}}
788; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
789; SIMD128-NEXT: return $pop[[R]]{{$}}
790define <2 x i64> @replace_zero_v2i64(<2 x i64> %v, i64 %x) {
791  %res = insertelement <2 x i64> %v, i64 %x, i32 0
792  ret <2 x i64> %res
793}
794
795; CHECK-LABEL: shuffle_v2i64:
796; NO-SIMD128-NOT: v8x16
797; SIMD128-NEXT: .functype shuffle_v2i64 (v128, v128) -> (v128){{$}}
798; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
799; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
800; SIMD128-NEXT: return $pop[[R]]{{$}}
801define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) {
802  %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3>
803  ret <2 x i64> %res
804}
805
806; CHECK-LABEL: shuffle_undef_v2i64:
807; NO-SIMD128-NOT: v8x16
808; SIMD128-NEXT: .functype shuffle_undef_v2i64 (v128, v128) -> (v128){{$}}
809; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
810; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
811; SIMD128-NEXT: return $pop[[R]]{{$}}
812define <2 x i64> @shuffle_undef_v2i64(<2 x i64> %x, <2 x i64> %y) {
813  %res = shufflevector <2 x i64> %x, <2 x i64> %y,
814    <2 x i32> <i32 1, i32 undef>
815  ret <2 x i64> %res
816}
817
818; CHECK-LABEL: build_v2i64:
819; NO-SIMD128-NOT: i64x2
820; SIMD128-VM-NOT: i64x2
821; SIMD128-NEXT: .functype build_v2i64 (i64, i64) -> (v128){{$}}
822; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
823; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
824; SIMD128-NEXT: return $pop[[R]]{{$}}
825define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) {
826  %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0
827  %res = insertelement <2 x i64> %t0, i64 %x1, i32 1
828  ret <2 x i64> %res
829}
830
831; ==============================================================================
832; 4 x f32
833; ==============================================================================
834; CHECK-LABEL: const_v4f32:
835; NO-SIMD128-NOT: f32x4
836; SIMD128-NEXT: .functype const_v4f32 () -> (v128){{$}}
837; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
838; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}}
839; SIMD128-NEXT: return $pop[[R]]{{$}}
840define <4 x float> @const_v4f32() {
841  ret <4 x float> <float 0x3860402000000000, float 0x38e0c0a080000000,
842                   float 0x3961412100000000, float 0x39e1c1a180000000>
843}
844
845; CHECK-LABEL: splat_v4f32:
846; NO-SIMD128-NOT: f32x4
847; SIMD128-NEXT: .functype splat_v4f32 (f32) -> (v128){{$}}
848; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
849; SIMD128-NEXT: return $pop[[R]]{{$}}
850define <4 x float> @splat_v4f32(float %x) {
851  %v = insertelement <4 x float> undef, float %x, i32 0
852  %res = shufflevector <4 x float> %v, <4 x float> undef,
853    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
854  ret <4 x float> %res
855}
856
857; CHECK-LABEL: const_splat_v4f32
858; SIMD128: f32x4.splat
859define <4 x float> @const_splat_v4f32() {
860  ret <4 x float> <float 42., float 42., float 42., float 42.>
861}
862
863; CHECK-LABEL: extract_v4f32:
864; NO-SIMD128-NOT: f32x4
865; SIMD128-NEXT: .functype extract_v4f32 (v128) -> (f32){{$}}
866; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
867; SIMD128-NEXT: return $pop[[R]]{{$}}
868define float @extract_v4f32(<4 x float> %v) {
869  %elem = extractelement <4 x float> %v, i32 3
870  ret float %elem
871}
872
873; CHECK-LABEL: extract_var_v4f32:
874; NO-SIMD128-NOT: i64x2
875; SIMD128-NEXT: .functype extract_var_v4f32 (v128, i32) -> (f32){{$}}
876; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
877; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
878; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
879; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
880; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
881; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
882; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
883; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
884; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
885; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
886; SIMD128-NEXT: f32.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
887; SIMD128-NEXT: return $pop[[R]]{{$}}
888define float @extract_var_v4f32(<4 x float> %v, i32 %i) {
889  %elem = extractelement <4 x float> %v, i32 %i
890  ret float %elem
891}
892
893; CHECK-LABEL: extract_zero_v4f32:
894; NO-SIMD128-NOT: f32x4
895; SIMD128-NEXT: .functype extract_zero_v4f32 (v128) -> (f32){{$}}
896; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
897; SIMD128-NEXT: return $pop[[R]]{{$}}
898define float @extract_zero_v4f32(<4 x float> %v) {
899  %elem = extractelement <4 x float> %v, i32 0
900  ret float %elem
901}
902
903; CHECK-LABEL: replace_v4f32:
904; NO-SIMD128-NOT: f32x4
905; SIMD128-NEXT: .functype replace_v4f32 (v128, f32) -> (v128){{$}}
906; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
907; SIMD128-NEXT: return $pop[[R]]{{$}}
908define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
909  %res = insertelement <4 x float> %v, float %x, i32 2
910  ret <4 x float> %res
911}
912
913; CHECK-LABEL: replace_var_v4f32:
914; NO-SIMD128-NOT: f32x4
915; SIMD128-NEXT: .functype replace_var_v4f32 (v128, i32, f32) -> (v128){{$}}
916; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
917; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
918; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
919; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
920; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
921; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
922; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
923; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
924; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
925; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
926; SIMD128-NEXT: f32.store 0($pop[[L2]]), $2{{$}}
927; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
928; SIMD128-NEXT: return $pop[[R]]{{$}}
929define <4 x float> @replace_var_v4f32(<4 x float> %v, i32 %i, float %x) {
930  %res = insertelement <4 x float> %v, float %x, i32 %i
931  ret <4 x float> %res
932}
933
934; CHECK-LABEL: replace_zero_v4f32:
935; NO-SIMD128-NOT: f32x4
936; SIMD128-NEXT: .functype replace_zero_v4f32 (v128, f32) -> (v128){{$}}
937; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
938; SIMD128-NEXT: return $pop[[R]]{{$}}
939define <4 x float> @replace_zero_v4f32(<4 x float> %v, float %x) {
940  %res = insertelement <4 x float> %v, float %x, i32 0
941  ret <4 x float> %res
942}
943
944; CHECK-LABEL: shuffle_v4f32:
945; NO-SIMD128-NOT: v8x16
946; SIMD128-NEXT: .functype shuffle_v4f32 (v128, v128) -> (v128){{$}}
947; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
948; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
949; SIMD128-NEXT: return $pop[[R]]{{$}}
950define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) {
951  %res = shufflevector <4 x float> %x, <4 x float> %y,
952    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
953  ret <4 x float> %res
954}
955
956; CHECK-LABEL: shuffle_undef_v4f32:
957; NO-SIMD128-NOT: v8x16
958; SIMD128-NEXT: .functype shuffle_undef_v4f32 (v128, v128) -> (v128){{$}}
959; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
960; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
961; SIMD128-NEXT: return $pop[[R]]{{$}}
962define <4 x float> @shuffle_undef_v4f32(<4 x float> %x, <4 x float> %y) {
963  %res = shufflevector <4 x float> %x, <4 x float> %y,
964    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
965  ret <4 x float> %res
966}
967
968; CHECK-LABEL: build_v4f32:
969; NO-SIMD128-NOT: f32x4
970; SIMD128-NEXT: .functype build_v4f32 (f32, f32, f32, f32) -> (v128){{$}}
971; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
972; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
973; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
974; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
975; SIMD128-NEXT: return $pop[[R]]{{$}}
976define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) {
977  %t0 = insertelement <4 x float> undef, float %x0, i32 0
978  %t1 = insertelement <4 x float> %t0, float %x1, i32 1
979  %t2 = insertelement <4 x float> %t1, float %x2, i32 2
980  %res = insertelement <4 x float> %t2, float %x3, i32 3
981  ret <4 x float> %res
982}
983
984; ==============================================================================
985; 2 x f64
986; ==============================================================================
987; CHECK-LABEL: const_v2f64:
988; NO-SIMD128-NOT: f64x2
989; SIMD128-NEXT: .functype const_v2f64 () -> (v128){{$}}
990; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}}
991; SIMD128-NEXT: return $pop[[R]]{{$}}
992define <2 x double> @const_v2f64() {
993  ret <2 x double> <double 0x0706050403020100, double 0x0F0E0D0C0B0A0908>
994}
995
996; CHECK-LABEL: splat_v2f64:
997; NO-SIMD128-NOT: f64x2
998; SIMD128-VM-NOT: f64x2
999; SIMD128-NEXT: .functype splat_v2f64 (f64) -> (v128){{$}}
1000; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
1001; SIMD128-NEXT: return $pop[[R]]{{$}}
1002define <2 x double> @splat_v2f64(double %x) {
1003  %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0
1004  %res = insertelement <2 x double> %t1, double %x, i32 1
1005  ret <2 x double> %res
1006}
1007
1008; CHECK-LABEL: const_splat_v2f64:
1009; SIMD128: f64x2.splat
1010define <2 x double> @const_splat_v2f64() {
1011  ret <2 x double> <double 42., double 42.>
1012}
1013
1014; CHECK-LABEL: extract_v2f64:
1015; NO-SIMD128-NOT: f64x2
1016; SIMD128-VM-NOT: f64x2
1017; SIMD128-NEXT: .functype extract_v2f64 (v128) -> (f64){{$}}
1018; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
1019; SIMD128-NEXT: return $pop[[R]]{{$}}
1020define double @extract_v2f64(<2 x double> %v) {
1021  %elem = extractelement <2 x double> %v, i32 1
1022  ret double %elem
1023}
1024
1025; CHECK-LABEL: extract_var_v2f64:
1026; NO-SIMD128-NOT: i62x2
1027; SIMD128-NEXT: .functype extract_var_v2f64 (v128, i32) -> (f64){{$}}
1028; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
1029; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
1030; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
1031; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
1032; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
1033; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
1034; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
1035; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
1036; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
1037; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
1038; SIMD128-NEXT: f64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
1039; SIMD128-NEXT: return $pop[[R]]{{$}}
1040define double @extract_var_v2f64(<2 x double> %v, i32 %i) {
1041  %elem = extractelement <2 x double> %v, i32 %i
1042  ret double %elem
1043}
1044
1045; CHECK-LABEL: extract_zero_v2f64:
1046; NO-SIMD128-NOT: f64x2
1047; SIMD128-VM-NOT: f64x2
1048; SIMD128-NEXT: .functype extract_zero_v2f64 (v128) -> (f64){{$}}
1049; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
1050; SIMD128-NEXT: return $pop[[R]]{{$}}
1051define double @extract_zero_v2f64(<2 x double> %v) {
1052  %elem = extractelement <2 x double> %v, i32 0
1053  ret double %elem
1054}
1055
1056; CHECK-LABEL: replace_v2f64:
1057; NO-SIMD128-NOT: f64x2
1058; SIMD128-VM-NOT: f64x2
1059; SIMD128-NEXT: .functype replace_v2f64 (v128, f64) -> (v128){{$}}
1060; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
1061; SIMD128-NEXT: return $pop[[R]]{{$}}
1062define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
1063  %res = insertelement <2 x double> %v, double %x, i32 0
1064  ret <2 x double> %res
1065}
1066
1067; CHECK-LABEL: replace_var_v2f64:
1068; NO-SIMD128-NOT: f64x2
1069; SIMD128-VM-NOT: f64x2
1070; SIMD128-NEXT: .functype replace_var_v2f64 (v128, i32, f64) -> (v128){{$}}
1071; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
1072; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
1073; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
1074; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
1075; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
1076; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
1077; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
1078; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
1079; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
1080; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
1081; SIMD128-NEXT: f64.store 0($pop[[L2]]), $2{{$}}
1082; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
1083; SIMD128-NEXT: return $pop[[R]]{{$}}
1084define <2 x double> @replace_var_v2f64(<2 x double> %v, i32 %i, double %x) {
1085  %res = insertelement <2 x double> %v, double %x, i32 %i
1086  ret <2 x double> %res
1087}
1088
1089; CHECK-LABEL: replace_zero_v2f64:
1090; NO-SIMD128-NOT: f64x2
1091; SIMD128-VM-NOT: f64x2
1092; SIMD128-NEXT: .functype replace_zero_v2f64 (v128, f64) -> (v128){{$}}
1093; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
1094; SIMD128-NEXT: return $pop[[R]]{{$}}
1095define <2 x double> @replace_zero_v2f64(<2 x double> %v, double %x) {
1096  %res = insertelement <2 x double> %v, double %x, i32 0
1097  ret <2 x double> %res
1098}
1099
1100; CHECK-LABEL: shuffle_v2f64:
1101; NO-SIMD128-NOT: v8x16
1102; SIMD128-NEXT: .functype shuffle_v2f64 (v128, v128) -> (v128){{$}}
1103; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
1104; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
1105; SIMD128-NEXT: return $pop[[R]]{{$}}
1106define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) {
1107  %res = shufflevector <2 x double> %x, <2 x double> %y,
1108    <2 x i32> <i32 0, i32 3>
1109  ret <2 x double> %res
1110}
1111
1112; CHECK-LABEL: shuffle_undef_v2f64:
1113; NO-SIMD128-NOT: v8x16
1114; SIMD128-NEXT: .functype shuffle_undef_v2f64 (v128, v128) -> (v128){{$}}
1115; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
1116; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
1117; SIMD128-NEXT: return $pop[[R]]{{$}}
1118define <2 x double> @shuffle_undef_v2f64(<2 x double> %x, <2 x double> %y) {
1119  %res = shufflevector <2 x double> %x, <2 x double> %y,
1120    <2 x i32> <i32 1, i32 undef>
1121  ret <2 x double> %res
1122}
1123
1124; CHECK-LABEL: build_v2f64:
1125; NO-SIMD128-NOT: f64x2
1126; SIMD128-VM-NOT: f64x2
1127; SIMD128-NEXT: .functype build_v2f64 (f64, f64) -> (v128){{$}}
1128; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
1129; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
1130; SIMD128-NEXT: return $pop[[R]]{{$}}
1131define <2 x double> @build_v2f64(double %x0, double %x1) {
1132  %t0 = insertelement <2 x double> undef, double %x0, i32 0
1133  %res = insertelement <2 x double> %t0, double %x1, i32 1
1134  ret <2 x double> %res
1135}
1136