1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,NO-SIMD128
3
4; Test that basic SIMD128 vector manipulation operations assemble as expected.
5
6target triple = "wasm32-unknown-unknown"
7
8; ==============================================================================
9; 16 x i8
10; ==============================================================================
11; CHECK-LABEL: const_v16i8:
12; NO-SIMD128-NOT: i8x16
13; SIMD128-NEXT: .functype const_v16i8 () -> (v128){{$}}
14; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
15; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
16; SIMD128-NEXT: return $pop[[R]]{{$}}
17define <16 x i8> @const_v16i8() {
18  ret <16 x i8> <i8 00, i8 01, i8 02, i8 03, i8 04, i8 05, i8 06, i8 07,
19                 i8 08, i8 09, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
20}
21
22; CHECK-LABEL: splat_v16i8:
23; NO-SIMD128-NOT: i8x16
24; SIMD128-NEXT: .functype splat_v16i8 (i32) -> (v128){{$}}
25; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}}
26; SIMD128-NEXT: return $pop[[R]]{{$}}
27define <16 x i8> @splat_v16i8(i8 %x) {
28  %v = insertelement <16 x i8> undef, i8 %x, i32 0
29  %res = shufflevector <16 x i8> %v, <16 x i8> undef,
30    <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0,
31                i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
32  ret <16 x i8> %res
33}
34
35; CHECK-LABEL: const_splat_v16i8:
36; SIMD128: v128.const $push0=, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42{{$}}
37define <16 x i8> @const_splat_v16i8() {
38  ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
39                 i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
40}
41
42; CHECK-LABEL: extract_v16i8_s:
43; NO-SIMD128-NOT: i8x16
44; SIMD128-NEXT: .functype extract_v16i8_s (v128) -> (i32){{$}}
45; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}}
46; SIMD128-NEXT: return $pop[[R]]{{$}}
47define i32 @extract_v16i8_s(<16 x i8> %v) {
48  %elem = extractelement <16 x i8> %v, i8 13
49  %a = sext i8 %elem to i32
50  ret i32 %a
51}
52
53; CHECK-LABEL: extract_var_v16i8_s:
54; NO-SIMD128-NOT: i8x16
55; SIMD128-NEXT: .functype extract_var_v16i8_s (v128, i32) -> (i32){{$}}
56; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer
57; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
58; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
59; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
60; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
61; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15
62; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
63; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]
64; SIMD128-NEXT: i32.load8_s $push[[R:[0-9]+]]=, 0($pop[[L6]])
65; SIMD128-NEXT: return $pop[[R]]
66define i32 @extract_var_v16i8_s(<16 x i8> %v, i32 %i) {
67  %elem = extractelement <16 x i8> %v, i32 %i
68  %a = sext i8 %elem to i32
69  ret i32 %a
70}
71
72; CHECK-LABEL: extract_undef_v16i8_s:
73; NO-SIMD128-NOT: i8x16
74; SIMD128-NEXT: .functype extract_undef_v16i8_s (v128) -> (i32){{$}}
75; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
76; SIMD128-NEXT: return $pop[[R]]{{$}}
77define i32 @extract_undef_v16i8_s(<16 x i8> %v) {
78  %elem = extractelement <16 x i8> %v, i8 undef
79  %a = sext i8 %elem to i32
80  ret i32 %a
81}
82
83; CHECK-LABEL: extract_v16i8_u:
84; NO-SIMD128-NOT: i8x16
85; SIMD128-NEXT: .functype extract_v16i8_u (v128) -> (i32){{$}}
86; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
87; SIMD128-NEXT: return $pop[[R]]{{$}}
88define i32 @extract_v16i8_u(<16 x i8> %v) {
89  %elem = extractelement <16 x i8> %v, i8 13
90  %a = zext i8 %elem to i32
91  ret i32 %a
92}
93
94; CHECK-LABEL: extract_var_v16i8_u:
95; NO-SIMD128-NOT: i8x16
96; SIMD128-NEXT: .functype extract_var_v16i8_u (v128, i32) -> (i32){{$}}
97; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
98; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
99; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
100; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
101; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
102; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
103; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
104; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
105; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
106; SIMD128-NEXT: return $pop[[R]]{{$}}
107define i32 @extract_var_v16i8_u(<16 x i8> %v, i32 %i) {
108  %elem = extractelement <16 x i8> %v, i32 %i
109  %a = zext i8 %elem to i32
110  ret i32 %a
111}
112
113; CHECK-LABEL: extract_undef_v16i8_u:
114; NO-SIMD128-NOT: i8x16
115; SIMD128-NEXT: .functype extract_undef_v16i8_u (v128) -> (i32){{$}}
116; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
117; SIMD128-NEXT: return $pop[[R]]{{$}}
118define i32 @extract_undef_v16i8_u(<16 x i8> %v) {
119  %elem = extractelement <16 x i8> %v, i8 undef
120  %a = zext i8 %elem to i32
121  ret i32 %a
122}
123
124; CHECK-LABEL: extract_v16i8:
125; NO-SIMD128-NOT: i8x16
126; SIMD128-NEXT: .functype extract_v16i8 (v128) -> (i32){{$}}
127; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
128; SIMD128-NEXT: return $pop[[R]]{{$}}
129define i8 @extract_v16i8(<16 x i8> %v) {
130  %elem = extractelement <16 x i8> %v, i8 13
131  ret i8 %elem
132}
133
134; CHECK-LABEL: extract_var_v16i8:
135; NO-SIMD128-NOT: i8x16
136; SIMD128-NEXT: .functype extract_var_v16i8 (v128, i32) -> (i32){{$}}
137; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
138; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
139; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
140; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
141; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
142; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
143; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
144; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
145; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
146; SIMD128-NEXT: return $pop[[R]]{{$}}
147define i8 @extract_var_v16i8(<16 x i8> %v, i32 %i) {
148  %elem = extractelement <16 x i8> %v, i32 %i
149  ret i8 %elem
150}
151
152; CHECK-LABEL: extract_undef_v16i8:
153; NO-SIMD128-NOT: i8x16
154; SIMD128-NEXT: .functype extract_undef_v16i8 (v128) -> (i32){{$}}
155; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
156; SIMD128-NEXT: return $pop[[R]]{{$}}
157define i8 @extract_undef_v16i8(<16 x i8> %v) {
158  %elem = extractelement <16 x i8> %v, i8 undef
159  ret i8 %elem
160}
161
162; CHECK-LABEL: replace_v16i8:
163; NO-SIMD128-NOT: i8x16
164; SIMD128-NEXT: .functype replace_v16i8 (v128, i32) -> (v128){{$}}
165; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}}
166; SIMD128-NEXT: return $pop[[R]]{{$}}
167define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
168  %res = insertelement <16 x i8> %v, i8 %x, i32 11
169  ret <16 x i8> %res
170}
171
172; CHECK-LABEL: replace_var_v16i8:
173; NO-SIMD128-NOT: i8x16
174; SIMD128-NEXT: .functype replace_var_v16i8 (v128, i32, i32) -> (v128){{$}}
175; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
176; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
177; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
178; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
179; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
180; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
181; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
182; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $3, $pop[[L5]]{{$}}
183; SIMD128-NEXT: i32.store8 0($pop[[L6]]), $2{{$}}
184; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
185; SIMD128-NEXT: return $pop[[R]]{{$}}
186define <16 x i8> @replace_var_v16i8(<16 x i8> %v, i32 %i, i8 %x) {
187  %res = insertelement <16 x i8> %v, i8 %x, i32 %i
188  ret <16 x i8> %res
189}
190
191; CHECK-LABEL: replace_zero_v16i8:
192; NO-SIMD128-NOT: i8x16
193; SIMD128-NEXT: .functype replace_zero_v16i8 (v128, i32) -> (v128){{$}}
194; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
195; SIMD128-NEXT: return $pop[[R]]{{$}}
196define <16 x i8> @replace_zero_v16i8(<16 x i8> %v, i8 %x) {
197  %res = insertelement <16 x i8> %v, i8 %x, i32 0
198  ret <16 x i8> %res
199}
200
201; CHECK-LABEL: shuffle_v16i8:
202; NO-SIMD128-NOT: i8x16
203; SIMD128-NEXT: .functype shuffle_v16i8 (v128, v128) -> (v128){{$}}
204; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
205; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}}
206; SIMD128-NEXT: return $pop[[R]]{{$}}
207define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
208  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
209    <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23,
210                i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
211  ret <16 x i8> %res
212}
213
214; CHECK-LABEL: shuffle_undef_v16i8:
215; NO-SIMD128-NOT: i8x16
216; SIMD128-NEXT: .functype shuffle_undef_v16i8 (v128, v128) -> (v128){{$}}
217; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
218; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
219; SIMD128-NEXT: return $pop[[R]]{{$}}
220define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) {
221  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
222    <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
223                i32 undef, i32 undef, i32 undef, i32 undef,
224                i32 undef, i32 undef, i32 undef, i32 undef,
225                i32 undef, i32 undef, i32 undef, i32 undef>
226  ret <16 x i8> %res
227}
228
229; CHECK-LABEL: build_v16i8:
230; NO-SIMD128-NOT: i8x16
231; SIMD128-NEXT: .functype build_v16i8 (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}}
232; SIMD128-NEXT: i8x16.splat $push[[L0:[0-9]+]]=, $0{{$}}
233; SIMD128-NEXT: i8x16.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
234; SIMD128-NEXT: i8x16.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
235; SIMD128-NEXT: i8x16.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
236; SIMD128-NEXT: i8x16.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
237; SIMD128-NEXT: i8x16.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
238; SIMD128-NEXT: i8x16.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
239; SIMD128-NEXT: i8x16.replace_lane $push[[L7:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
240; SIMD128-NEXT: i8x16.replace_lane $push[[L8:[0-9]+]]=, $pop[[L7]], 8, $8{{$}}
241; SIMD128-NEXT: i8x16.replace_lane $push[[L9:[0-9]+]]=, $pop[[L8]], 9, $9{{$}}
242; SIMD128-NEXT: i8x16.replace_lane $push[[L10:[0-9]+]]=, $pop[[L9]], 10, $10{{$}}
243; SIMD128-NEXT: i8x16.replace_lane $push[[L11:[0-9]+]]=, $pop[[L10]], 11, $11{{$}}
244; SIMD128-NEXT: i8x16.replace_lane $push[[L12:[0-9]+]]=, $pop[[L11]], 12, $12{{$}}
245; SIMD128-NEXT: i8x16.replace_lane $push[[L13:[0-9]+]]=, $pop[[L12]], 13, $13{{$}}
246; SIMD128-NEXT: i8x16.replace_lane $push[[L14:[0-9]+]]=, $pop[[L13]], 14, $14{{$}}
247; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $pop[[L14]], 15, $15{{$}}
248; SIMD128-NEXT: return $pop[[R]]{{$}}
249define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3,
250                              i8 %x4, i8 %x5, i8 %x6, i8 %x7,
251                              i8 %x8, i8 %x9, i8 %x10, i8 %x11,
252                              i8 %x12, i8 %x13, i8 %x14, i8 %x15) {
253  %t0 = insertelement <16 x i8> undef, i8 %x0, i32 0
254  %t1 = insertelement <16 x i8> %t0, i8 %x1, i32 1
255  %t2 = insertelement <16 x i8> %t1, i8 %x2, i32 2
256  %t3 = insertelement <16 x i8> %t2, i8 %x3, i32 3
257  %t4 = insertelement <16 x i8> %t3, i8 %x4, i32 4
258  %t5 = insertelement <16 x i8> %t4, i8 %x5, i32 5
259  %t6 = insertelement <16 x i8> %t5, i8 %x6, i32 6
260  %t7 = insertelement <16 x i8> %t6, i8 %x7, i32 7
261  %t8 = insertelement <16 x i8> %t7, i8 %x8, i32 8
262  %t9 = insertelement <16 x i8> %t8, i8 %x9, i32 9
263  %t10 = insertelement <16 x i8> %t9, i8 %x10, i32 10
264  %t11 = insertelement <16 x i8> %t10, i8 %x11, i32 11
265  %t12 = insertelement <16 x i8> %t11, i8 %x12, i32 12
266  %t13 = insertelement <16 x i8> %t12, i8 %x13, i32 13
267  %t14 = insertelement <16 x i8> %t13, i8 %x14, i32 14
268  %res = insertelement <16 x i8> %t14, i8 %x15, i32 15
269  ret <16 x i8> %res
270}
271
272; ==============================================================================
273; 8 x i16
274; ==============================================================================
275; CHECK-LABEL: const_v8i16:
276; NO-SIMD128-NOT: i16x8
277; SIMD128-NEXT: .functype const_v8i16 () -> (v128){{$}}
278; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}}
279; SIMD128-NEXT: return $pop[[R]]{{$}}
280define <8 x i16> @const_v8i16() {
281  ret <8 x i16> <i16 256, i16 770, i16 1284, i16 1798,
282                 i16 2312, i16 2826, i16 3340, i16 3854>
283}
284
285; CHECK-LABEL: splat_v8i16:
286; NO-SIMD128-NOT: i16x8
287; SIMD128-NEXT: .functype splat_v8i16 (i32) -> (v128){{$}}
288; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}}
289; SIMD128-NEXT: return $pop[[R]]{{$}}
290define <8 x i16> @splat_v8i16(i16 %x) {
291  %v = insertelement <8 x i16> undef, i16 %x, i32 0
292  %res = shufflevector <8 x i16> %v, <8 x i16> undef,
293    <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
294  ret <8 x i16> %res
295}
296
297; CHECK-LABEL: const_splat_v8i16:
298; SIMD128: v128.const $push0=, 42, 42, 42, 42, 42, 42, 42, 42{{$}}
299define <8 x i16> @const_splat_v8i16() {
300  ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
301}
302
303; CHECK-LABEL: extract_v8i16_s:
304; NO-SIMD128-NOT: i16x8
305; SIMD128-NEXT: .functype extract_v8i16_s (v128) -> (i32){{$}}
306; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}}
307; SIMD128-NEXT: return $pop[[R]]{{$}}
308define i32 @extract_v8i16_s(<8 x i16> %v) {
309  %elem = extractelement <8 x i16> %v, i16 5
310  %a = sext i16 %elem to i32
311  ret i32 %a
312}
313
314; CHECK-LABEL: extract_var_v8i16_s:
315; NO-SIMD128-NOT: i16x8
316; SIMD128-NEXT: .functype extract_var_v8i16_s (v128, i32) -> (i32){{$}}
317; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
318; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
319; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
320; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
321; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
322; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
323; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
324; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
325; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
326; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
327; SIMD128-NEXT: i32.load16_s $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
328; SIMD128-NEXT: return $pop[[R]]{{$}}
329define i32 @extract_var_v8i16_s(<8 x i16> %v, i32 %i) {
330  %elem = extractelement <8 x i16> %v, i32 %i
331  %a = sext i16 %elem to i32
332  ret i32 %a
333}
334
335; CHECK-LABEL: extract_undef_v8i16_s:
336; NO-SIMD128-NOT: i16x8
337; SIMD128-NEXT: .functype extract_undef_v8i16_s (v128) -> (i32){{$}}
338; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
339; SIMD128-NEXT: return $pop[[R]]{{$}}
340define i32 @extract_undef_v8i16_s(<8 x i16> %v) {
341  %elem = extractelement <8 x i16> %v, i16 undef
342  %a = sext i16 %elem to i32
343  ret i32 %a
344}
345
346; CHECK-LABEL: extract_v8i16_u:
347; NO-SIMD128-NOT: i16x8
348; SIMD128-NEXT: .functype extract_v8i16_u (v128) -> (i32){{$}}
349; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
350; SIMD128-NEXT: return $pop[[R]]{{$}}
351define i32 @extract_v8i16_u(<8 x i16> %v) {
352  %elem = extractelement <8 x i16> %v, i16 5
353  %a = zext i16 %elem to i32
354  ret i32 %a
355}
356
357; CHECK-LABEL: extract_var_v8i16_u:
358; NO-SIMD128-NOT: i16x8
359; SIMD128-NEXT: .functype extract_var_v8i16_u (v128, i32) -> (i32){{$}}
360; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
361; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
362; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
363; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
364; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
365; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
366; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
367; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
368; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
369; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
370; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
371; SIMD128-NEXT: return $pop[[R]]{{$}}
372define i32 @extract_var_v8i16_u(<8 x i16> %v, i32 %i) {
373  %elem = extractelement <8 x i16> %v, i32 %i
374  %a = zext i16 %elem to i32
375  ret i32 %a
376}
377
378; CHECK-LABEL: extract_undef_v8i16_u:
379; NO-SIMD128-NOT: i16x8
380; SIMD128-NEXT: .functype extract_undef_v8i16_u (v128) -> (i32){{$}}
381; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
382; SIMD128-NEXT: return $pop[[R]]{{$}}
383define i32 @extract_undef_v8i16_u(<8 x i16> %v) {
384  %elem = extractelement <8 x i16> %v, i16 undef
385  %a = zext i16 %elem to i32
386  ret i32 %a
387}
388
389; CHECK-LABEL: extract_v8i16:
390; NO-SIMD128-NOT: i16x8
391; SIMD128-NEXT: .functype extract_v8i16 (v128) -> (i32){{$}}
392; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
393; SIMD128-NEXT: return $pop[[R]]{{$}}
394define i16 @extract_v8i16(<8 x i16> %v) {
395  %elem = extractelement <8 x i16> %v, i16 5
396  ret i16 %elem
397}
398
399; CHECK-LABEL: extract_var_v8i16:
400; NO-SIMD128-NOT: i16x8
401; SIMD128-NEXT: .functype extract_var_v8i16 (v128, i32) -> (i32){{$}}
402; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
403; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
404; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
405; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
406; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
407; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
408; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
409; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
410; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
411; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
412; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
413; SIMD128-NEXT: return $pop[[R]]{{$}}
414define i16 @extract_var_v8i16(<8 x i16> %v, i32 %i) {
415  %elem = extractelement <8 x i16> %v, i32 %i
416  ret i16 %elem
417}
418
419; CHECK-LABEL: extract_undef_v8i16:
420; NO-SIMD128-NOT: i16x8
421; SIMD128-NEXT: .functype extract_undef_v8i16 (v128) -> (i32){{$}}
422; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
423; SIMD128-NEXT: return $pop[[R]]{{$}}
424define i16 @extract_undef_v8i16(<8 x i16> %v) {
425  %elem = extractelement <8 x i16> %v, i16 undef
426  ret i16 %elem
427}
428
429; CHECK-LABEL: replace_v8i16:
430; NO-SIMD128-NOT: i16x8
431; SIMD128-NEXT: .functype replace_v8i16 (v128, i32) -> (v128){{$}}
432; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}}
433; SIMD128-NEXT: return $pop[[R]]{{$}}
434define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
435  %res = insertelement <8 x i16> %v, i16 %x, i32 7
436  ret <8 x i16> %res
437}
438
439; CHECK-LABEL: replace_var_v8i16:
440; NO-SIMD128-NOT: i16x8
441; SIMD128-NEXT: .functype replace_var_v8i16 (v128, i32, i32) -> (v128){{$}}
442; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
443; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
444; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
445; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
446; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
447; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
448; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
449; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
450; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
451; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $3, $pop[[L7]]{{$}}
452; SIMD128-NEXT: i32.store16 0($pop[[L8]]), $2{{$}}
453; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
454; SIMD128-NEXT: return $pop[[R]]{{$}}
455define <8 x i16> @replace_var_v8i16(<8 x i16> %v, i32 %i, i16 %x) {
456  %res = insertelement <8 x i16> %v, i16 %x, i32 %i
457  ret <8 x i16> %res
458}
459
460; CHECK-LABEL: replace_zero_v8i16:
461; NO-SIMD128-NOT: i16x8
462; SIMD128-NEXT: .functype replace_zero_v8i16 (v128, i32) -> (v128){{$}}
463; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
464; SIMD128-NEXT: return $pop[[R]]{{$}}
465define <8 x i16> @replace_zero_v8i16(<8 x i16> %v, i16 %x) {
466  %res = insertelement <8 x i16> %v, i16 %x, i32 0
467  ret <8 x i16> %res
468}
469
470; CHECK-LABEL: shuffle_v8i16:
471; NO-SIMD128-NOT: i8x16
472; SIMD128-NEXT: .functype shuffle_v8i16 (v128, v128) -> (v128){{$}}
473; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
474; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}}
475; SIMD128-NEXT: return $pop[[R]]{{$}}
476define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) {
477  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
478    <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
479  ret <8 x i16> %res
480}
481
482; CHECK-LABEL: shuffle_undef_v8i16:
483; NO-SIMD128-NOT: i8x16
484; SIMD128-NEXT: .functype shuffle_undef_v8i16 (v128, v128) -> (v128){{$}}
485; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
486; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
487; SIMD128-NEXT: return $pop[[R]]{{$}}
488define <8 x i16> @shuffle_undef_v8i16(<8 x i16> %x, <8 x i16> %y) {
489  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
490    <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
491               i32 undef, i32 undef, i32 undef, i32 undef>
492  ret <8 x i16> %res
493}
494
495; CHECK-LABEL: build_v8i16:
496; NO-SIMD128-NOT: i16x8
497; SIMD128-NEXT: .functype build_v8i16 (i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}}
498; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}}
499; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
500; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
501; SIMD128-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
502; SIMD128-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
503; SIMD128-NEXT: i16x8.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
504; SIMD128-NEXT: i16x8.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
505; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
506; SIMD128-NEXT: return $pop[[R]]{{$}}
507define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3,
508                              i16 %x4, i16 %x5, i16 %x6, i16 %x7) {
509  %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0
510  %t1 = insertelement <8 x i16> %t0, i16 %x1, i32 1
511  %t2 = insertelement <8 x i16> %t1, i16 %x2, i32 2
512  %t3 = insertelement <8 x i16> %t2, i16 %x3, i32 3
513  %t4 = insertelement <8 x i16> %t3, i16 %x4, i32 4
514  %t5 = insertelement <8 x i16> %t4, i16 %x5, i32 5
515  %t6 = insertelement <8 x i16> %t5, i16 %x6, i32 6
516  %res = insertelement <8 x i16> %t6, i16 %x7, i32 7
517  ret <8 x i16> %res
518}
519
520; ==============================================================================
521; 4 x i32
522; ==============================================================================
523; CHECK-LABEL: const_v4i32:
524; NO-SIMD128-NOT: i32x4
525; SIMD128-NEXT: .functype const_v4i32 () -> (v128){{$}}
526; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}}
527; SIMD128-NEXT: return $pop[[R]]{{$}}
528define <4 x i32> @const_v4i32() {
529  ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084>
530}
531
532; CHECK-LABEL: splat_v4i32:
533; NO-SIMD128-NOT: i32x4
534; SIMD128-NEXT: .functype splat_v4i32 (i32) -> (v128){{$}}
535; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
536; SIMD128-NEXT: return $pop[[R]]{{$}}
537define <4 x i32> @splat_v4i32(i32 %x) {
538  %v = insertelement <4 x i32> undef, i32 %x, i32 0
539  %res = shufflevector <4 x i32> %v, <4 x i32> undef,
540    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
541  ret <4 x i32> %res
542}
543
544; CHECK-LABEL: const_splat_v4i32:
545; SIMD128: v128.const $push0=, 42, 42, 42, 42{{$}}
546define <4 x i32> @const_splat_v4i32() {
547  ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
548}
549
550; CHECK-LABEL: extract_v4i32:
551; NO-SIMD128-NOT: i32x4
552; SIMD128-NEXT: .functype extract_v4i32 (v128) -> (i32){{$}}
553; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
554; SIMD128-NEXT: return $pop[[R]]{{$}}
555define i32 @extract_v4i32(<4 x i32> %v) {
556  %elem = extractelement <4 x i32> %v, i32 3
557  ret i32 %elem
558}
559
560; CHECK-LABEL: extract_var_v4i32:
561; NO-SIMD128-NOT: i32x4
562; SIMD128-NEXT: .functype extract_var_v4i32 (v128, i32) -> (i32){{$}}
563; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
564; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
565; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
566; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
567; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
568; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
569; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
570; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
571; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
572; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $2, $pop[[L7]]{{$}}
573; SIMD128-NEXT: i32.load $push[[R:[0-9]+]]=, 0($pop[[L4]]){{$}}
574; SIMD128-NEXT: return $pop[[R]]{{$}}
575define i32 @extract_var_v4i32(<4 x i32> %v, i32 %i) {
576  %elem = extractelement <4 x i32> %v, i32 %i
577  ret i32 %elem
578}
579
580; CHECK-LABEL: extract_zero_v4i32:
581; NO-SIMD128-NOT: i32x4
582; SIMD128-NEXT: .functype extract_zero_v4i32 (v128) -> (i32){{$}}
583; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
584; SIMD128-NEXT: return $pop[[R]]{{$}}
585define i32 @extract_zero_v4i32(<4 x i32> %v) {
586  %elem = extractelement <4 x i32> %v, i32 0
587  ret i32 %elem
588}
589
590; CHECK-LABEL: replace_v4i32:
591; NO-SIMD128-NOT: i32x4
592; SIMD128-NEXT: .functype replace_v4i32 (v128, i32) -> (v128){{$}}
593; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
594; SIMD128-NEXT: return $pop[[R]]{{$}}
595define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
596  %res = insertelement <4 x i32> %v, i32 %x, i32 2
597  ret <4 x i32> %res
598}
599
600; CHECK-LABEL: replace_var_v4i32:
601; NO-SIMD128-NOT: i32x4
602; SIMD128-NEXT: .functype replace_var_v4i32 (v128, i32, i32) -> (v128){{$}}
603; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
604; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
605; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
606; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
607; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
608; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
609; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
610; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
611; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
612; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $3, $pop[[L7]]{{$}}
613; SIMD128-NEXT: i32.store 0($pop[[L4]]), $2{{$}}
614; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
615; SIMD128-NEXT: return $pop[[R]]{{$}}
616define <4 x i32> @replace_var_v4i32(<4 x i32> %v, i32 %i, i32 %x) {
617  %res = insertelement <4 x i32> %v, i32 %x, i32 %i
618  ret <4 x i32> %res
619}
620
621; CHECK-LABEL: replace_zero_v4i32:
622; NO-SIMD128-NOT: i32x4
623; SIMD128-NEXT: .functype replace_zero_v4i32 (v128, i32) -> (v128){{$}}
624; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
625; SIMD128-NEXT: return $pop[[R]]{{$}}
626define <4 x i32> @replace_zero_v4i32(<4 x i32> %v, i32 %x) {
627  %res = insertelement <4 x i32> %v, i32 %x, i32 0
628  ret <4 x i32> %res
629}
630
631; CHECK-LABEL: shuffle_v4i32:
632; NO-SIMD128-NOT: i8x16
633; SIMD128-NEXT: .functype shuffle_v4i32 (v128, v128) -> (v128){{$}}
634; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
635; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
636; SIMD128-NEXT: return $pop[[R]]{{$}}
637define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) {
638  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
639    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
640  ret <4 x i32> %res
641}
642
643; CHECK-LABEL: shuffle_undef_v4i32:
644; NO-SIMD128-NOT: i8x16
645; SIMD128-NEXT: .functype shuffle_undef_v4i32 (v128, v128) -> (v128){{$}}
646; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
647; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
648; SIMD128-NEXT: return $pop[[R]]{{$}}
649define <4 x i32> @shuffle_undef_v4i32(<4 x i32> %x, <4 x i32> %y) {
650  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
651    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
652  ret <4 x i32> %res
653}
654
655; CHECK-LABEL: build_v4i32:
656; NO-SIMD128-NOT: i32x4
657; SIMD128-NEXT: .functype build_v4i32 (i32, i32, i32, i32) -> (v128){{$}}
658; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
659; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
660; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
661; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
662; SIMD128-NEXT: return $pop[[R]]{{$}}
663define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
664  %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0
665  %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1
666  %t2 = insertelement <4 x i32> %t1, i32 %x2, i32 2
667  %res = insertelement <4 x i32> %t2, i32 %x3, i32 3
668  ret <4 x i32> %res
669}
670
671; ==============================================================================
672; 2 x i64
673; ==============================================================================
674; CHECK-LABEL: const_v2i64:
675; NO-SIMD128-NOT: i64x2
676; SIMD128-NEXT: .functype const_v2i64 () -> (v128){{$}}
677; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}}
678; SIMD128-NEXT: return $pop[[R]]{{$}}
679define <2 x i64> @const_v2i64() {
680  ret <2 x i64> <i64 506097522914230528, i64 1084818905618843912>
681}
682
683; CHECK-LABEL: splat_v2i64:
684; NO-SIMD128-NOT: i64x2
685; SIMD128-NEXT: .functype splat_v2i64 (i64) -> (v128){{$}}
686; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
687; SIMD128-NEXT: return $pop[[R]]{{$}}
688define <2 x i64> @splat_v2i64(i64 %x) {
689  %t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
690  %res = insertelement <2 x i64> %t1, i64 %x, i32 1
691  ret <2 x i64> %res
692}
693
694; CHECK-LABEL: const_splat_v2i64:
695; SIMD128: v128.const $push0=, 42, 42{{$}}
696define <2 x i64> @const_splat_v2i64() {
697  ret <2 x i64> <i64 42, i64 42>
698}
699
700; CHECK-LABEL: extract_v2i64:
701; NO-SIMD128-NOT: i64x2
702; SIMD128-NEXT: .functype extract_v2i64 (v128) -> (i64){{$}}
703; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
704; SIMD128-NEXT: return $pop[[R]]{{$}}
705define i64 @extract_v2i64(<2 x i64> %v) {
706  %elem = extractelement <2 x i64> %v, i64 1
707  ret i64 %elem
708}
709
710; CHECK-LABEL: extract_var_v2i64:
711; NO-SIMD128-NOT: i64x2
712; SIMD128-NEXT: .functype extract_var_v2i64 (v128, i32) -> (i64){{$}}
713; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
714; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
715; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
716; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
717; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
718; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
719; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
720; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
721; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
722; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
723; SIMD128-NEXT: i64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
724; SIMD128-NEXT: return $pop[[R]]{{$}}
725define i64 @extract_var_v2i64(<2 x i64> %v, i32 %i) {
726  %elem = extractelement <2 x i64> %v, i32 %i
727  ret i64 %elem
728}
729
730; CHECK-LABEL: extract_zero_v2i64:
731; NO-SIMD128-NOT: i64x2
732; SIMD128-NEXT: .functype extract_zero_v2i64 (v128) -> (i64){{$}}
733; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
734; SIMD128-NEXT: return $pop[[R]]{{$}}
735define i64 @extract_zero_v2i64(<2 x i64> %v) {
736  %elem = extractelement <2 x i64> %v, i64 0
737  ret i64 %elem
738}
739
740; CHECK-LABEL: replace_v2i64:
741; NO-SIMD128-NOT: i64x2
742; SIMD128-NEXT: .functype replace_v2i64 (v128, i64) -> (v128){{$}}
743; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
744; SIMD128-NEXT: return $pop[[R]]{{$}}
745define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
746  %res = insertelement <2 x i64> %v, i64 %x, i32 0
747  ret <2 x i64> %res
748}
749
750; CHECK-LABEL: replace_var_v2i64:
751; NO-SIMD128-NOT: i64x2
752; SIMD128-NEXT: .functype replace_var_v2i64 (v128, i32, i64) -> (v128){{$}}
753; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
754; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
755; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
756; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
757; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
758; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
759; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
760; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
761; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
762; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
763; SIMD128-NEXT: i64.store 0($pop[[L2]]), $2{{$}}
764; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
765; SIMD128-NEXT: return $pop[[R]]{{$}}
766define <2 x i64> @replace_var_v2i64(<2 x i64> %v, i32 %i, i64 %x) {
767  %res = insertelement <2 x i64> %v, i64 %x, i32 %i
768  ret <2 x i64> %res
769}
770
771; CHECK-LABEL: replace_zero_v2i64:
772; NO-SIMD128-NOT: i64x2
773; SIMD128-NEXT: .functype replace_zero_v2i64 (v128, i64) -> (v128){{$}}
774; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
775; SIMD128-NEXT: return $pop[[R]]{{$}}
776define <2 x i64> @replace_zero_v2i64(<2 x i64> %v, i64 %x) {
777  %res = insertelement <2 x i64> %v, i64 %x, i32 0
778  ret <2 x i64> %res
779}
780
781; CHECK-LABEL: shuffle_v2i64:
782; NO-SIMD128-NOT: i8x16
783; SIMD128-NEXT: .functype shuffle_v2i64 (v128, v128) -> (v128){{$}}
784; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
785; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
786; SIMD128-NEXT: return $pop[[R]]{{$}}
787define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) {
788  %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3>
789  ret <2 x i64> %res
790}
791
792; CHECK-LABEL: shuffle_undef_v2i64:
793; NO-SIMD128-NOT: i8x16
794; SIMD128-NEXT: .functype shuffle_undef_v2i64 (v128, v128) -> (v128){{$}}
795; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
796; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
797; SIMD128-NEXT: return $pop[[R]]{{$}}
798define <2 x i64> @shuffle_undef_v2i64(<2 x i64> %x, <2 x i64> %y) {
799  %res = shufflevector <2 x i64> %x, <2 x i64> %y,
800    <2 x i32> <i32 1, i32 undef>
801  ret <2 x i64> %res
802}
803
804; CHECK-LABEL: build_v2i64:
805; NO-SIMD128-NOT: i64x2
806; SIMD128-NEXT: .functype build_v2i64 (i64, i64) -> (v128){{$}}
807; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
808; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
809; SIMD128-NEXT: return $pop[[R]]{{$}}
810define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) {
811  %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0
812  %res = insertelement <2 x i64> %t0, i64 %x1, i32 1
813  ret <2 x i64> %res
814}
815
816; ==============================================================================
817; 4 x f32
818; ==============================================================================
819; CHECK-LABEL: const_v4f32:
820; NO-SIMD128-NOT: f32x4
821; SIMD128-NEXT: .functype const_v4f32 () -> (v128){{$}}
822; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
823; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}}
824; SIMD128-NEXT: return $pop[[R]]{{$}}
825define <4 x float> @const_v4f32() {
826  ret <4 x float> <float 0x3860402000000000, float 0x38e0c0a080000000,
827                   float 0x3961412100000000, float 0x39e1c1a180000000>
828}
829
830; CHECK-LABEL: splat_v4f32:
831; NO-SIMD128-NOT: f32x4
832; SIMD128-NEXT: .functype splat_v4f32 (f32) -> (v128){{$}}
833; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
834; SIMD128-NEXT: return $pop[[R]]{{$}}
835define <4 x float> @splat_v4f32(float %x) {
836  %v = insertelement <4 x float> undef, float %x, i32 0
837  %res = shufflevector <4 x float> %v, <4 x float> undef,
838    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
839  ret <4 x float> %res
840}
841
842; CHECK-LABEL: const_splat_v4f32
843; SIMD128: v128.const $push0=, 0x1.5p5, 0x1.5p5, 0x1.5p5, 0x1.5p5{{$}}
844define <4 x float> @const_splat_v4f32() {
845  ret <4 x float> <float 42., float 42., float 42., float 42.>
846}
847
848; CHECK-LABEL: extract_v4f32:
849; NO-SIMD128-NOT: f32x4
850; SIMD128-NEXT: .functype extract_v4f32 (v128) -> (f32){{$}}
851; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
852; SIMD128-NEXT: return $pop[[R]]{{$}}
853define float @extract_v4f32(<4 x float> %v) {
854  %elem = extractelement <4 x float> %v, i32 3
855  ret float %elem
856}
857
858; CHECK-LABEL: extract_var_v4f32:
859; NO-SIMD128-NOT: i64x2
860; SIMD128-NEXT: .functype extract_var_v4f32 (v128, i32) -> (f32){{$}}
861; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
862; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
863; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
864; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
865; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
866; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
867; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
868; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
869; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
870; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
871; SIMD128-NEXT: f32.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
872; SIMD128-NEXT: return $pop[[R]]{{$}}
873define float @extract_var_v4f32(<4 x float> %v, i32 %i) {
874  %elem = extractelement <4 x float> %v, i32 %i
875  ret float %elem
876}
877
878; CHECK-LABEL: extract_zero_v4f32:
879; NO-SIMD128-NOT: f32x4
880; SIMD128-NEXT: .functype extract_zero_v4f32 (v128) -> (f32){{$}}
881; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
882; SIMD128-NEXT: return $pop[[R]]{{$}}
883define float @extract_zero_v4f32(<4 x float> %v) {
884  %elem = extractelement <4 x float> %v, i32 0
885  ret float %elem
886}
887
888; CHECK-LABEL: replace_v4f32:
889; NO-SIMD128-NOT: f32x4
890; SIMD128-NEXT: .functype replace_v4f32 (v128, f32) -> (v128){{$}}
891; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
892; SIMD128-NEXT: return $pop[[R]]{{$}}
893define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
894  %res = insertelement <4 x float> %v, float %x, i32 2
895  ret <4 x float> %res
896}
897
898; CHECK-LABEL: replace_var_v4f32:
899; NO-SIMD128-NOT: f32x4
900; SIMD128-NEXT: .functype replace_var_v4f32 (v128, i32, f32) -> (v128){{$}}
901; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
902; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
903; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
904; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
905; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
906; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
907; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
908; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
909; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
910; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
911; SIMD128-NEXT: f32.store 0($pop[[L2]]), $2{{$}}
912; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
913; SIMD128-NEXT: return $pop[[R]]{{$}}
914define <4 x float> @replace_var_v4f32(<4 x float> %v, i32 %i, float %x) {
915  %res = insertelement <4 x float> %v, float %x, i32 %i
916  ret <4 x float> %res
917}
918
919; CHECK-LABEL: replace_zero_v4f32:
920; NO-SIMD128-NOT: f32x4
921; SIMD128-NEXT: .functype replace_zero_v4f32 (v128, f32) -> (v128){{$}}
922; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
923; SIMD128-NEXT: return $pop[[R]]{{$}}
924define <4 x float> @replace_zero_v4f32(<4 x float> %v, float %x) {
925  %res = insertelement <4 x float> %v, float %x, i32 0
926  ret <4 x float> %res
927}
928
929; CHECK-LABEL: shuffle_v4f32:
930; NO-SIMD128-NOT: i8x16
931; SIMD128-NEXT: .functype shuffle_v4f32 (v128, v128) -> (v128){{$}}
932; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
933; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
934; SIMD128-NEXT: return $pop[[R]]{{$}}
935define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) {
936  %res = shufflevector <4 x float> %x, <4 x float> %y,
937    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
938  ret <4 x float> %res
939}
940
941; CHECK-LABEL: shuffle_undef_v4f32:
942; NO-SIMD128-NOT: i8x16
943; SIMD128-NEXT: .functype shuffle_undef_v4f32 (v128, v128) -> (v128){{$}}
944; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
945; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
946; SIMD128-NEXT: return $pop[[R]]{{$}}
947define <4 x float> @shuffle_undef_v4f32(<4 x float> %x, <4 x float> %y) {
948  %res = shufflevector <4 x float> %x, <4 x float> %y,
949    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
950  ret <4 x float> %res
951}
952
953; CHECK-LABEL: build_v4f32:
954; NO-SIMD128-NOT: f32x4
955; SIMD128-NEXT: .functype build_v4f32 (f32, f32, f32, f32) -> (v128){{$}}
956; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
957; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
958; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
959; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
960; SIMD128-NEXT: return $pop[[R]]{{$}}
961define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) {
962  %t0 = insertelement <4 x float> undef, float %x0, i32 0
963  %t1 = insertelement <4 x float> %t0, float %x1, i32 1
964  %t2 = insertelement <4 x float> %t1, float %x2, i32 2
965  %res = insertelement <4 x float> %t2, float %x3, i32 3
966  ret <4 x float> %res
967}
968
969; ==============================================================================
970; 2 x f64
971; ==============================================================================
972; CHECK-LABEL: const_v2f64:
973; NO-SIMD128-NOT: f64x2
974; SIMD128-NEXT: .functype const_v2f64 () -> (v128){{$}}
975; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}}
976; SIMD128-NEXT: return $pop[[R]]{{$}}
977define <2 x double> @const_v2f64() {
978  ret <2 x double> <double 0x0706050403020100, double 0x0F0E0D0C0B0A0908>
979}
980
981; CHECK-LABEL: splat_v2f64:
982; NO-SIMD128-NOT: f64x2
983; SIMD128-NEXT: .functype splat_v2f64 (f64) -> (v128){{$}}
984; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
985; SIMD128-NEXT: return $pop[[R]]{{$}}
986define <2 x double> @splat_v2f64(double %x) {
987  %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0
988  %res = insertelement <2 x double> %t1, double %x, i32 1
989  ret <2 x double> %res
990}
991
992; CHECK-LABEL: const_splat_v2f64:
993; SIMD128: v128.const $push0=, 0x1.5p5, 0x1.5p5{{$}}
994define <2 x double> @const_splat_v2f64() {
995  ret <2 x double> <double 42., double 42.>
996}
997
998; CHECK-LABEL: extract_v2f64:
999; NO-SIMD128-NOT: f64x2
1000; SIMD128-NEXT: .functype extract_v2f64 (v128) -> (f64){{$}}
1001; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
1002; SIMD128-NEXT: return $pop[[R]]{{$}}
1003define double @extract_v2f64(<2 x double> %v) {
1004  %elem = extractelement <2 x double> %v, i32 1
1005  ret double %elem
1006}
1007
1008; CHECK-LABEL: extract_var_v2f64:
1009; NO-SIMD128-NOT: i62x2
1010; SIMD128-NEXT: .functype extract_var_v2f64 (v128, i32) -> (f64){{$}}
1011; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
1012; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
1013; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
1014; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
1015; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
1016; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
1017; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
1018; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
1019; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
1020; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
1021; SIMD128-NEXT: f64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
1022; SIMD128-NEXT: return $pop[[R]]{{$}}
1023define double @extract_var_v2f64(<2 x double> %v, i32 %i) {
1024  %elem = extractelement <2 x double> %v, i32 %i
1025  ret double %elem
1026}
1027
1028; CHECK-LABEL: extract_zero_v2f64:
1029; NO-SIMD128-NOT: f64x2
1030; SIMD128-NEXT: .functype extract_zero_v2f64 (v128) -> (f64){{$}}
1031; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
1032; SIMD128-NEXT: return $pop[[R]]{{$}}
1033define double @extract_zero_v2f64(<2 x double> %v) {
1034  %elem = extractelement <2 x double> %v, i32 0
1035  ret double %elem
1036}
1037
1038; CHECK-LABEL: replace_v2f64:
1039; NO-SIMD128-NOT: f64x2
1040; SIMD128-NEXT: .functype replace_v2f64 (v128, f64) -> (v128){{$}}
1041; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
1042; SIMD128-NEXT: return $pop[[R]]{{$}}
1043define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
1044  %res = insertelement <2 x double> %v, double %x, i32 0
1045  ret <2 x double> %res
1046}
1047
1048; CHECK-LABEL: replace_var_v2f64:
1049; NO-SIMD128-NOT: f64x2
1050; SIMD128-NEXT: .functype replace_var_v2f64 (v128, i32, f64) -> (v128){{$}}
1051; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
1052; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
1053; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
1054; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
1055; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
1056; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
1057; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
1058; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
1059; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
1060; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
1061; SIMD128-NEXT: f64.store 0($pop[[L2]]), $2{{$}}
1062; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
1063; SIMD128-NEXT: return $pop[[R]]{{$}}
1064define <2 x double> @replace_var_v2f64(<2 x double> %v, i32 %i, double %x) {
1065  %res = insertelement <2 x double> %v, double %x, i32 %i
1066  ret <2 x double> %res
1067}
1068
1069; CHECK-LABEL: replace_zero_v2f64:
1070; NO-SIMD128-NOT: f64x2
1071; SIMD128-NEXT: .functype replace_zero_v2f64 (v128, f64) -> (v128){{$}}
1072; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
1073; SIMD128-NEXT: return $pop[[R]]{{$}}
1074define <2 x double> @replace_zero_v2f64(<2 x double> %v, double %x) {
1075  %res = insertelement <2 x double> %v, double %x, i32 0
1076  ret <2 x double> %res
1077}
1078
1079; CHECK-LABEL: shuffle_v2f64:
1080; NO-SIMD128-NOT: i8x16
1081; SIMD128-NEXT: .functype shuffle_v2f64 (v128, v128) -> (v128){{$}}
1082; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
1083; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
1084; SIMD128-NEXT: return $pop[[R]]{{$}}
1085define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) {
1086  %res = shufflevector <2 x double> %x, <2 x double> %y,
1087    <2 x i32> <i32 0, i32 3>
1088  ret <2 x double> %res
1089}
1090
1091; CHECK-LABEL: shuffle_undef_v2f64:
1092; NO-SIMD128-NOT: i8x16
1093; SIMD128-NEXT: .functype shuffle_undef_v2f64 (v128, v128) -> (v128){{$}}
1094; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
1095; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
1096; SIMD128-NEXT: return $pop[[R]]{{$}}
1097define <2 x double> @shuffle_undef_v2f64(<2 x double> %x, <2 x double> %y) {
1098  %res = shufflevector <2 x double> %x, <2 x double> %y,
1099    <2 x i32> <i32 1, i32 undef>
1100  ret <2 x double> %res
1101}
1102
1103; CHECK-LABEL: build_v2f64:
1104; NO-SIMD128-NOT: f64x2
1105; SIMD128-NEXT: .functype build_v2f64 (f64, f64) -> (v128){{$}}
1106; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
1107; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
1108; SIMD128-NEXT: return $pop[[R]]{{$}}
1109define <2 x double> @build_v2f64(double %x0, double %x1) {
1110  %t0 = insertelement <2 x double> undef, double %x0, i32 0
1111  %res = insertelement <2 x double> %t0, double %x1, i32 1
1112  ret <2 x double> %res
1113}
1114