1; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
3; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
4
5; Test that basic SIMD128 vector manipulation operations assemble as expected.
6
7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
8target triple = "wasm32-unknown-unknown"
9
10; ==============================================================================
11; 16 x i8
12; ==============================================================================
13; CHECK-LABEL: const_v16i8:
14; NO-SIMD128-NOT: i8x16
15; SIMD128-NEXT: .result v128{{$}}
16; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
17; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
18; SIMD128-NEXT: return $pop[[R]]{{$}}
19define <16 x i8> @const_v16i8() {
20  ret <16 x i8> <i8 00, i8 01, i8 02, i8 03, i8 04, i8 05, i8 06, i8 07,
21                 i8 08, i8 09, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
22}
23
24; CHECK-LABEL: splat_v16i8:
25; NO-SIMD128-NOT: i8x16
26; SIMD128-NEXT: .param i32{{$}}
27; SIMD128-NEXT: .result v128{{$}}
28; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}}
29; SIMD128-NEXT: return $pop[[R]]{{$}}
30define <16 x i8> @splat_v16i8(i8 %x) {
31  %v = insertelement <16 x i8> undef, i8 %x, i32 0
32  %res = shufflevector <16 x i8> %v, <16 x i8> undef,
33    <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0,
34                i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
35  ret <16 x i8> %res
36}
37
38; CHECK-LABEL: const_splat_v16i8:
39; SIMD128: i8x16.splat
40define <16 x i8> @const_splat_v16i8() {
41  ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
42                 i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
43}
44
45; CHECK-LABEL: extract_v16i8_s:
46; NO-SIMD128-NOT: i8x16
47; SIMD128-NEXT: .param v128{{$}}
48; SIMD128-NEXT: .result i32{{$}}
49; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}}
50; SIMD128-NEXT: return $pop[[R]]{{$}}
51define i32 @extract_v16i8_s(<16 x i8> %v) {
52  %elem = extractelement <16 x i8> %v, i8 13
53  %a = sext i8 %elem to i32
54  ret i32 %a
55}
56
57; CHECK-LABEL: extract_undef_v16i8_s:
58; NO-SIMD128-NOT: i8x16
59; SIMD128-NEXT: .param v128{{$}}
60; SIMD128-NEXT: .result i32{{$}}
61; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
62; SIMD128-NEXT: return $pop[[R]]{{$}}
63define i32 @extract_undef_v16i8_s(<16 x i8> %v) {
64  %elem = extractelement <16 x i8> %v, i8 undef
65  %a = sext i8 %elem to i32
66  ret i32 %a
67}
68
69; CHECK-LABEL: extract_v16i8_u:
70; NO-SIMD128-NOT: i8x16
71; SIMD128-NEXT: .param v128{{$}}
72; SIMD128-NEXT: .result i32{{$}}
73; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
74; SIMD128-NEXT: return $pop[[R]]{{$}}
75define i32 @extract_v16i8_u(<16 x i8> %v) {
76  %elem = extractelement <16 x i8> %v, i8 13
77  %a = zext i8 %elem to i32
78  ret i32 %a
79}
80
81; CHECK-LABEL: extract_undef_v16i8_u:
82; NO-SIMD128-NOT: i8x16
83; SIMD128-NEXT: .param v128{{$}}
84; SIMD128-NEXT: .result i32{{$}}
85; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
86; SIMD128-NEXT: return $pop[[R]]{{$}}
87define i32 @extract_undef_v16i8_u(<16 x i8> %v) {
88  %elem = extractelement <16 x i8> %v, i8 undef
89  %a = zext i8 %elem to i32
90  ret i32 %a
91}
92
93; CHECK-LABEL: extract_v16i8:
94; NO-SIMD128-NOT: i8x16
95; SIMD128-NEXT: .param v128{{$}}
96; SIMD128-NEXT: .result i32{{$}}
97; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
98; SIMD128-NEXT: return $pop[[R]]{{$}}
99define i8 @extract_v16i8(<16 x i8> %v) {
100  %elem = extractelement <16 x i8> %v, i8 13
101  ret i8 %elem
102}
103
104; CHECK-LABEL: extract_undef_v16i8:
105; NO-SIMD128-NOT: i8x16
106; SIMD128-NEXT: .param v128{{$}}
107; SIMD128-NEXT: .result i32{{$}}
108; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
109; SIMD128-NEXT: return $pop[[R]]{{$}}
110define i8 @extract_undef_v16i8(<16 x i8> %v) {
111  %elem = extractelement <16 x i8> %v, i8 undef
112  ret i8 %elem
113}
114
115; CHECK-LABEL: replace_v16i8:
116; NO-SIMD128-NOT: i8x16
117; SIMD128-NEXT: .param v128, i32{{$}}
118; SIMD128-NEXT: .result v128{{$}}
119; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}}
120; SIMD128-NEXT: return $pop[[R]]{{$}}
121define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
122  %res = insertelement <16 x i8> %v, i8 %x, i32 11
123  ret <16 x i8> %res
124}
125
126; CHECK-LABEL: replace_undef_v16i8:
127; NO-SIMD128-NOT: i8x16
128; SIMD128-NEXT: .param v128, i32{{$}}
129; SIMD128-NEXT: .result v128{{$}}
130; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
131; SIMD128-NEXT: return $pop[[R]]{{$}}
132define <16 x i8> @replace_undef_v16i8(<16 x i8> %v, i8 %x) {
133  %res = insertelement <16 x i8> %v, i8 %x, i32 undef
134  ret <16 x i8> %res
135}
136
137; CHECK-LABEL: shuffle_v16i8:
138; NO-SIMD128-NOT: v8x16
139; SIMD128-NEXT: .param v128, v128{{$}}
140; SIMD128-NEXT: .result v128{{$}}
141; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
142; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}}
143; SIMD128-NEXT: return $pop[[R]]{{$}}
144define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
145  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
146    <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23,
147                i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
148  ret <16 x i8> %res
149}
150
151; CHECK-LABEL: shuffle_undef_v16i8:
152; NO-SIMD128-NOT: v8x16
153; SIMD128-NEXT: .param v128, v128{{$}}
154; SIMD128-NEXT: .result v128{{$}}
155; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
156; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
157; SIMD128-NEXT: return $pop[[R]]{{$}}
158define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) {
159  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
160    <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
161                i32 undef, i32 undef, i32 undef, i32 undef,
162                i32 undef, i32 undef, i32 undef, i32 undef,
163                i32 undef, i32 undef, i32 undef, i32 undef>
164  ret <16 x i8> %res
165}
166
167; CHECK-LABEL: build_v16i8:
168; NO-SIMD128-NOT: i8x16
169; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
170; SIMD128-NEXT: .result v128{{$}}
171; SIMD128-NEXT: i8x16.splat $push[[L0:[0-9]+]]=, $0{{$}}
172; SIMD128-NEXT: i8x16.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
173; SIMD128-NEXT: i8x16.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
174; SIMD128-NEXT: i8x16.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
175; SIMD128-NEXT: i8x16.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
176; SIMD128-NEXT: i8x16.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
177; SIMD128-NEXT: i8x16.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
178; SIMD128-NEXT: i8x16.replace_lane $push[[L7:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
179; SIMD128-NEXT: i8x16.replace_lane $push[[L8:[0-9]+]]=, $pop[[L7]], 8, $8{{$}}
180; SIMD128-NEXT: i8x16.replace_lane $push[[L9:[0-9]+]]=, $pop[[L8]], 9, $9{{$}}
181; SIMD128-NEXT: i8x16.replace_lane $push[[L10:[0-9]+]]=, $pop[[L9]], 10, $10{{$}}
182; SIMD128-NEXT: i8x16.replace_lane $push[[L11:[0-9]+]]=, $pop[[L10]], 11, $11{{$}}
183; SIMD128-NEXT: i8x16.replace_lane $push[[L12:[0-9]+]]=, $pop[[L11]], 12, $12{{$}}
184; SIMD128-NEXT: i8x16.replace_lane $push[[L13:[0-9]+]]=, $pop[[L12]], 13, $13{{$}}
185; SIMD128-NEXT: i8x16.replace_lane $push[[L14:[0-9]+]]=, $pop[[L13]], 14, $14{{$}}
186; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $pop[[L14]], 15, $15{{$}}
187; SIMD128-NEXT: return $pop[[R]]{{$}}
188define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3,
189                              i8 %x4, i8 %x5, i8 %x6, i8 %x7,
190                              i8 %x8, i8 %x9, i8 %x10, i8 %x11,
191                              i8 %x12, i8 %x13, i8 %x14, i8 %x15) {
192  %t0 = insertelement <16 x i8> undef, i8 %x0, i32 0
193  %t1 = insertelement <16 x i8> %t0, i8 %x1, i32 1
194  %t2 = insertelement <16 x i8> %t1, i8 %x2, i32 2
195  %t3 = insertelement <16 x i8> %t2, i8 %x3, i32 3
196  %t4 = insertelement <16 x i8> %t3, i8 %x4, i32 4
197  %t5 = insertelement <16 x i8> %t4, i8 %x5, i32 5
198  %t6 = insertelement <16 x i8> %t5, i8 %x6, i32 6
199  %t7 = insertelement <16 x i8> %t6, i8 %x7, i32 7
200  %t8 = insertelement <16 x i8> %t7, i8 %x8, i32 8
201  %t9 = insertelement <16 x i8> %t8, i8 %x9, i32 9
202  %t10 = insertelement <16 x i8> %t9, i8 %x10, i32 10
203  %t11 = insertelement <16 x i8> %t10, i8 %x11, i32 11
204  %t12 = insertelement <16 x i8> %t11, i8 %x12, i32 12
205  %t13 = insertelement <16 x i8> %t12, i8 %x13, i32 13
206  %t14 = insertelement <16 x i8> %t13, i8 %x14, i32 14
207  %res = insertelement <16 x i8> %t14, i8 %x15, i32 15
208  ret <16 x i8> %res
209}
210
211; ==============================================================================
212; 8 x i16
213; ==============================================================================
214; CHECK-LABEL: const_v8i16:
215; NO-SIMD128-NOT: i16x8
216; SIMD128-NEXT: .result v128{{$}}
217; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}}
218; SIMD128-NEXT: return $pop[[R]]{{$}}
219define <8 x i16> @const_v8i16() {
220  ret <8 x i16> <i16 256, i16 770, i16 1284, i16 1798,
221                 i16 2312, i16 2826, i16 3340, i16 3854>
222}
223
224; CHECK-LABEL: splat_v8i16:
225; NO-SIMD128-NOT: i16x8
226; SIMD128-NEXT: .param i32{{$}}
227; SIMD128-NEXT: .result v128{{$}}
228; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}}
229; SIMD128-NEXT: return $pop[[R]]{{$}}
230define <8 x i16> @splat_v8i16(i16 %x) {
231  %v = insertelement <8 x i16> undef, i16 %x, i32 0
232  %res = shufflevector <8 x i16> %v, <8 x i16> undef,
233    <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
234  ret <8 x i16> %res
235}
236
237; CHECK-LABEL: const_splat_v8i16:
238; SIMD128: i16x8.splat
239define <8 x i16> @const_splat_v8i16() {
240  ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
241}
242
243; CHECK-LABEL: extract_v8i16_s:
244; NO-SIMD128-NOT: i16x8
245; SIMD128-NEXT: .param v128{{$}}
246; SIMD128-NEXT: .result i32{{$}}
247; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}}
248; SIMD128-NEXT: return $pop[[R]]{{$}}
249define i32 @extract_v8i16_s(<8 x i16> %v) {
250  %elem = extractelement <8 x i16> %v, i16 5
251  %a = sext i16 %elem to i32
252  ret i32 %a
253}
254
255; CHECK-LABEL: extract_undef_v8i16_s:
256; NO-SIMD128-NOT: i16x8
257; SIMD128-NEXT: .param v128{{$}}
258; SIMD128-NEXT: .result i32{{$}}
259; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
260; SIMD128-NEXT: return $pop[[R]]{{$}}
261define i32 @extract_undef_v8i16_s(<8 x i16> %v) {
262  %elem = extractelement <8 x i16> %v, i16 undef
263  %a = sext i16 %elem to i32
264  ret i32 %a
265}
266
267; CHECK-LABEL: extract_v8i16_u:
268; NO-SIMD128-NOT: i16x8
269; SIMD128-NEXT: .param v128{{$}}
270; SIMD128-NEXT: .result i32{{$}}
271; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
272; SIMD128-NEXT: return $pop[[R]]{{$}}
273define i32 @extract_v8i16_u(<8 x i16> %v) {
274  %elem = extractelement <8 x i16> %v, i16 5
275  %a = zext i16 %elem to i32
276  ret i32 %a
277}
278
279; CHECK-LABEL: extract_undef_v8i16_u:
280; NO-SIMD128-NOT: i16x8
281; SIMD128-NEXT: .param v128{{$}}
282; SIMD128-NEXT: .result i32{{$}}
283; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
284; SIMD128-NEXT: return $pop[[R]]{{$}}
285define i32 @extract_undef_v8i16_u(<8 x i16> %v) {
286  %elem = extractelement <8 x i16> %v, i16 undef
287  %a = zext i16 %elem to i32
288  ret i32 %a
289}
290
291; CHECK-LABEL: extract_v8i16:
292; NO-SIMD128-NOT: i16x8
293; SIMD128-NEXT: .param v128{{$}}
294; SIMD128-NEXT: .result i32{{$}}
295; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
296; SIMD128-NEXT: return $pop[[R]]{{$}}
297define i16 @extract_v8i16(<8 x i16> %v) {
298  %elem = extractelement <8 x i16> %v, i16 5
299  ret i16 %elem
300}
301
302; CHECK-LABEL: extract_undef_v8i16:
303; NO-SIMD128-NOT: i16x8
304; SIMD128-NEXT: .param v128{{$}}
305; SIMD128-NEXT: .result i32{{$}}
306; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
307; SIMD128-NEXT: return $pop[[R]]{{$}}
308define i16 @extract_undef_v8i16(<8 x i16> %v) {
309  %elem = extractelement <8 x i16> %v, i16 undef
310  ret i16 %elem
311}
312
313; CHECK-LABEL: replace_v8i16:
314; NO-SIMD128-NOT: i16x8
315; SIMD128-NEXT: .param v128, i32{{$}}
316; SIMD128-NEXT: .result v128{{$}}
317; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}}
318; SIMD128-NEXT: return $pop[[R]]{{$}}
319define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
320  %res = insertelement <8 x i16> %v, i16 %x, i32 7
321  ret <8 x i16> %res
322}
323
324; CHECK-LABEL: replace_undef_v8i16:
325; NO-SIMD128-NOT: i16x8
326; SIMD128-NEXT: .param v128, i32{{$}}
327; SIMD128-NEXT: .result v128{{$}}
328; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
329; SIMD128-NEXT: return $pop[[R]]{{$}}
330define <8 x i16> @replace_undef_v8i16(<8 x i16> %v, i16 %x) {
331  %res = insertelement <8 x i16> %v, i16 %x, i32 undef
332  ret <8 x i16> %res
333}
334
335; CHECK-LABEL: shuffle_v8i16:
336; NO-SIMD128-NOT: v8x16
337; SIMD128-NEXT: .param v128, v128{{$}}
338; SIMD128-NEXT: .result v128{{$}}
339; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
340; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}}
341; SIMD128-NEXT: return $pop[[R]]{{$}}
342define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) {
343  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
344    <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
345  ret <8 x i16> %res
346}
347
348; CHECK-LABEL: shuffle_undef_v8i16:
349; NO-SIMD128-NOT: v8x16
350; SIMD128-NEXT: .param v128, v128{{$}}
351; SIMD128-NEXT: .result v128{{$}}
352; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
353; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
354; SIMD128-NEXT: return $pop[[R]]{{$}}
355define <8 x i16> @shuffle_undef_v8i16(<8 x i16> %x, <8 x i16> %y) {
356  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
357    <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
358               i32 undef, i32 undef, i32 undef, i32 undef>
359  ret <8 x i16> %res
360}
361
362; CHECK-LABEL: build_v8i16:
363; NO-SIMD128-NOT: i16x8
364; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32{{$}}
365; SIMD128-NEXT: .result v128{{$}}
366; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}}
367; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
368; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
369; SIMD128-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
370; SIMD128-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
371; SIMD128-NEXT: i16x8.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
372; SIMD128-NEXT: i16x8.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
373; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
374; SIMD128-NEXT: return $pop[[R]]{{$}}
375define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3,
376                              i16 %x4, i16 %x5, i16 %x6, i16 %x7) {
377  %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0
378  %t1 = insertelement <8 x i16> %t0, i16 %x1, i32 1
379  %t2 = insertelement <8 x i16> %t1, i16 %x2, i32 2
380  %t3 = insertelement <8 x i16> %t2, i16 %x3, i32 3
381  %t4 = insertelement <8 x i16> %t3, i16 %x4, i32 4
382  %t5 = insertelement <8 x i16> %t4, i16 %x5, i32 5
383  %t6 = insertelement <8 x i16> %t5, i16 %x6, i32 6
384  %res = insertelement <8 x i16> %t6, i16 %x7, i32 7
385  ret <8 x i16> %res
386}
387
388; ==============================================================================
389; 4 x i32
390; ==============================================================================
391; CHECK-LABEL: const_v4i32:
392; NO-SIMD128-NOT: i32x4
393; SIMD128-NEXT: .result v128{{$}}
394; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}}
395; SIMD128-NEXT: return $pop[[R]]{{$}}
396define <4 x i32> @const_v4i32() {
397  ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084>
398}
399
400; CHECK-LABEL: splat_v4i32:
401; NO-SIMD128-NOT: i32x4
402; SIMD128-NEXT: .param i32{{$}}
403; SIMD128-NEXT: .result v128{{$}}
404; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
405; SIMD128-NEXT: return $pop[[R]]{{$}}
406define <4 x i32> @splat_v4i32(i32 %x) {
407  %v = insertelement <4 x i32> undef, i32 %x, i32 0
408  %res = shufflevector <4 x i32> %v, <4 x i32> undef,
409    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
410  ret <4 x i32> %res
411}
412
413; CHECK-LABEL: const_splat_v4i32:
414; SIMD128: i32x4.splat
415define <4 x i32> @const_splat_v4i32() {
416  ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
417}
418
419; CHECK-LABEL: extract_v4i32:
420; NO-SIMD128-NOT: i32x4
421; SIMD128-NEXT: .param v128{{$}}
422; SIMD128-NEXT: .result i32{{$}}
423; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
424; SIMD128-NEXT: return $pop[[R]]{{$}}
425define i32 @extract_v4i32(<4 x i32> %v) {
426  %elem = extractelement <4 x i32> %v, i32 3
427  ret i32 %elem
428}
429
430; CHECK-LABEL: extract_undef_v4i32:
431; NO-SIMD128-NOT: i32x4
432; SIMD128-NEXT: .param v128{{$}}
433; SIMD128-NEXT: .result i32{{$}}
434; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
435; SIMD128-NEXT: return $pop[[R]]{{$}}
436define i32 @extract_undef_v4i32(<4 x i32> %v) {
437  %elem = extractelement <4 x i32> %v, i32 undef
438  ret i32 %elem
439}
440
441; CHECK-LABEL: replace_v4i32:
442; NO-SIMD128-NOT: i32x4
443; SIMD128-NEXT: .param v128, i32{{$}}
444; SIMD128-NEXT: .result v128{{$}}
445; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
446; SIMD128-NEXT: return $pop[[R]]{{$}}
447define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
448  %res = insertelement <4 x i32> %v, i32 %x, i32 2
449  ret <4 x i32> %res
450}
451
452; CHECK-LABEL: replace_undef_v4i32:
453; NO-SIMD128-NOT: i32x4
454; SIMD128-NEXT: .param v128, i32{{$}}
455; SIMD128-NEXT: .result v128{{$}}
456; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
457; SIMD128-NEXT: return $pop[[R]]{{$}}
458define <4 x i32> @replace_undef_v4i32(<4 x i32> %v, i32 %x) {
459  %res = insertelement <4 x i32> %v, i32 %x, i32 undef
460  ret <4 x i32> %res
461}
462
463; CHECK-LABEL: shuffle_v4i32:
464; NO-SIMD128-NOT: v8x16
465; SIMD128-NEXT: .param v128, v128{{$}}
466; SIMD128-NEXT: .result v128{{$}}
467; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
468; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
469; SIMD128-NEXT: return $pop[[R]]{{$}}
470define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) {
471  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
472    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
473  ret <4 x i32> %res
474}
475
476; CHECK-LABEL: shuffle_undef_v4i32:
477; NO-SIMD128-NOT: v8x16
478; SIMD128-NEXT: .param v128, v128{{$}}
479; SIMD128-NEXT: .result v128{{$}}
480; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
481; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
482; SIMD128-NEXT: return $pop[[R]]{{$}}
483define <4 x i32> @shuffle_undef_v4i32(<4 x i32> %x, <4 x i32> %y) {
484  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
485    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
486  ret <4 x i32> %res
487}
488
489; CHECK-LABEL: build_v4i32:
490; NO-SIMD128-NOT: i32x4
491; SIMD128-NEXT: .param i32, i32, i32, i32{{$}}
492; SIMD128-NEXT: .result v128{{$}}
493; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
494; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
495; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
496; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
497; SIMD128-NEXT: return $pop[[R]]{{$}}
498define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
499  %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0
500  %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1
501  %t2 = insertelement <4 x i32> %t1, i32 %x2, i32 2
502  %res = insertelement <4 x i32> %t2, i32 %x3, i32 3
503  ret <4 x i32> %res
504}
505
506; ==============================================================================
507; 2 x i64
508; ==============================================================================
509; CHECK-LABEL: const_v2i64:
510; NO-SIMD128-NOT: i64x2
511; SIMD128-VM-NOT: i64x2
512; SIMD128-NEXT: .result v128{{$}}
513; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}}
514; SIMD128-NEXT: return $pop[[R]]{{$}}
515define <2 x i64> @const_v2i64() {
516  ret <2 x i64> <i64 506097522914230528, i64 1084818905618843912>
517}
518
519; CHECK-LABEL: splat_v2i64:
520; NO-SIMD128-NOT: i64x2
521; SIMD128-VM-NOT: i64x2
522; SIMD128-NEXT: .param i64{{$}}
523; SIMD128-NEXT: .result v128{{$}}
524; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
525; SIMD128-NEXT: return $pop[[R]]{{$}}
526define <2 x i64> @splat_v2i64(i64 %x) {
527  %t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
528  %res = insertelement <2 x i64> %t1, i64 %x, i32 1
529  ret <2 x i64> %res
530}
531
532; CHECK-LABEL: const_splat_v2i64:
533; SIMD128: i64x2.splat
534define <2 x i64> @const_splat_v2i64() {
535  ret <2 x i64> <i64 42, i64 42>
536}
537
538; CHECK-LABEL: extract_v2i64:
539; NO-SIMD128-NOT: i64x2
540; SIMD128-VM-NOT: i64x2
541; SIMD128-NEXT: .param v128{{$}}
542; SIMD128-NEXT: .result i64{{$}}
543; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
544; SIMD128-NEXT: return $pop[[R]]{{$}}
545define i64 @extract_v2i64(<2 x i64> %v) {
546  %elem = extractelement <2 x i64> %v, i64 1
547  ret i64 %elem
548}
549
550; CHECK-LABEL: extract_undef_v2i64:
551; NO-SIMD128-NOT: i64x2
552; SIMD128-VM-NOT: i64x2
553; SIMD128-NEXT: .param v128{{$}}
554; SIMD128-NEXT: .result i64{{$}}
555; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
556; SIMD128-NEXT: return $pop[[R]]{{$}}
557define i64 @extract_undef_v2i64(<2 x i64> %v) {
558  %elem = extractelement <2 x i64> %v, i64 undef
559  ret i64 %elem
560}
561
562; CHECK-LABEL: replace_v2i64:
563; NO-SIMD128-NOT: i64x2
564; SIMD128-VM-NOT: i64x2
565; SIMD128-NEXT: .param v128, i64{{$}}
566; SIMD128-NEXT: .result v128{{$}}
567; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
568; SIMD128-NEXT: return $pop[[R]]{{$}}
569define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
570  %res = insertelement <2 x i64> %v, i64 %x, i32 0
571  ret <2 x i64> %res
572}
573
574; CHECK-LABEL: replace_undef_v2i64:
575; NO-SIMD128-NOT: i64x2
576; SIMD128-VM-NOT: i64x2
577; SIMD128-NEXT: .param v128, i64{{$}}
578; SIMD128-NEXT: .result v128{{$}}
579; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
580; SIMD128-NEXT: return $pop[[R]]{{$}}
581define <2 x i64> @replace_undef_v2i64(<2 x i64> %v, i64 %x) {
582  %res = insertelement <2 x i64> %v, i64 %x, i32 undef
583  ret <2 x i64> %res
584}
585
586; CHECK-LABEL: shuffle_v2i64:
587; NO-SIMD128-NOT: v8x16
588; SIMD128-NEXT: .param v128, v128{{$}}
589; SIMD128-NEXT: .result v128{{$}}
590; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
591; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
592; SIMD128-NEXT: return $pop[[R]]{{$}}
593define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) {
594  %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3>
595  ret <2 x i64> %res
596}
597
598; CHECK-LABEL: shuffle_undef_v2i64:
599; NO-SIMD128-NOT: v8x16
600; SIMD128-NEXT: .param v128, v128{{$}}
601; SIMD128-NEXT: .result v128{{$}}
602; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
603; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
604; SIMD128-NEXT: return $pop[[R]]{{$}}
605define <2 x i64> @shuffle_undef_v2i64(<2 x i64> %x, <2 x i64> %y) {
606  %res = shufflevector <2 x i64> %x, <2 x i64> %y,
607    <2 x i32> <i32 1, i32 undef>
608  ret <2 x i64> %res
609}
610
611; CHECK-LABEL: build_v2i64:
612; NO-SIMD128-NOT: i64x2
613; SIMD128-VM-NOT: i64x2
614; SIMD128-NEXT: .param i64, i64{{$}}
615; SIMD128-NEXT: .result v128{{$}}
616; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
617; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
618; SIMD128-NEXT: return $pop[[R]]{{$}}
619define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) {
620  %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0
621  %res = insertelement <2 x i64> %t0, i64 %x1, i32 1
622  ret <2 x i64> %res
623}
624
625; ==============================================================================
626; 4 x f32
627; ==============================================================================
628; CHECK-LABEL: const_v4f32:
629; NO-SIMD128-NOT: f32x4
630; SIMD128-NEXT: .result v128{{$}}
631; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
632; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}}
633; SIMD128-NEXT: return $pop[[R]]{{$}}
634define <4 x float> @const_v4f32() {
635  ret <4 x float> <float 0x3860402000000000, float 0x38e0c0a080000000,
636                   float 0x3961412100000000, float 0x39e1c1a180000000>
637}
638
639; CHECK-LABEL: splat_v4f32:
640; NO-SIMD128-NOT: f32x4
641; SIMD128-NEXT: .param f32{{$}}
642; SIMD128-NEXT: .result v128{{$}}
643; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
644; SIMD128-NEXT: return $pop[[R]]{{$}}
645define <4 x float> @splat_v4f32(float %x) {
646  %v = insertelement <4 x float> undef, float %x, i32 0
647  %res = shufflevector <4 x float> %v, <4 x float> undef,
648    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
649  ret <4 x float> %res
650}
651
652; CHECK-LABEL: const_splat_v4f32
653; SIMD128: f32x4.splat
654define <4 x float> @const_splat_v4f32() {
655  ret <4 x float> <float 42., float 42., float 42., float 42.>
656}
657
658; CHECK-LABEL: extract_v4f32:
659; NO-SIMD128-NOT: f32x4
660; SIMD128-NEXT: .param v128{{$}}
661; SIMD128-NEXT: .result f32{{$}}
662; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
663; SIMD128-NEXT: return $pop[[R]]{{$}}
664define float @extract_v4f32(<4 x float> %v) {
665  %elem = extractelement <4 x float> %v, i32 3
666  ret float %elem
667}
668
669; CHECK-LABEL: extract_undef_v4f32:
670; NO-SIMD128-NOT: f32x4
671; SIMD128-NEXT: .param v128{{$}}
672; SIMD128-NEXT: .result f32{{$}}
673; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
674; SIMD128-NEXT: return $pop[[R]]{{$}}
675define float @extract_undef_v4f32(<4 x float> %v) {
676  %elem = extractelement <4 x float> %v, i32 undef
677  ret float %elem
678}
679
680; CHECK-LABEL: replace_v4f32:
681; NO-SIMD128-NOT: f32x4
682; SIMD128-NEXT: .param v128, f32{{$}}
683; SIMD128-NEXT: .result v128{{$}}
684; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
685; SIMD128-NEXT: return $pop[[R]]{{$}}
686define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
687  %res = insertelement <4 x float> %v, float %x, i32 2
688  ret <4 x float> %res
689}
690
691; CHECK-LABEL: replace_undef_v4f32:
692; NO-SIMD128-NOT: f32x4
693; SIMD128-NEXT: .param v128, f32{{$}}
694; SIMD128-NEXT: .result v128{{$}}
695; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
696; SIMD128-NEXT: return $pop[[R]]{{$}}
697define <4 x float> @replace_undef_v4f32(<4 x float> %v, float %x) {
698  %res = insertelement <4 x float> %v, float %x, i32 undef
699  ret <4 x float> %res
700}
701
702; CHECK-LABEL: shuffle_v4f32:
703; NO-SIMD128-NOT: v8x16
704; SIMD128-NEXT: .param v128, v128{{$}}
705; SIMD128-NEXT: .result v128{{$}}
706; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
707; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
708; SIMD128-NEXT: return $pop[[R]]{{$}}
709define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) {
710  %res = shufflevector <4 x float> %x, <4 x float> %y,
711    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
712  ret <4 x float> %res
713}
714
715; CHECK-LABEL: shuffle_undef_v4f32:
716; NO-SIMD128-NOT: v8x16
717; SIMD128-NEXT: .param v128, v128{{$}}
718; SIMD128-NEXT: .result v128{{$}}
719; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
720; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
721; SIMD128-NEXT: return $pop[[R]]{{$}}
722define <4 x float> @shuffle_undef_v4f32(<4 x float> %x, <4 x float> %y) {
723  %res = shufflevector <4 x float> %x, <4 x float> %y,
724    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
725  ret <4 x float> %res
726}
727
728; CHECK-LABEL: build_v4f32:
729; NO-SIMD128-NOT: f32x4
730; SIMD128-NEXT: .param f32, f32, f32, f32{{$}}
731; SIMD128-NEXT: .result v128{{$}}
732; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
733; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
734; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
735; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
736; SIMD128-NEXT: return $pop[[R]]{{$}}
737define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) {
738  %t0 = insertelement <4 x float> undef, float %x0, i32 0
739  %t1 = insertelement <4 x float> %t0, float %x1, i32 1
740  %t2 = insertelement <4 x float> %t1, float %x2, i32 2
741  %res = insertelement <4 x float> %t2, float %x3, i32 3
742  ret <4 x float> %res
743}
744
745; ==============================================================================
746; 2 x f64
747; ==============================================================================
748; CHECK-LABEL: const_v2f64:
749; NO-SIMD128-NOT: f64x2
750; SIMD128-NEXT: .result v128{{$}}
751; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}}
752; SIMD128-NEXT: return $pop[[R]]{{$}}
753define <2 x double> @const_v2f64() {
754  ret <2 x double> <double 0x0706050403020100, double 0x0F0E0D0C0B0A0908>
755}
756
757; CHECK-LABEL: splat_v2f64:
758; NO-SIMD128-NOT: f64x2
759; SIMD128-VM-NOT: f64x2
760; SIMD128-NEXT: .param f64{{$}}
761; SIMD128-NEXT: .result v128{{$}}
762; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
763; SIMD128-NEXT: return $pop[[R]]{{$}}
764define <2 x double> @splat_v2f64(double %x) {
765  %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0
766  %res = insertelement <2 x double> %t1, double %x, i32 1
767  ret <2 x double> %res
768}
769
770; CHECK-LABEL: const_splat_v2f64:
771; SIMD128: f64x2.splat
772define <2 x double> @const_splat_v2f64() {
773  ret <2 x double> <double 42., double 42.>
774}
775
776; CHECK-LABEL: extract_v2f64:
777; NO-SIMD128-NOT: f64x2
778; SIMD128-VM-NOT: f64x2
779; SIMD128-NEXT: .param v128{{$}}
780; SIMD128-NEXT: .result f64{{$}}
781; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
782; SIMD128-NEXT: return $pop[[R]]{{$}}
783define double @extract_v2f64(<2 x double> %v) {
784  %elem = extractelement <2 x double> %v, i32 1
785  ret double %elem
786}
787
788; CHECK-LABEL: extract_undef_v2f64:
789; NO-SIMD128-NOT: f64x2
790; SIMD128-VM-NOT: f64x2
791; SIMD128-NEXT: .param v128{{$}}
792; SIMD128-NEXT: .result f64{{$}}
793; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
794; SIMD128-NEXT: return $pop[[R]]{{$}}
795define double @extract_undef_v2f64(<2 x double> %v) {
796  %elem = extractelement <2 x double> %v, i32 undef
797  ret double %elem
798}
799
800; CHECK-LABEL: replace_v2f64:
801; NO-SIMD128-NOT: f64x2
802; SIMD128-VM-NOT: f64x2
803; SIMD128-NEXT: .param v128, f64{{$}}
804; SIMD128-NEXT: .result v128{{$}}
805; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
806; SIMD128-NEXT: return $pop[[R]]{{$}}
807define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
808  %res = insertelement <2 x double> %v, double %x, i32 0
809  ret <2 x double> %res
810}
811
812; CHECK-LABEL: replace_undef_v2f64:
813; NO-SIMD128-NOT: f64x2
814; SIMD128-VM-NOT: f64x2
815; SIMD128-NEXT: .param v128, f64{{$}}
816; SIMD128-NEXT: .result v128{{$}}
817; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
818; SIMD128-NEXT: return $pop[[R]]{{$}}
819define <2 x double> @replace_undef_v2f64(<2 x double> %v, double %x) {
820  %res = insertelement <2 x double> %v, double %x, i32 undef
821  ret <2 x double> %res
822}
823
824; CHECK-LABEL: shuffle_v2f64:
825; NO-SIMD128-NOT: v8x16
826; SIMD128-NEXT: .param v128, v128{{$}}
827; SIMD128-NEXT: .result v128{{$}}
828; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
829; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
830; SIMD128-NEXT: return $pop[[R]]{{$}}
831define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) {
832  %res = shufflevector <2 x double> %x, <2 x double> %y,
833    <2 x i32> <i32 0, i32 3>
834  ret <2 x double> %res
835}
836
837; CHECK-LABEL: shuffle_undef_v2f64:
838; NO-SIMD128-NOT: v8x16
839; SIMD128-NEXT: .param v128, v128{{$}}
840; SIMD128-NEXT: .result v128{{$}}
841; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
842; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
843; SIMD128-NEXT: return $pop[[R]]{{$}}
844define <2 x double> @shuffle_undef_v2f64(<2 x double> %x, <2 x double> %y) {
845  %res = shufflevector <2 x double> %x, <2 x double> %y,
846    <2 x i32> <i32 1, i32 undef>
847  ret <2 x double> %res
848}
849
850; CHECK-LABEL: build_v2f64:
851; NO-SIMD128-NOT: f64x2
852; SIMD128-VM-NOT: f64x2
853; SIMD128-NEXT: .param f64, f64{{$}}
854; SIMD128-NEXT: .result v128{{$}}
855; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
856; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
857; SIMD128-NEXT: return $pop[[R]]{{$}}
858define <2 x double> @build_v2f64(double %x0, double %x1) {
859  %t0 = insertelement <2 x double> undef, double %x0, i32 0
860  %res = insertelement <2 x double> %t0, double %x1, i32 1
861  ret <2 x double> %res
862}
863