1; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128 2; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM 3; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128 4 5; Test that basic SIMD128 vector manipulation operations assemble as expected. 6 7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" 8target triple = "wasm32-unknown-unknown" 9 10; ============================================================================== 11; 16 x i8 12; ============================================================================== 13; CHECK-LABEL: const_v16i8: 14; NO-SIMD128-NOT: i8x16 15; SIMD128-NEXT: .functype const_v16i8 () -> (v128){{$}} 16; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 17; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 18; SIMD128-NEXT: return $pop[[R]]{{$}} 19define <16 x i8> @const_v16i8() { 20 ret <16 x i8> <i8 00, i8 01, i8 02, i8 03, i8 04, i8 05, i8 06, i8 07, 21 i8 08, i8 09, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15> 22} 23 24; CHECK-LABEL: splat_v16i8: 25; NO-SIMD128-NOT: i8x16 26; SIMD128-NEXT: .functype splat_v16i8 (i32) -> (v128){{$}} 27; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}} 28; SIMD128-NEXT: return $pop[[R]]{{$}} 29define <16 x i8> @splat_v16i8(i8 %x) { 30 %v = insertelement <16 x i8> undef, i8 %x, i32 0 31 %res = shufflevector <16 x i8> %v, <16 x i8> undef, 32 <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, 33 i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> 34 ret <16 x i8> %res 35} 36 37; CHECK-LABEL: const_splat_v16i8: 38; SIMD128: i8x16.splat 39define <16 x i8> @const_splat_v16i8() { 40 ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, 41 i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42> 42} 43 44; CHECK-LABEL: extract_v16i8_s: 45; NO-SIMD128-NOT: i8x16 46; SIMD128-NEXT: .functype extract_v16i8_s (v128) -> (i32){{$}} 47; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}} 48; SIMD128-NEXT: return $pop[[R]]{{$}} 49define i32 @extract_v16i8_s(<16 x i8> %v) { 50 %elem = extractelement <16 x i8> %v, i8 13 51 %a = sext i8 %elem to i32 52 ret i32 %a 53} 54 55; CHECK-LABEL: extract_var_v16i8_s: 56; NO-SIMD128-NOT: i8x16 57; SIMD128-NEXT: .functype extract_var_v16i8_s (v128, i32) -> (i32){{$}} 58; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL 59; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16 60; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]] 61; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]] 62; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0 63; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15 64; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]] 65; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]] 66; SIMD128-NEXT: i32.load8_s $push[[R:[0-9]+]]=, 0($pop[[L6]]) 67; SIMD128-NEXT: return $pop[[R]] 68define i32 @extract_var_v16i8_s(<16 x i8> %v, i32 %i) { 69 %elem = extractelement <16 x i8> %v, i32 %i 70 %a = sext i8 %elem to i32 71 ret i32 %a 72} 73 74; CHECK-LABEL: extract_undef_v16i8_s: 75; NO-SIMD128-NOT: i8x16 76; SIMD128-NEXT: .functype extract_undef_v16i8_s (v128) -> (i32){{$}} 77; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}} 78; SIMD128-NEXT: return $pop[[R]]{{$}} 79define i32 @extract_undef_v16i8_s(<16 x i8> %v) { 80 %elem = extractelement <16 x i8> %v, i8 undef 81 %a = sext i8 %elem to i32 82 ret i32 %a 83} 84 85; CHECK-LABEL: extract_v16i8_u: 86; NO-SIMD128-NOT: i8x16 87; SIMD128-NEXT: .functype extract_v16i8_u (v128) -> (i32){{$}} 88; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}} 89; SIMD128-NEXT: return $pop[[R]]{{$}} 90define i32 @extract_v16i8_u(<16 x i8> %v) { 91 %elem = extractelement <16 x i8> %v, i8 13 92 %a = zext i8 %elem to i32 93 ret i32 %a 94} 95 96; CHECK-LABEL: extract_var_v16i8_u: 97; NO-SIMD128-NOT: i8x16 98; SIMD128-NEXT: .functype extract_var_v16i8_u (v128, i32) -> (i32){{$}} 99; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 100; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 101; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 102; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 103; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 104; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}} 105; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 106; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}} 107; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}} 108; SIMD128-NEXT: return $pop[[R]]{{$}} 109define i32 @extract_var_v16i8_u(<16 x i8> %v, i32 %i) { 110 %elem = extractelement <16 x i8> %v, i32 %i 111 %a = zext i8 %elem to i32 112 ret i32 %a 113} 114 115; CHECK-LABEL: extract_undef_v16i8_u: 116; NO-SIMD128-NOT: i8x16 117; SIMD128-NEXT: .functype extract_undef_v16i8_u (v128) -> (i32){{$}} 118; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}} 119; SIMD128-NEXT: return $pop[[R]]{{$}} 120define i32 @extract_undef_v16i8_u(<16 x i8> %v) { 121 %elem = extractelement <16 x i8> %v, i8 undef 122 %a = zext i8 %elem to i32 123 ret i32 %a 124} 125 126; CHECK-LABEL: extract_v16i8: 127; NO-SIMD128-NOT: i8x16 128; SIMD128-NEXT: .functype extract_v16i8 (v128) -> (i32){{$}} 129; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}} 130; SIMD128-NEXT: return $pop[[R]]{{$}} 131define i8 @extract_v16i8(<16 x i8> %v) { 132 %elem = extractelement <16 x i8> %v, i8 13 133 ret i8 %elem 134} 135 136; CHECK-LABEL: extract_var_v16i8: 137; NO-SIMD128-NOT: i8x16 138; SIMD128-NEXT: .functype extract_var_v16i8 (v128, i32) -> (i32){{$}} 139; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 140; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 141; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 142; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 143; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 144; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}} 145; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 146; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}} 147; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}} 148; SIMD128-NEXT: return $pop[[R]]{{$}} 149define i8 @extract_var_v16i8(<16 x i8> %v, i32 %i) { 150 %elem = extractelement <16 x i8> %v, i32 %i 151 ret i8 %elem 152} 153 154; CHECK-LABEL: extract_undef_v16i8: 155; NO-SIMD128-NOT: i8x16 156; SIMD128-NEXT: .functype extract_undef_v16i8 (v128) -> (i32){{$}} 157; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}} 158; SIMD128-NEXT: return $pop[[R]]{{$}} 159define i8 @extract_undef_v16i8(<16 x i8> %v) { 160 %elem = extractelement <16 x i8> %v, i8 undef 161 ret i8 %elem 162} 163 164; CHECK-LABEL: replace_v16i8: 165; NO-SIMD128-NOT: i8x16 166; SIMD128-NEXT: .functype replace_v16i8 (v128, i32) -> (v128){{$}} 167; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}} 168; SIMD128-NEXT: return $pop[[R]]{{$}} 169define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) { 170 %res = insertelement <16 x i8> %v, i8 %x, i32 11 171 ret <16 x i8> %res 172} 173 174; CHECK-LABEL: replace_var_v16i8: 175; NO-SIMD128-NOT: i8x16 176; SIMD128-NEXT: .functype replace_var_v16i8 (v128, i32, i32) -> (v128){{$}} 177; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 178; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 179; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 180; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 181; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 182; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}} 183; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 184; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $3, $pop[[L5]]{{$}} 185; SIMD128-NEXT: i32.store8 0($pop[[L6]]), $2{{$}} 186; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 187; SIMD128-NEXT: return $pop[[R]]{{$}} 188define <16 x i8> @replace_var_v16i8(<16 x i8> %v, i32 %i, i8 %x) { 189 %res = insertelement <16 x i8> %v, i8 %x, i32 %i 190 ret <16 x i8> %res 191} 192 193; CHECK-LABEL: replace_undef_v16i8: 194; NO-SIMD128-NOT: i8x16 195; SIMD128-NEXT: .functype replace_undef_v16i8 (v128, i32) -> (v128){{$}} 196; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 197; SIMD128-NEXT: return $pop[[R]]{{$}} 198define <16 x i8> @replace_undef_v16i8(<16 x i8> %v, i8 %x) { 199 %res = insertelement <16 x i8> %v, i8 %x, i32 undef 200 ret <16 x i8> %res 201} 202 203; CHECK-LABEL: shuffle_v16i8: 204; NO-SIMD128-NOT: v8x16 205; SIMD128-NEXT: .functype shuffle_v16i8 (v128, v128) -> (v128){{$}} 206; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 207; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}} 208; SIMD128-NEXT: return $pop[[R]]{{$}} 209define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) { 210 %res = shufflevector <16 x i8> %x, <16 x i8> %y, 211 <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, 212 i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31> 213 ret <16 x i8> %res 214} 215 216; CHECK-LABEL: shuffle_undef_v16i8: 217; NO-SIMD128-NOT: v8x16 218; SIMD128-NEXT: .functype shuffle_undef_v16i8 (v128, v128) -> (v128){{$}} 219; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 220; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 221; SIMD128-NEXT: return $pop[[R]]{{$}} 222define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) { 223 %res = shufflevector <16 x i8> %x, <16 x i8> %y, 224 <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, 225 i32 undef, i32 undef, i32 undef, i32 undef, 226 i32 undef, i32 undef, i32 undef, i32 undef, 227 i32 undef, i32 undef, i32 undef, i32 undef> 228 ret <16 x i8> %res 229} 230 231; CHECK-LABEL: build_v16i8: 232; NO-SIMD128-NOT: i8x16 233; SIMD128-NEXT: .functype build_v16i8 (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}} 234; SIMD128-NEXT: i8x16.splat $push[[L0:[0-9]+]]=, $0{{$}} 235; SIMD128-NEXT: i8x16.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 236; SIMD128-NEXT: i8x16.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} 237; SIMD128-NEXT: i8x16.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} 238; SIMD128-NEXT: i8x16.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}} 239; SIMD128-NEXT: i8x16.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}} 240; SIMD128-NEXT: i8x16.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}} 241; SIMD128-NEXT: i8x16.replace_lane $push[[L7:[0-9]+]]=, $pop[[L6]], 7, $7{{$}} 242; SIMD128-NEXT: i8x16.replace_lane $push[[L8:[0-9]+]]=, $pop[[L7]], 8, $8{{$}} 243; SIMD128-NEXT: i8x16.replace_lane $push[[L9:[0-9]+]]=, $pop[[L8]], 9, $9{{$}} 244; SIMD128-NEXT: i8x16.replace_lane $push[[L10:[0-9]+]]=, $pop[[L9]], 10, $10{{$}} 245; SIMD128-NEXT: i8x16.replace_lane $push[[L11:[0-9]+]]=, $pop[[L10]], 11, $11{{$}} 246; SIMD128-NEXT: i8x16.replace_lane $push[[L12:[0-9]+]]=, $pop[[L11]], 12, $12{{$}} 247; SIMD128-NEXT: i8x16.replace_lane $push[[L13:[0-9]+]]=, $pop[[L12]], 13, $13{{$}} 248; SIMD128-NEXT: i8x16.replace_lane $push[[L14:[0-9]+]]=, $pop[[L13]], 14, $14{{$}} 249; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $pop[[L14]], 15, $15{{$}} 250; SIMD128-NEXT: return $pop[[R]]{{$}} 251define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3, 252 i8 %x4, i8 %x5, i8 %x6, i8 %x7, 253 i8 %x8, i8 %x9, i8 %x10, i8 %x11, 254 i8 %x12, i8 %x13, i8 %x14, i8 %x15) { 255 %t0 = insertelement <16 x i8> undef, i8 %x0, i32 0 256 %t1 = insertelement <16 x i8> %t0, i8 %x1, i32 1 257 %t2 = insertelement <16 x i8> %t1, i8 %x2, i32 2 258 %t3 = insertelement <16 x i8> %t2, i8 %x3, i32 3 259 %t4 = insertelement <16 x i8> %t3, i8 %x4, i32 4 260 %t5 = insertelement <16 x i8> %t4, i8 %x5, i32 5 261 %t6 = insertelement <16 x i8> %t5, i8 %x6, i32 6 262 %t7 = insertelement <16 x i8> %t6, i8 %x7, i32 7 263 %t8 = insertelement <16 x i8> %t7, i8 %x8, i32 8 264 %t9 = insertelement <16 x i8> %t8, i8 %x9, i32 9 265 %t10 = insertelement <16 x i8> %t9, i8 %x10, i32 10 266 %t11 = insertelement <16 x i8> %t10, i8 %x11, i32 11 267 %t12 = insertelement <16 x i8> %t11, i8 %x12, i32 12 268 %t13 = insertelement <16 x i8> %t12, i8 %x13, i32 13 269 %t14 = insertelement <16 x i8> %t13, i8 %x14, i32 14 270 %res = insertelement <16 x i8> %t14, i8 %x15, i32 15 271 ret <16 x i8> %res 272} 273 274; ============================================================================== 275; 8 x i16 276; ============================================================================== 277; CHECK-LABEL: const_v8i16: 278; NO-SIMD128-NOT: i16x8 279; SIMD128-NEXT: .functype const_v8i16 () -> (v128){{$}} 280; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}} 281; SIMD128-NEXT: return $pop[[R]]{{$}} 282define <8 x i16> @const_v8i16() { 283 ret <8 x i16> <i16 256, i16 770, i16 1284, i16 1798, 284 i16 2312, i16 2826, i16 3340, i16 3854> 285} 286 287; CHECK-LABEL: splat_v8i16: 288; NO-SIMD128-NOT: i16x8 289; SIMD128-NEXT: .functype splat_v8i16 (i32) -> (v128){{$}} 290; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}} 291; SIMD128-NEXT: return $pop[[R]]{{$}} 292define <8 x i16> @splat_v8i16(i16 %x) { 293 %v = insertelement <8 x i16> undef, i16 %x, i32 0 294 %res = shufflevector <8 x i16> %v, <8 x i16> undef, 295 <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> 296 ret <8 x i16> %res 297} 298 299; CHECK-LABEL: const_splat_v8i16: 300; SIMD128: i16x8.splat 301define <8 x i16> @const_splat_v8i16() { 302 ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42> 303} 304 305; CHECK-LABEL: extract_v8i16_s: 306; NO-SIMD128-NOT: i16x8 307; SIMD128-NEXT: .functype extract_v8i16_s (v128) -> (i32){{$}} 308; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}} 309; SIMD128-NEXT: return $pop[[R]]{{$}} 310define i32 @extract_v8i16_s(<8 x i16> %v) { 311 %elem = extractelement <8 x i16> %v, i16 5 312 %a = sext i16 %elem to i32 313 ret i32 %a 314} 315 316; CHECK-LABEL: extract_var_v8i16_s: 317; NO-SIMD128-NOT: i16x8 318; SIMD128-NEXT: .functype extract_var_v8i16_s (v128, i32) -> (i32){{$}} 319; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 320; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 321; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 322; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 323; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 324; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}} 325; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 326; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}} 327; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 328; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}} 329; SIMD128-NEXT: i32.load16_s $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}} 330; SIMD128-NEXT: return $pop[[R]]{{$}} 331define i32 @extract_var_v8i16_s(<8 x i16> %v, i32 %i) { 332 %elem = extractelement <8 x i16> %v, i32 %i 333 %a = sext i16 %elem to i32 334 ret i32 %a 335} 336 337; CHECK-LABEL: extract_undef_v8i16_s: 338; NO-SIMD128-NOT: i16x8 339; SIMD128-NEXT: .functype extract_undef_v8i16_s (v128) -> (i32){{$}} 340; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}} 341; SIMD128-NEXT: return $pop[[R]]{{$}} 342define i32 @extract_undef_v8i16_s(<8 x i16> %v) { 343 %elem = extractelement <8 x i16> %v, i16 undef 344 %a = sext i16 %elem to i32 345 ret i32 %a 346} 347 348; CHECK-LABEL: extract_v8i16_u: 349; NO-SIMD128-NOT: i16x8 350; SIMD128-NEXT: .functype extract_v8i16_u (v128) -> (i32){{$}} 351; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}} 352; SIMD128-NEXT: return $pop[[R]]{{$}} 353define i32 @extract_v8i16_u(<8 x i16> %v) { 354 %elem = extractelement <8 x i16> %v, i16 5 355 %a = zext i16 %elem to i32 356 ret i32 %a 357} 358 359; CHECK-LABEL: extract_var_v8i16_u: 360; NO-SIMD128-NOT: i16x8 361; SIMD128-NEXT: .functype extract_var_v8i16_u (v128, i32) -> (i32){{$}} 362; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 363; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 364; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 365; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 366; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 367; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}} 368; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 369; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}} 370; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 371; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}} 372; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}} 373; SIMD128-NEXT: return $pop[[R]]{{$}} 374define i32 @extract_var_v8i16_u(<8 x i16> %v, i32 %i) { 375 %elem = extractelement <8 x i16> %v, i32 %i 376 %a = zext i16 %elem to i32 377 ret i32 %a 378} 379 380; CHECK-LABEL: extract_undef_v8i16_u: 381; NO-SIMD128-NOT: i16x8 382; SIMD128-NEXT: .functype extract_undef_v8i16_u (v128) -> (i32){{$}} 383; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}} 384; SIMD128-NEXT: return $pop[[R]]{{$}} 385define i32 @extract_undef_v8i16_u(<8 x i16> %v) { 386 %elem = extractelement <8 x i16> %v, i16 undef 387 %a = zext i16 %elem to i32 388 ret i32 %a 389} 390 391; CHECK-LABEL: extract_v8i16: 392; NO-SIMD128-NOT: i16x8 393; SIMD128-NEXT: .functype extract_v8i16 (v128) -> (i32){{$}} 394; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}} 395; SIMD128-NEXT: return $pop[[R]]{{$}} 396define i16 @extract_v8i16(<8 x i16> %v) { 397 %elem = extractelement <8 x i16> %v, i16 5 398 ret i16 %elem 399} 400 401; CHECK-LABEL: extract_var_v8i16: 402; NO-SIMD128-NOT: i16x8 403; SIMD128-NEXT: .functype extract_var_v8i16 (v128, i32) -> (i32){{$}} 404; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 405; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 406; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 407; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 408; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 409; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}} 410; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 411; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}} 412; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 413; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}} 414; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}} 415; SIMD128-NEXT: return $pop[[R]]{{$}} 416define i16 @extract_var_v8i16(<8 x i16> %v, i32 %i) { 417 %elem = extractelement <8 x i16> %v, i32 %i 418 ret i16 %elem 419} 420 421; CHECK-LABEL: extract_undef_v8i16: 422; NO-SIMD128-NOT: i16x8 423; SIMD128-NEXT: .functype extract_undef_v8i16 (v128) -> (i32){{$}} 424; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}} 425; SIMD128-NEXT: return $pop[[R]]{{$}} 426define i16 @extract_undef_v8i16(<8 x i16> %v) { 427 %elem = extractelement <8 x i16> %v, i16 undef 428 ret i16 %elem 429} 430 431; CHECK-LABEL: replace_v8i16: 432; NO-SIMD128-NOT: i16x8 433; SIMD128-NEXT: .functype replace_v8i16 (v128, i32) -> (v128){{$}} 434; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}} 435; SIMD128-NEXT: return $pop[[R]]{{$}} 436define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) { 437 %res = insertelement <8 x i16> %v, i16 %x, i32 7 438 ret <8 x i16> %res 439} 440 441; CHECK-LABEL: replace_var_v8i16: 442; NO-SIMD128-NOT: i16x8 443; SIMD128-NEXT: .functype replace_var_v8i16 (v128, i32, i32) -> (v128){{$}} 444; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 445; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 446; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 447; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 448; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 449; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}} 450; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 451; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}} 452; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 453; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $3, $pop[[L7]]{{$}} 454; SIMD128-NEXT: i32.store16 0($pop[[L8]]), $2{{$}} 455; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 456; SIMD128-NEXT: return $pop[[R]]{{$}} 457define <8 x i16> @replace_var_v8i16(<8 x i16> %v, i32 %i, i16 %x) { 458 %res = insertelement <8 x i16> %v, i16 %x, i32 %i 459 ret <8 x i16> %res 460} 461 462; CHECK-LABEL: replace_undef_v8i16: 463; NO-SIMD128-NOT: i16x8 464; SIMD128-NEXT: .functype replace_undef_v8i16 (v128, i32) -> (v128){{$}} 465; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 466; SIMD128-NEXT: return $pop[[R]]{{$}} 467define <8 x i16> @replace_undef_v8i16(<8 x i16> %v, i16 %x) { 468 %res = insertelement <8 x i16> %v, i16 %x, i32 undef 469 ret <8 x i16> %res 470} 471 472; CHECK-LABEL: shuffle_v8i16: 473; NO-SIMD128-NOT: v8x16 474; SIMD128-NEXT: .functype shuffle_v8i16 (v128, v128) -> (v128){{$}} 475; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 476; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}} 477; SIMD128-NEXT: return $pop[[R]]{{$}} 478define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) { 479 %res = shufflevector <8 x i16> %x, <8 x i16> %y, 480 <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15> 481 ret <8 x i16> %res 482} 483 484; CHECK-LABEL: shuffle_undef_v8i16: 485; NO-SIMD128-NOT: v8x16 486; SIMD128-NEXT: .functype shuffle_undef_v8i16 (v128, v128) -> (v128){{$}} 487; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 488; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 489; SIMD128-NEXT: return $pop[[R]]{{$}} 490define <8 x i16> @shuffle_undef_v8i16(<8 x i16> %x, <8 x i16> %y) { 491 %res = shufflevector <8 x i16> %x, <8 x i16> %y, 492 <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, 493 i32 undef, i32 undef, i32 undef, i32 undef> 494 ret <8 x i16> %res 495} 496 497; CHECK-LABEL: build_v8i16: 498; NO-SIMD128-NOT: i16x8 499; SIMD128-NEXT: .functype build_v8i16 (i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}} 500; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}} 501; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 502; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} 503; SIMD128-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} 504; SIMD128-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}} 505; SIMD128-NEXT: i16x8.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}} 506; SIMD128-NEXT: i16x8.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}} 507; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $pop[[L6]], 7, $7{{$}} 508; SIMD128-NEXT: return $pop[[R]]{{$}} 509define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3, 510 i16 %x4, i16 %x5, i16 %x6, i16 %x7) { 511 %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0 512 %t1 = insertelement <8 x i16> %t0, i16 %x1, i32 1 513 %t2 = insertelement <8 x i16> %t1, i16 %x2, i32 2 514 %t3 = insertelement <8 x i16> %t2, i16 %x3, i32 3 515 %t4 = insertelement <8 x i16> %t3, i16 %x4, i32 4 516 %t5 = insertelement <8 x i16> %t4, i16 %x5, i32 5 517 %t6 = insertelement <8 x i16> %t5, i16 %x6, i32 6 518 %res = insertelement <8 x i16> %t6, i16 %x7, i32 7 519 ret <8 x i16> %res 520} 521 522; ============================================================================== 523; 4 x i32 524; ============================================================================== 525; CHECK-LABEL: const_v4i32: 526; NO-SIMD128-NOT: i32x4 527; SIMD128-NEXT: .functype const_v4i32 () -> (v128){{$}} 528; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}} 529; SIMD128-NEXT: return $pop[[R]]{{$}} 530define <4 x i32> @const_v4i32() { 531 ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084> 532} 533 534; CHECK-LABEL: splat_v4i32: 535; NO-SIMD128-NOT: i32x4 536; SIMD128-NEXT: .functype splat_v4i32 (i32) -> (v128){{$}} 537; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}} 538; SIMD128-NEXT: return $pop[[R]]{{$}} 539define <4 x i32> @splat_v4i32(i32 %x) { 540 %v = insertelement <4 x i32> undef, i32 %x, i32 0 541 %res = shufflevector <4 x i32> %v, <4 x i32> undef, 542 <4 x i32> <i32 0, i32 0, i32 0, i32 0> 543 ret <4 x i32> %res 544} 545 546; CHECK-LABEL: const_splat_v4i32: 547; SIMD128: i32x4.splat 548define <4 x i32> @const_splat_v4i32() { 549 ret <4 x i32> <i32 42, i32 42, i32 42, i32 42> 550} 551 552; CHECK-LABEL: extract_v4i32: 553; NO-SIMD128-NOT: i32x4 554; SIMD128-NEXT: .functype extract_v4i32 (v128) -> (i32){{$}} 555; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}} 556; SIMD128-NEXT: return $pop[[R]]{{$}} 557define i32 @extract_v4i32(<4 x i32> %v) { 558 %elem = extractelement <4 x i32> %v, i32 3 559 ret i32 %elem 560} 561 562; CHECK-LABEL: extract_var_v4i32: 563; NO-SIMD128-NOT: i32x4 564; SIMD128-NEXT: .functype extract_var_v4i32 (v128, i32) -> (i32){{$}} 565; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 566; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 567; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 568; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 569; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 570; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}} 571; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 572; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}} 573; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 574; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $2, $pop[[L7]]{{$}} 575; SIMD128-NEXT: i32.load $push[[R:[0-9]+]]=, 0($pop[[L4]]){{$}} 576; SIMD128-NEXT: return $pop[[R]]{{$}} 577define i32 @extract_var_v4i32(<4 x i32> %v, i32 %i) { 578 %elem = extractelement <4 x i32> %v, i32 %i 579 ret i32 %elem 580} 581 582; CHECK-LABEL: extract_undef_v4i32: 583; NO-SIMD128-NOT: i32x4 584; SIMD128-NEXT: .functype extract_undef_v4i32 (v128) -> (i32){{$}} 585; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}} 586; SIMD128-NEXT: return $pop[[R]]{{$}} 587define i32 @extract_undef_v4i32(<4 x i32> %v) { 588 %elem = extractelement <4 x i32> %v, i32 undef 589 ret i32 %elem 590} 591 592; CHECK-LABEL: replace_v4i32: 593; NO-SIMD128-NOT: i32x4 594; SIMD128-NEXT: .functype replace_v4i32 (v128, i32) -> (v128){{$}} 595; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}} 596; SIMD128-NEXT: return $pop[[R]]{{$}} 597define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) { 598 %res = insertelement <4 x i32> %v, i32 %x, i32 2 599 ret <4 x i32> %res 600} 601 602; CHECK-LABEL: replace_var_v4i32: 603; NO-SIMD128-NOT: i32x4 604; SIMD128-NEXT: .functype replace_var_v4i32 (v128, i32, i32) -> (v128){{$}} 605; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 606; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 607; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 608; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 609; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 610; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}} 611; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 612; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}} 613; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 614; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $3, $pop[[L7]]{{$}} 615; SIMD128-NEXT: i32.store 0($pop[[L4]]), $2{{$}} 616; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 617; SIMD128-NEXT: return $pop[[R]]{{$}} 618define <4 x i32> @replace_var_v4i32(<4 x i32> %v, i32 %i, i32 %x) { 619 %res = insertelement <4 x i32> %v, i32 %x, i32 %i 620 ret <4 x i32> %res 621} 622 623; CHECK-LABEL: replace_undef_v4i32: 624; NO-SIMD128-NOT: i32x4 625; SIMD128-NEXT: .functype replace_undef_v4i32 (v128, i32) -> (v128){{$}} 626; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 627; SIMD128-NEXT: return $pop[[R]]{{$}} 628define <4 x i32> @replace_undef_v4i32(<4 x i32> %v, i32 %x) { 629 %res = insertelement <4 x i32> %v, i32 %x, i32 undef 630 ret <4 x i32> %res 631} 632 633; CHECK-LABEL: shuffle_v4i32: 634; NO-SIMD128-NOT: v8x16 635; SIMD128-NEXT: .functype shuffle_v4i32 (v128, v128) -> (v128){{$}} 636; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 637; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}} 638; SIMD128-NEXT: return $pop[[R]]{{$}} 639define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) { 640 %res = shufflevector <4 x i32> %x, <4 x i32> %y, 641 <4 x i32> <i32 0, i32 5, i32 2, i32 7> 642 ret <4 x i32> %res 643} 644 645; CHECK-LABEL: shuffle_undef_v4i32: 646; NO-SIMD128-NOT: v8x16 647; SIMD128-NEXT: .functype shuffle_undef_v4i32 (v128, v128) -> (v128){{$}} 648; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 649; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 650; SIMD128-NEXT: return $pop[[R]]{{$}} 651define <4 x i32> @shuffle_undef_v4i32(<4 x i32> %x, <4 x i32> %y) { 652 %res = shufflevector <4 x i32> %x, <4 x i32> %y, 653 <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> 654 ret <4 x i32> %res 655} 656 657; CHECK-LABEL: build_v4i32: 658; NO-SIMD128-NOT: i32x4 659; SIMD128-NEXT: .functype build_v4i32 (i32, i32, i32, i32) -> (v128){{$}} 660; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}} 661; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 662; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} 663; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} 664; SIMD128-NEXT: return $pop[[R]]{{$}} 665define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) { 666 %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0 667 %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1 668 %t2 = insertelement <4 x i32> %t1, i32 %x2, i32 2 669 %res = insertelement <4 x i32> %t2, i32 %x3, i32 3 670 ret <4 x i32> %res 671} 672 673; ============================================================================== 674; 2 x i64 675; ============================================================================== 676; CHECK-LABEL: const_v2i64: 677; NO-SIMD128-NOT: i64x2 678; SIMD128-VM-NOT: i64x2 679; SIMD128-NEXT: .functype const_v2i64 () -> (v128){{$}} 680; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}} 681; SIMD128-NEXT: return $pop[[R]]{{$}} 682define <2 x i64> @const_v2i64() { 683 ret <2 x i64> <i64 506097522914230528, i64 1084818905618843912> 684} 685 686; CHECK-LABEL: splat_v2i64: 687; NO-SIMD128-NOT: i64x2 688; SIMD128-VM-NOT: i64x2 689; SIMD128-NEXT: .functype splat_v2i64 (i64) -> (v128){{$}} 690; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}} 691; SIMD128-NEXT: return $pop[[R]]{{$}} 692define <2 x i64> @splat_v2i64(i64 %x) { 693 %t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0 694 %res = insertelement <2 x i64> %t1, i64 %x, i32 1 695 ret <2 x i64> %res 696} 697 698; CHECK-LABEL: const_splat_v2i64: 699; SIMD128: i64x2.splat 700define <2 x i64> @const_splat_v2i64() { 701 ret <2 x i64> <i64 42, i64 42> 702} 703 704; CHECK-LABEL: extract_v2i64: 705; NO-SIMD128-NOT: i64x2 706; SIMD128-VM-NOT: i64x2 707; SIMD128-NEXT: .functype extract_v2i64 (v128) -> (i64){{$}} 708; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}} 709; SIMD128-NEXT: return $pop[[R]]{{$}} 710define i64 @extract_v2i64(<2 x i64> %v) { 711 %elem = extractelement <2 x i64> %v, i64 1 712 ret i64 %elem 713} 714 715; CHECK-LABEL: extract_var_v2i64: 716; NO-SIMD128-NOT: i64x2 717; SIMD128-NEXT: .functype extract_var_v2i64 (v128, i32) -> (i64){{$}} 718; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 719; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 720; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 721; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 722; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 723; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}} 724; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 725; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}} 726; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 727; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}} 728; SIMD128-NEXT: i64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}} 729; SIMD128-NEXT: return $pop[[R]]{{$}} 730define i64 @extract_var_v2i64(<2 x i64> %v, i32 %i) { 731 %elem = extractelement <2 x i64> %v, i32 %i 732 ret i64 %elem 733} 734 735; CHECK-LABEL: extract_undef_v2i64: 736; NO-SIMD128-NOT: i64x2 737; SIMD128-VM-NOT: i64x2 738; SIMD128-NEXT: .functype extract_undef_v2i64 (v128) -> (i64){{$}} 739; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}} 740; SIMD128-NEXT: return $pop[[R]]{{$}} 741define i64 @extract_undef_v2i64(<2 x i64> %v) { 742 %elem = extractelement <2 x i64> %v, i64 undef 743 ret i64 %elem 744} 745 746; CHECK-LABEL: replace_v2i64: 747; NO-SIMD128-NOT: i64x2 748; SIMD128-VM-NOT: i64x2 749; SIMD128-NEXT: .functype replace_v2i64 (v128, i64) -> (v128){{$}} 750; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 751; SIMD128-NEXT: return $pop[[R]]{{$}} 752define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) { 753 %res = insertelement <2 x i64> %v, i64 %x, i32 0 754 ret <2 x i64> %res 755} 756 757; CHECK-LABEL: replace_var_v2i64: 758; NO-SIMD128-NOT: i64x2 759; SIMD128-VM-NOT: i64x2 760; SIMD128-NEXT: .functype replace_var_v2i64 (v128, i32, i64) -> (v128){{$}} 761; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 762; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 763; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 764; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 765; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 766; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}} 767; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 768; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}} 769; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 770; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}} 771; SIMD128-NEXT: i64.store 0($pop[[L2]]), $2{{$}} 772; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 773; SIMD128-NEXT: return $pop[[R]]{{$}} 774define <2 x i64> @replace_var_v2i64(<2 x i64> %v, i32 %i, i64 %x) { 775 %res = insertelement <2 x i64> %v, i64 %x, i32 %i 776 ret <2 x i64> %res 777} 778 779; CHECK-LABEL: replace_undef_v2i64: 780; NO-SIMD128-NOT: i64x2 781; SIMD128-VM-NOT: i64x2 782; SIMD128-NEXT: .functype replace_undef_v2i64 (v128, i64) -> (v128){{$}} 783; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 784; SIMD128-NEXT: return $pop[[R]]{{$}} 785define <2 x i64> @replace_undef_v2i64(<2 x i64> %v, i64 %x) { 786 %res = insertelement <2 x i64> %v, i64 %x, i32 undef 787 ret <2 x i64> %res 788} 789 790; CHECK-LABEL: shuffle_v2i64: 791; NO-SIMD128-NOT: v8x16 792; SIMD128-NEXT: .functype shuffle_v2i64 (v128, v128) -> (v128){{$}} 793; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 794; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}} 795; SIMD128-NEXT: return $pop[[R]]{{$}} 796define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) { 797 %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3> 798 ret <2 x i64> %res 799} 800 801; CHECK-LABEL: shuffle_undef_v2i64: 802; NO-SIMD128-NOT: v8x16 803; SIMD128-NEXT: .functype shuffle_undef_v2i64 (v128, v128) -> (v128){{$}} 804; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 805; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 806; SIMD128-NEXT: return $pop[[R]]{{$}} 807define <2 x i64> @shuffle_undef_v2i64(<2 x i64> %x, <2 x i64> %y) { 808 %res = shufflevector <2 x i64> %x, <2 x i64> %y, 809 <2 x i32> <i32 1, i32 undef> 810 ret <2 x i64> %res 811} 812 813; CHECK-LABEL: build_v2i64: 814; NO-SIMD128-NOT: i64x2 815; SIMD128-VM-NOT: i64x2 816; SIMD128-NEXT: .functype build_v2i64 (i64, i64) -> (v128){{$}} 817; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}} 818; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 819; SIMD128-NEXT: return $pop[[R]]{{$}} 820define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) { 821 %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0 822 %res = insertelement <2 x i64> %t0, i64 %x1, i32 1 823 ret <2 x i64> %res 824} 825 826; ============================================================================== 827; 4 x f32 828; ============================================================================== 829; CHECK-LABEL: const_v4f32: 830; NO-SIMD128-NOT: f32x4 831; SIMD128-NEXT: .functype const_v4f32 () -> (v128){{$}} 832; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 833; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}} 834; SIMD128-NEXT: return $pop[[R]]{{$}} 835define <4 x float> @const_v4f32() { 836 ret <4 x float> <float 0x3860402000000000, float 0x38e0c0a080000000, 837 float 0x3961412100000000, float 0x39e1c1a180000000> 838} 839 840; CHECK-LABEL: splat_v4f32: 841; NO-SIMD128-NOT: f32x4 842; SIMD128-NEXT: .functype splat_v4f32 (f32) -> (v128){{$}} 843; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}} 844; SIMD128-NEXT: return $pop[[R]]{{$}} 845define <4 x float> @splat_v4f32(float %x) { 846 %v = insertelement <4 x float> undef, float %x, i32 0 847 %res = shufflevector <4 x float> %v, <4 x float> undef, 848 <4 x i32> <i32 0, i32 0, i32 0, i32 0> 849 ret <4 x float> %res 850} 851 852; CHECK-LABEL: const_splat_v4f32 853; SIMD128: f32x4.splat 854define <4 x float> @const_splat_v4f32() { 855 ret <4 x float> <float 42., float 42., float 42., float 42.> 856} 857 858; CHECK-LABEL: extract_v4f32: 859; NO-SIMD128-NOT: f32x4 860; SIMD128-NEXT: .functype extract_v4f32 (v128) -> (f32){{$}} 861; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}} 862; SIMD128-NEXT: return $pop[[R]]{{$}} 863define float @extract_v4f32(<4 x float> %v) { 864 %elem = extractelement <4 x float> %v, i32 3 865 ret float %elem 866} 867 868; CHECK-LABEL: extract_var_v4f32: 869; NO-SIMD128-NOT: i64x2 870; SIMD128-NEXT: .functype extract_var_v4f32 (v128, i32) -> (f32){{$}} 871; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 872; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 873; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 874; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 875; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 876; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}} 877; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 878; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}} 879; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 880; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}} 881; SIMD128-NEXT: f32.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}} 882; SIMD128-NEXT: return $pop[[R]]{{$}} 883define float @extract_var_v4f32(<4 x float> %v, i32 %i) { 884 %elem = extractelement <4 x float> %v, i32 %i 885 ret float %elem 886} 887 888; CHECK-LABEL: extract_undef_v4f32: 889; NO-SIMD128-NOT: f32x4 890; SIMD128-NEXT: .functype extract_undef_v4f32 (v128) -> (f32){{$}} 891; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}} 892; SIMD128-NEXT: return $pop[[R]]{{$}} 893define float @extract_undef_v4f32(<4 x float> %v) { 894 %elem = extractelement <4 x float> %v, i32 undef 895 ret float %elem 896} 897 898; CHECK-LABEL: replace_v4f32: 899; NO-SIMD128-NOT: f32x4 900; SIMD128-NEXT: .functype replace_v4f32 (v128, f32) -> (v128){{$}} 901; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}} 902; SIMD128-NEXT: return $pop[[R]]{{$}} 903define <4 x float> @replace_v4f32(<4 x float> %v, float %x) { 904 %res = insertelement <4 x float> %v, float %x, i32 2 905 ret <4 x float> %res 906} 907 908; CHECK-LABEL: replace_var_v4f32: 909; NO-SIMD128-NOT: f32x4 910; SIMD128-NEXT: .functype replace_var_v4f32 (v128, i32, f32) -> (v128){{$}} 911; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 912; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 913; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 914; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 915; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 916; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}} 917; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 918; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}} 919; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 920; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}} 921; SIMD128-NEXT: f32.store 0($pop[[L2]]), $2{{$}} 922; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 923; SIMD128-NEXT: return $pop[[R]]{{$}} 924define <4 x float> @replace_var_v4f32(<4 x float> %v, i32 %i, float %x) { 925 %res = insertelement <4 x float> %v, float %x, i32 %i 926 ret <4 x float> %res 927} 928 929; CHECK-LABEL: replace_undef_v4f32: 930; NO-SIMD128-NOT: f32x4 931; SIMD128-NEXT: .functype replace_undef_v4f32 (v128, f32) -> (v128){{$}} 932; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 933; SIMD128-NEXT: return $pop[[R]]{{$}} 934define <4 x float> @replace_undef_v4f32(<4 x float> %v, float %x) { 935 %res = insertelement <4 x float> %v, float %x, i32 undef 936 ret <4 x float> %res 937} 938 939; CHECK-LABEL: shuffle_v4f32: 940; NO-SIMD128-NOT: v8x16 941; SIMD128-NEXT: .functype shuffle_v4f32 (v128, v128) -> (v128){{$}} 942; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 943; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}} 944; SIMD128-NEXT: return $pop[[R]]{{$}} 945define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) { 946 %res = shufflevector <4 x float> %x, <4 x float> %y, 947 <4 x i32> <i32 0, i32 5, i32 2, i32 7> 948 ret <4 x float> %res 949} 950 951; CHECK-LABEL: shuffle_undef_v4f32: 952; NO-SIMD128-NOT: v8x16 953; SIMD128-NEXT: .functype shuffle_undef_v4f32 (v128, v128) -> (v128){{$}} 954; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 955; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 956; SIMD128-NEXT: return $pop[[R]]{{$}} 957define <4 x float> @shuffle_undef_v4f32(<4 x float> %x, <4 x float> %y) { 958 %res = shufflevector <4 x float> %x, <4 x float> %y, 959 <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> 960 ret <4 x float> %res 961} 962 963; CHECK-LABEL: build_v4f32: 964; NO-SIMD128-NOT: f32x4 965; SIMD128-NEXT: .functype build_v4f32 (f32, f32, f32, f32) -> (v128){{$}} 966; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}} 967; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 968; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} 969; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} 970; SIMD128-NEXT: return $pop[[R]]{{$}} 971define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) { 972 %t0 = insertelement <4 x float> undef, float %x0, i32 0 973 %t1 = insertelement <4 x float> %t0, float %x1, i32 1 974 %t2 = insertelement <4 x float> %t1, float %x2, i32 2 975 %res = insertelement <4 x float> %t2, float %x3, i32 3 976 ret <4 x float> %res 977} 978 979; ============================================================================== 980; 2 x f64 981; ============================================================================== 982; CHECK-LABEL: const_v2f64: 983; NO-SIMD128-NOT: f64x2 984; SIMD128-NEXT: .functype const_v2f64 () -> (v128){{$}} 985; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}} 986; SIMD128-NEXT: return $pop[[R]]{{$}} 987define <2 x double> @const_v2f64() { 988 ret <2 x double> <double 0x0706050403020100, double 0x0F0E0D0C0B0A0908> 989} 990 991; CHECK-LABEL: splat_v2f64: 992; NO-SIMD128-NOT: f64x2 993; SIMD128-VM-NOT: f64x2 994; SIMD128-NEXT: .functype splat_v2f64 (f64) -> (v128){{$}} 995; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}} 996; SIMD128-NEXT: return $pop[[R]]{{$}} 997define <2 x double> @splat_v2f64(double %x) { 998 %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0 999 %res = insertelement <2 x double> %t1, double %x, i32 1 1000 ret <2 x double> %res 1001} 1002 1003; CHECK-LABEL: const_splat_v2f64: 1004; SIMD128: f64x2.splat 1005define <2 x double> @const_splat_v2f64() { 1006 ret <2 x double> <double 42., double 42.> 1007} 1008 1009; CHECK-LABEL: extract_v2f64: 1010; NO-SIMD128-NOT: f64x2 1011; SIMD128-VM-NOT: f64x2 1012; SIMD128-NEXT: .functype extract_v2f64 (v128) -> (f64){{$}} 1013; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}} 1014; SIMD128-NEXT: return $pop[[R]]{{$}} 1015define double @extract_v2f64(<2 x double> %v) { 1016 %elem = extractelement <2 x double> %v, i32 1 1017 ret double %elem 1018} 1019 1020; CHECK-LABEL: extract_var_v2f64: 1021; NO-SIMD128-NOT: i62x2 1022; SIMD128-NEXT: .functype extract_var_v2f64 (v128, i32) -> (f64){{$}} 1023; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 1024; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 1025; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 1026; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 1027; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 1028; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}} 1029; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 1030; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}} 1031; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 1032; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}} 1033; SIMD128-NEXT: f64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}} 1034; SIMD128-NEXT: return $pop[[R]]{{$}} 1035define double @extract_var_v2f64(<2 x double> %v, i32 %i) { 1036 %elem = extractelement <2 x double> %v, i32 %i 1037 ret double %elem 1038} 1039 1040; CHECK-LABEL: extract_undef_v2f64: 1041; NO-SIMD128-NOT: f64x2 1042; SIMD128-VM-NOT: f64x2 1043; SIMD128-NEXT: .functype extract_undef_v2f64 (v128) -> (f64){{$}} 1044; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}} 1045; SIMD128-NEXT: return $pop[[R]]{{$}} 1046define double @extract_undef_v2f64(<2 x double> %v) { 1047 %elem = extractelement <2 x double> %v, i32 undef 1048 ret double %elem 1049} 1050 1051; CHECK-LABEL: replace_v2f64: 1052; NO-SIMD128-NOT: f64x2 1053; SIMD128-VM-NOT: f64x2 1054; SIMD128-NEXT: .functype replace_v2f64 (v128, f64) -> (v128){{$}} 1055; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 1056; SIMD128-NEXT: return $pop[[R]]{{$}} 1057define <2 x double> @replace_v2f64(<2 x double> %v, double %x) { 1058 %res = insertelement <2 x double> %v, double %x, i32 0 1059 ret <2 x double> %res 1060} 1061 1062; CHECK-LABEL: replace_var_v2f64: 1063; NO-SIMD128-NOT: f64x2 1064; SIMD128-VM-NOT: f64x2 1065; SIMD128-NEXT: .functype replace_var_v2f64 (v128, i32, f64) -> (v128){{$}} 1066; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}} 1067; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 1068; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 1069; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 1070; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 1071; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}} 1072; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 1073; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}} 1074; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 1075; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}} 1076; SIMD128-NEXT: f64.store 0($pop[[L2]]), $2{{$}} 1077; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 1078; SIMD128-NEXT: return $pop[[R]]{{$}} 1079define <2 x double> @replace_var_v2f64(<2 x double> %v, i32 %i, double %x) { 1080 %res = insertelement <2 x double> %v, double %x, i32 %i 1081 ret <2 x double> %res 1082} 1083 1084; CHECK-LABEL: replace_undef_v2f64: 1085; NO-SIMD128-NOT: f64x2 1086; SIMD128-VM-NOT: f64x2 1087; SIMD128-NEXT: .functype replace_undef_v2f64 (v128, f64) -> (v128){{$}} 1088; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 1089; SIMD128-NEXT: return $pop[[R]]{{$}} 1090define <2 x double> @replace_undef_v2f64(<2 x double> %v, double %x) { 1091 %res = insertelement <2 x double> %v, double %x, i32 undef 1092 ret <2 x double> %res 1093} 1094 1095; CHECK-LABEL: shuffle_v2f64: 1096; NO-SIMD128-NOT: v8x16 1097; SIMD128-NEXT: .functype shuffle_v2f64 (v128, v128) -> (v128){{$}} 1098; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 1099; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}} 1100; SIMD128-NEXT: return $pop[[R]]{{$}} 1101define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) { 1102 %res = shufflevector <2 x double> %x, <2 x double> %y, 1103 <2 x i32> <i32 0, i32 3> 1104 ret <2 x double> %res 1105} 1106 1107; CHECK-LABEL: shuffle_undef_v2f64: 1108; NO-SIMD128-NOT: v8x16 1109; SIMD128-NEXT: .functype shuffle_undef_v2f64 (v128, v128) -> (v128){{$}} 1110; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 1111; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 1112; SIMD128-NEXT: return $pop[[R]]{{$}} 1113define <2 x double> @shuffle_undef_v2f64(<2 x double> %x, <2 x double> %y) { 1114 %res = shufflevector <2 x double> %x, <2 x double> %y, 1115 <2 x i32> <i32 1, i32 undef> 1116 ret <2 x double> %res 1117} 1118 1119; CHECK-LABEL: build_v2f64: 1120; NO-SIMD128-NOT: f64x2 1121; SIMD128-VM-NOT: f64x2 1122; SIMD128-NEXT: .functype build_v2f64 (f64, f64) -> (v128){{$}} 1123; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}} 1124; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 1125; SIMD128-NEXT: return $pop[[R]]{{$}} 1126define <2 x double> @build_v2f64(double %x0, double %x1) { 1127 %t0 = insertelement <2 x double> undef, double %x0, i32 0 1128 %res = insertelement <2 x double> %t0, double %x1, i32 1 1129 ret <2 x double> %res 1130} 1131