1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,NO-SIMD128
3
4; Test that basic SIMD128 vector manipulation operations assemble as expected.
5
6target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
7target triple = "wasm32-unknown-unknown"
8
9; ==============================================================================
10; 16 x i8
11; ==============================================================================
12; CHECK-LABEL: const_v16i8:
13; NO-SIMD128-NOT: i8x16
14; SIMD128-NEXT: .functype const_v16i8 () -> (v128){{$}}
15; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
16; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
17; SIMD128-NEXT: return $pop[[R]]{{$}}
18define <16 x i8> @const_v16i8() {
19  ret <16 x i8> <i8 00, i8 01, i8 02, i8 03, i8 04, i8 05, i8 06, i8 07,
20                 i8 08, i8 09, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
21}
22
23; CHECK-LABEL: splat_v16i8:
24; NO-SIMD128-NOT: i8x16
25; SIMD128-NEXT: .functype splat_v16i8 (i32) -> (v128){{$}}
26; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}}
27; SIMD128-NEXT: return $pop[[R]]{{$}}
28define <16 x i8> @splat_v16i8(i8 %x) {
29  %v = insertelement <16 x i8> undef, i8 %x, i32 0
30  %res = shufflevector <16 x i8> %v, <16 x i8> undef,
31    <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0,
32                i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
33  ret <16 x i8> %res
34}
35
36; CHECK-LABEL: const_splat_v16i8:
37; SIMD128: v128.const $push0=, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42{{$}}
38define <16 x i8> @const_splat_v16i8() {
39  ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
40                 i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
41}
42
43; CHECK-LABEL: extract_v16i8_s:
44; NO-SIMD128-NOT: i8x16
45; SIMD128-NEXT: .functype extract_v16i8_s (v128) -> (i32){{$}}
46; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}}
47; SIMD128-NEXT: return $pop[[R]]{{$}}
48define i32 @extract_v16i8_s(<16 x i8> %v) {
49  %elem = extractelement <16 x i8> %v, i8 13
50  %a = sext i8 %elem to i32
51  ret i32 %a
52}
53
54; CHECK-LABEL: extract_var_v16i8_s:
55; NO-SIMD128-NOT: i8x16
56; SIMD128-NEXT: .functype extract_var_v16i8_s (v128, i32) -> (i32){{$}}
57; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer
58; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
59; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
60; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
61; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
62; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15
63; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
64; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]
65; SIMD128-NEXT: i32.load8_s $push[[R:[0-9]+]]=, 0($pop[[L6]])
66; SIMD128-NEXT: return $pop[[R]]
67define i32 @extract_var_v16i8_s(<16 x i8> %v, i32 %i) {
68  %elem = extractelement <16 x i8> %v, i32 %i
69  %a = sext i8 %elem to i32
70  ret i32 %a
71}
72
73; CHECK-LABEL: extract_undef_v16i8_s:
74; NO-SIMD128-NOT: i8x16
75; SIMD128-NEXT: .functype extract_undef_v16i8_s (v128) -> (i32){{$}}
76; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
77; SIMD128-NEXT: return $pop[[R]]{{$}}
78define i32 @extract_undef_v16i8_s(<16 x i8> %v) {
79  %elem = extractelement <16 x i8> %v, i8 undef
80  %a = sext i8 %elem to i32
81  ret i32 %a
82}
83
84; CHECK-LABEL: extract_v16i8_u:
85; NO-SIMD128-NOT: i8x16
86; SIMD128-NEXT: .functype extract_v16i8_u (v128) -> (i32){{$}}
87; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
88; SIMD128-NEXT: return $pop[[R]]{{$}}
89define i32 @extract_v16i8_u(<16 x i8> %v) {
90  %elem = extractelement <16 x i8> %v, i8 13
91  %a = zext i8 %elem to i32
92  ret i32 %a
93}
94
95; CHECK-LABEL: extract_var_v16i8_u:
96; NO-SIMD128-NOT: i8x16
97; SIMD128-NEXT: .functype extract_var_v16i8_u (v128, i32) -> (i32){{$}}
98; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
99; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
100; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
101; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
102; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
103; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
104; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
105; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
106; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
107; SIMD128-NEXT: return $pop[[R]]{{$}}
108define i32 @extract_var_v16i8_u(<16 x i8> %v, i32 %i) {
109  %elem = extractelement <16 x i8> %v, i32 %i
110  %a = zext i8 %elem to i32
111  ret i32 %a
112}
113
114; CHECK-LABEL: extract_undef_v16i8_u:
115; NO-SIMD128-NOT: i8x16
116; SIMD128-NEXT: .functype extract_undef_v16i8_u (v128) -> (i32){{$}}
117; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
118; SIMD128-NEXT: return $pop[[R]]{{$}}
119define i32 @extract_undef_v16i8_u(<16 x i8> %v) {
120  %elem = extractelement <16 x i8> %v, i8 undef
121  %a = zext i8 %elem to i32
122  ret i32 %a
123}
124
125; CHECK-LABEL: extract_v16i8:
126; NO-SIMD128-NOT: i8x16
127; SIMD128-NEXT: .functype extract_v16i8 (v128) -> (i32){{$}}
128; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
129; SIMD128-NEXT: return $pop[[R]]{{$}}
130define i8 @extract_v16i8(<16 x i8> %v) {
131  %elem = extractelement <16 x i8> %v, i8 13
132  ret i8 %elem
133}
134
135; CHECK-LABEL: extract_var_v16i8:
136; NO-SIMD128-NOT: i8x16
137; SIMD128-NEXT: .functype extract_var_v16i8 (v128, i32) -> (i32){{$}}
138; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
139; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
140; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
141; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
142; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
143; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
144; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
145; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
146; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
147; SIMD128-NEXT: return $pop[[R]]{{$}}
148define i8 @extract_var_v16i8(<16 x i8> %v, i32 %i) {
149  %elem = extractelement <16 x i8> %v, i32 %i
150  ret i8 %elem
151}
152
153; CHECK-LABEL: extract_undef_v16i8:
154; NO-SIMD128-NOT: i8x16
155; SIMD128-NEXT: .functype extract_undef_v16i8 (v128) -> (i32){{$}}
156; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
157; SIMD128-NEXT: return $pop[[R]]{{$}}
158define i8 @extract_undef_v16i8(<16 x i8> %v) {
159  %elem = extractelement <16 x i8> %v, i8 undef
160  ret i8 %elem
161}
162
163; CHECK-LABEL: replace_v16i8:
164; NO-SIMD128-NOT: i8x16
165; SIMD128-NEXT: .functype replace_v16i8 (v128, i32) -> (v128){{$}}
166; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}}
167; SIMD128-NEXT: return $pop[[R]]{{$}}
168define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
169  %res = insertelement <16 x i8> %v, i8 %x, i32 11
170  ret <16 x i8> %res
171}
172
173; CHECK-LABEL: replace_var_v16i8:
174; NO-SIMD128-NOT: i8x16
175; SIMD128-NEXT: .functype replace_var_v16i8 (v128, i32, i32) -> (v128){{$}}
176; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
177; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
178; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
179; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
180; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
181; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
182; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
183; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $3, $pop[[L5]]{{$}}
184; SIMD128-NEXT: i32.store8 0($pop[[L6]]), $2{{$}}
185; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
186; SIMD128-NEXT: return $pop[[R]]{{$}}
187define <16 x i8> @replace_var_v16i8(<16 x i8> %v, i32 %i, i8 %x) {
188  %res = insertelement <16 x i8> %v, i8 %x, i32 %i
189  ret <16 x i8> %res
190}
191
192; CHECK-LABEL: replace_zero_v16i8:
193; NO-SIMD128-NOT: i8x16
194; SIMD128-NEXT: .functype replace_zero_v16i8 (v128, i32) -> (v128){{$}}
195; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
196; SIMD128-NEXT: return $pop[[R]]{{$}}
197define <16 x i8> @replace_zero_v16i8(<16 x i8> %v, i8 %x) {
198  %res = insertelement <16 x i8> %v, i8 %x, i32 0
199  ret <16 x i8> %res
200}
201
202; CHECK-LABEL: shuffle_v16i8:
203; NO-SIMD128-NOT: i8x16
204; SIMD128-NEXT: .functype shuffle_v16i8 (v128, v128) -> (v128){{$}}
205; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
206; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}}
207; SIMD128-NEXT: return $pop[[R]]{{$}}
208define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
209  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
210    <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23,
211                i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
212  ret <16 x i8> %res
213}
214
215; CHECK-LABEL: shuffle_undef_v16i8:
216; NO-SIMD128-NOT: i8x16
217; SIMD128-NEXT: .functype shuffle_undef_v16i8 (v128, v128) -> (v128){{$}}
218; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
219; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
220; SIMD128-NEXT: return $pop[[R]]{{$}}
221define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) {
222  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
223    <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
224                i32 undef, i32 undef, i32 undef, i32 undef,
225                i32 undef, i32 undef, i32 undef, i32 undef,
226                i32 undef, i32 undef, i32 undef, i32 undef>
227  ret <16 x i8> %res
228}
229
230; CHECK-LABEL: build_v16i8:
231; NO-SIMD128-NOT: i8x16
232; SIMD128-NEXT: .functype build_v16i8 (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}}
233; SIMD128-NEXT: i8x16.splat $push[[L0:[0-9]+]]=, $0{{$}}
234; SIMD128-NEXT: i8x16.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
235; SIMD128-NEXT: i8x16.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
236; SIMD128-NEXT: i8x16.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
237; SIMD128-NEXT: i8x16.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
238; SIMD128-NEXT: i8x16.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
239; SIMD128-NEXT: i8x16.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
240; SIMD128-NEXT: i8x16.replace_lane $push[[L7:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
241; SIMD128-NEXT: i8x16.replace_lane $push[[L8:[0-9]+]]=, $pop[[L7]], 8, $8{{$}}
242; SIMD128-NEXT: i8x16.replace_lane $push[[L9:[0-9]+]]=, $pop[[L8]], 9, $9{{$}}
243; SIMD128-NEXT: i8x16.replace_lane $push[[L10:[0-9]+]]=, $pop[[L9]], 10, $10{{$}}
244; SIMD128-NEXT: i8x16.replace_lane $push[[L11:[0-9]+]]=, $pop[[L10]], 11, $11{{$}}
245; SIMD128-NEXT: i8x16.replace_lane $push[[L12:[0-9]+]]=, $pop[[L11]], 12, $12{{$}}
246; SIMD128-NEXT: i8x16.replace_lane $push[[L13:[0-9]+]]=, $pop[[L12]], 13, $13{{$}}
247; SIMD128-NEXT: i8x16.replace_lane $push[[L14:[0-9]+]]=, $pop[[L13]], 14, $14{{$}}
248; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $pop[[L14]], 15, $15{{$}}
249; SIMD128-NEXT: return $pop[[R]]{{$}}
250define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3,
251                              i8 %x4, i8 %x5, i8 %x6, i8 %x7,
252                              i8 %x8, i8 %x9, i8 %x10, i8 %x11,
253                              i8 %x12, i8 %x13, i8 %x14, i8 %x15) {
254  %t0 = insertelement <16 x i8> undef, i8 %x0, i32 0
255  %t1 = insertelement <16 x i8> %t0, i8 %x1, i32 1
256  %t2 = insertelement <16 x i8> %t1, i8 %x2, i32 2
257  %t3 = insertelement <16 x i8> %t2, i8 %x3, i32 3
258  %t4 = insertelement <16 x i8> %t3, i8 %x4, i32 4
259  %t5 = insertelement <16 x i8> %t4, i8 %x5, i32 5
260  %t6 = insertelement <16 x i8> %t5, i8 %x6, i32 6
261  %t7 = insertelement <16 x i8> %t6, i8 %x7, i32 7
262  %t8 = insertelement <16 x i8> %t7, i8 %x8, i32 8
263  %t9 = insertelement <16 x i8> %t8, i8 %x9, i32 9
264  %t10 = insertelement <16 x i8> %t9, i8 %x10, i32 10
265  %t11 = insertelement <16 x i8> %t10, i8 %x11, i32 11
266  %t12 = insertelement <16 x i8> %t11, i8 %x12, i32 12
267  %t13 = insertelement <16 x i8> %t12, i8 %x13, i32 13
268  %t14 = insertelement <16 x i8> %t13, i8 %x14, i32 14
269  %res = insertelement <16 x i8> %t14, i8 %x15, i32 15
270  ret <16 x i8> %res
271}
272
273; ==============================================================================
274; 8 x i16
275; ==============================================================================
276; CHECK-LABEL: const_v8i16:
277; NO-SIMD128-NOT: i16x8
278; SIMD128-NEXT: .functype const_v8i16 () -> (v128){{$}}
279; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}}
280; SIMD128-NEXT: return $pop[[R]]{{$}}
281define <8 x i16> @const_v8i16() {
282  ret <8 x i16> <i16 256, i16 770, i16 1284, i16 1798,
283                 i16 2312, i16 2826, i16 3340, i16 3854>
284}
285
286; CHECK-LABEL: splat_v8i16:
287; NO-SIMD128-NOT: i16x8
288; SIMD128-NEXT: .functype splat_v8i16 (i32) -> (v128){{$}}
289; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}}
290; SIMD128-NEXT: return $pop[[R]]{{$}}
291define <8 x i16> @splat_v8i16(i16 %x) {
292  %v = insertelement <8 x i16> undef, i16 %x, i32 0
293  %res = shufflevector <8 x i16> %v, <8 x i16> undef,
294    <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
295  ret <8 x i16> %res
296}
297
298; CHECK-LABEL: const_splat_v8i16:
299; SIMD128: v128.const $push0=, 42, 42, 42, 42, 42, 42, 42, 42{{$}}
300define <8 x i16> @const_splat_v8i16() {
301  ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
302}
303
304; CHECK-LABEL: extract_v8i16_s:
305; NO-SIMD128-NOT: i16x8
306; SIMD128-NEXT: .functype extract_v8i16_s (v128) -> (i32){{$}}
307; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}}
308; SIMD128-NEXT: return $pop[[R]]{{$}}
309define i32 @extract_v8i16_s(<8 x i16> %v) {
310  %elem = extractelement <8 x i16> %v, i16 5
311  %a = sext i16 %elem to i32
312  ret i32 %a
313}
314
315; CHECK-LABEL: extract_var_v8i16_s:
316; NO-SIMD128-NOT: i16x8
317; SIMD128-NEXT: .functype extract_var_v8i16_s (v128, i32) -> (i32){{$}}
318; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
319; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
320; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
321; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
322; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
323; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
324; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
325; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
326; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
327; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
328; SIMD128-NEXT: i32.load16_s $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
329; SIMD128-NEXT: return $pop[[R]]{{$}}
330define i32 @extract_var_v8i16_s(<8 x i16> %v, i32 %i) {
331  %elem = extractelement <8 x i16> %v, i32 %i
332  %a = sext i16 %elem to i32
333  ret i32 %a
334}
335
336; CHECK-LABEL: extract_undef_v8i16_s:
337; NO-SIMD128-NOT: i16x8
338; SIMD128-NEXT: .functype extract_undef_v8i16_s (v128) -> (i32){{$}}
339; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
340; SIMD128-NEXT: return $pop[[R]]{{$}}
341define i32 @extract_undef_v8i16_s(<8 x i16> %v) {
342  %elem = extractelement <8 x i16> %v, i16 undef
343  %a = sext i16 %elem to i32
344  ret i32 %a
345}
346
347; CHECK-LABEL: extract_v8i16_u:
348; NO-SIMD128-NOT: i16x8
349; SIMD128-NEXT: .functype extract_v8i16_u (v128) -> (i32){{$}}
350; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
351; SIMD128-NEXT: return $pop[[R]]{{$}}
352define i32 @extract_v8i16_u(<8 x i16> %v) {
353  %elem = extractelement <8 x i16> %v, i16 5
354  %a = zext i16 %elem to i32
355  ret i32 %a
356}
357
358; CHECK-LABEL: extract_var_v8i16_u:
359; NO-SIMD128-NOT: i16x8
360; SIMD128-NEXT: .functype extract_var_v8i16_u (v128, i32) -> (i32){{$}}
361; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
362; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
363; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
364; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
365; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
366; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
367; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
368; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
369; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
370; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
371; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
372; SIMD128-NEXT: return $pop[[R]]{{$}}
373define i32 @extract_var_v8i16_u(<8 x i16> %v, i32 %i) {
374  %elem = extractelement <8 x i16> %v, i32 %i
375  %a = zext i16 %elem to i32
376  ret i32 %a
377}
378
379; CHECK-LABEL: extract_undef_v8i16_u:
380; NO-SIMD128-NOT: i16x8
381; SIMD128-NEXT: .functype extract_undef_v8i16_u (v128) -> (i32){{$}}
382; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
383; SIMD128-NEXT: return $pop[[R]]{{$}}
384define i32 @extract_undef_v8i16_u(<8 x i16> %v) {
385  %elem = extractelement <8 x i16> %v, i16 undef
386  %a = zext i16 %elem to i32
387  ret i32 %a
388}
389
390; CHECK-LABEL: extract_v8i16:
391; NO-SIMD128-NOT: i16x8
392; SIMD128-NEXT: .functype extract_v8i16 (v128) -> (i32){{$}}
393; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
394; SIMD128-NEXT: return $pop[[R]]{{$}}
395define i16 @extract_v8i16(<8 x i16> %v) {
396  %elem = extractelement <8 x i16> %v, i16 5
397  ret i16 %elem
398}
399
400; CHECK-LABEL: extract_var_v8i16:
401; NO-SIMD128-NOT: i16x8
402; SIMD128-NEXT: .functype extract_var_v8i16 (v128, i32) -> (i32){{$}}
403; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
404; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
405; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
406; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
407; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
408; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
409; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
410; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
411; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
412; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
413; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
414; SIMD128-NEXT: return $pop[[R]]{{$}}
415define i16 @extract_var_v8i16(<8 x i16> %v, i32 %i) {
416  %elem = extractelement <8 x i16> %v, i32 %i
417  ret i16 %elem
418}
419
420; CHECK-LABEL: extract_undef_v8i16:
421; NO-SIMD128-NOT: i16x8
422; SIMD128-NEXT: .functype extract_undef_v8i16 (v128) -> (i32){{$}}
423; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
424; SIMD128-NEXT: return $pop[[R]]{{$}}
425define i16 @extract_undef_v8i16(<8 x i16> %v) {
426  %elem = extractelement <8 x i16> %v, i16 undef
427  ret i16 %elem
428}
429
430; CHECK-LABEL: replace_v8i16:
431; NO-SIMD128-NOT: i16x8
432; SIMD128-NEXT: .functype replace_v8i16 (v128, i32) -> (v128){{$}}
433; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}}
434; SIMD128-NEXT: return $pop[[R]]{{$}}
435define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
436  %res = insertelement <8 x i16> %v, i16 %x, i32 7
437  ret <8 x i16> %res
438}
439
440; CHECK-LABEL: replace_var_v8i16:
441; NO-SIMD128-NOT: i16x8
442; SIMD128-NEXT: .functype replace_var_v8i16 (v128, i32, i32) -> (v128){{$}}
443; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
444; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
445; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
446; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
447; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
448; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
449; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
450; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
451; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
452; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $3, $pop[[L7]]{{$}}
453; SIMD128-NEXT: i32.store16 0($pop[[L8]]), $2{{$}}
454; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
455; SIMD128-NEXT: return $pop[[R]]{{$}}
456define <8 x i16> @replace_var_v8i16(<8 x i16> %v, i32 %i, i16 %x) {
457  %res = insertelement <8 x i16> %v, i16 %x, i32 %i
458  ret <8 x i16> %res
459}
460
461; CHECK-LABEL: replace_zero_v8i16:
462; NO-SIMD128-NOT: i16x8
463; SIMD128-NEXT: .functype replace_zero_v8i16 (v128, i32) -> (v128){{$}}
464; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
465; SIMD128-NEXT: return $pop[[R]]{{$}}
466define <8 x i16> @replace_zero_v8i16(<8 x i16> %v, i16 %x) {
467  %res = insertelement <8 x i16> %v, i16 %x, i32 0
468  ret <8 x i16> %res
469}
470
471; CHECK-LABEL: shuffle_v8i16:
472; NO-SIMD128-NOT: i8x16
473; SIMD128-NEXT: .functype shuffle_v8i16 (v128, v128) -> (v128){{$}}
474; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
475; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}}
476; SIMD128-NEXT: return $pop[[R]]{{$}}
477define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) {
478  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
479    <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
480  ret <8 x i16> %res
481}
482
483; CHECK-LABEL: shuffle_undef_v8i16:
484; NO-SIMD128-NOT: i8x16
485; SIMD128-NEXT: .functype shuffle_undef_v8i16 (v128, v128) -> (v128){{$}}
486; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
487; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
488; SIMD128-NEXT: return $pop[[R]]{{$}}
489define <8 x i16> @shuffle_undef_v8i16(<8 x i16> %x, <8 x i16> %y) {
490  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
491    <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
492               i32 undef, i32 undef, i32 undef, i32 undef>
493  ret <8 x i16> %res
494}
495
496; CHECK-LABEL: build_v8i16:
497; NO-SIMD128-NOT: i16x8
498; SIMD128-NEXT: .functype build_v8i16 (i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}}
499; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}}
500; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
501; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
502; SIMD128-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
503; SIMD128-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
504; SIMD128-NEXT: i16x8.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
505; SIMD128-NEXT: i16x8.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
506; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
507; SIMD128-NEXT: return $pop[[R]]{{$}}
508define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3,
509                              i16 %x4, i16 %x5, i16 %x6, i16 %x7) {
510  %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0
511  %t1 = insertelement <8 x i16> %t0, i16 %x1, i32 1
512  %t2 = insertelement <8 x i16> %t1, i16 %x2, i32 2
513  %t3 = insertelement <8 x i16> %t2, i16 %x3, i32 3
514  %t4 = insertelement <8 x i16> %t3, i16 %x4, i32 4
515  %t5 = insertelement <8 x i16> %t4, i16 %x5, i32 5
516  %t6 = insertelement <8 x i16> %t5, i16 %x6, i32 6
517  %res = insertelement <8 x i16> %t6, i16 %x7, i32 7
518  ret <8 x i16> %res
519}
520
521; ==============================================================================
522; 4 x i32
523; ==============================================================================
524; CHECK-LABEL: const_v4i32:
525; NO-SIMD128-NOT: i32x4
526; SIMD128-NEXT: .functype const_v4i32 () -> (v128){{$}}
527; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}}
528; SIMD128-NEXT: return $pop[[R]]{{$}}
529define <4 x i32> @const_v4i32() {
530  ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084>
531}
532
533; CHECK-LABEL: splat_v4i32:
534; NO-SIMD128-NOT: i32x4
535; SIMD128-NEXT: .functype splat_v4i32 (i32) -> (v128){{$}}
536; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
537; SIMD128-NEXT: return $pop[[R]]{{$}}
538define <4 x i32> @splat_v4i32(i32 %x) {
539  %v = insertelement <4 x i32> undef, i32 %x, i32 0
540  %res = shufflevector <4 x i32> %v, <4 x i32> undef,
541    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
542  ret <4 x i32> %res
543}
544
545; CHECK-LABEL: const_splat_v4i32:
546; SIMD128: v128.const $push0=, 42, 42, 42, 42{{$}}
547define <4 x i32> @const_splat_v4i32() {
548  ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
549}
550
551; CHECK-LABEL: extract_v4i32:
552; NO-SIMD128-NOT: i32x4
553; SIMD128-NEXT: .functype extract_v4i32 (v128) -> (i32){{$}}
554; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
555; SIMD128-NEXT: return $pop[[R]]{{$}}
556define i32 @extract_v4i32(<4 x i32> %v) {
557  %elem = extractelement <4 x i32> %v, i32 3
558  ret i32 %elem
559}
560
561; CHECK-LABEL: extract_var_v4i32:
562; NO-SIMD128-NOT: i32x4
563; SIMD128-NEXT: .functype extract_var_v4i32 (v128, i32) -> (i32){{$}}
564; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
565; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
566; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
567; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
568; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
569; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
570; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
571; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
572; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
573; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $2, $pop[[L7]]{{$}}
574; SIMD128-NEXT: i32.load $push[[R:[0-9]+]]=, 0($pop[[L4]]){{$}}
575; SIMD128-NEXT: return $pop[[R]]{{$}}
576define i32 @extract_var_v4i32(<4 x i32> %v, i32 %i) {
577  %elem = extractelement <4 x i32> %v, i32 %i
578  ret i32 %elem
579}
580
581; CHECK-LABEL: extract_zero_v4i32:
582; NO-SIMD128-NOT: i32x4
583; SIMD128-NEXT: .functype extract_zero_v4i32 (v128) -> (i32){{$}}
584; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
585; SIMD128-NEXT: return $pop[[R]]{{$}}
586define i32 @extract_zero_v4i32(<4 x i32> %v) {
587  %elem = extractelement <4 x i32> %v, i32 0
588  ret i32 %elem
589}
590
591; CHECK-LABEL: replace_v4i32:
592; NO-SIMD128-NOT: i32x4
593; SIMD128-NEXT: .functype replace_v4i32 (v128, i32) -> (v128){{$}}
594; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
595; SIMD128-NEXT: return $pop[[R]]{{$}}
596define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
597  %res = insertelement <4 x i32> %v, i32 %x, i32 2
598  ret <4 x i32> %res
599}
600
601; CHECK-LABEL: replace_var_v4i32:
602; NO-SIMD128-NOT: i32x4
603; SIMD128-NEXT: .functype replace_var_v4i32 (v128, i32, i32) -> (v128){{$}}
604; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
605; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
606; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
607; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
608; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
609; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
610; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
611; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
612; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
613; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $3, $pop[[L7]]{{$}}
614; SIMD128-NEXT: i32.store 0($pop[[L4]]), $2{{$}}
615; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
616; SIMD128-NEXT: return $pop[[R]]{{$}}
617define <4 x i32> @replace_var_v4i32(<4 x i32> %v, i32 %i, i32 %x) {
618  %res = insertelement <4 x i32> %v, i32 %x, i32 %i
619  ret <4 x i32> %res
620}
621
622; CHECK-LABEL: replace_zero_v4i32:
623; NO-SIMD128-NOT: i32x4
624; SIMD128-NEXT: .functype replace_zero_v4i32 (v128, i32) -> (v128){{$}}
625; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
626; SIMD128-NEXT: return $pop[[R]]{{$}}
627define <4 x i32> @replace_zero_v4i32(<4 x i32> %v, i32 %x) {
628  %res = insertelement <4 x i32> %v, i32 %x, i32 0
629  ret <4 x i32> %res
630}
631
632; CHECK-LABEL: shuffle_v4i32:
633; NO-SIMD128-NOT: i8x16
634; SIMD128-NEXT: .functype shuffle_v4i32 (v128, v128) -> (v128){{$}}
635; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
636; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
637; SIMD128-NEXT: return $pop[[R]]{{$}}
638define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) {
639  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
640    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
641  ret <4 x i32> %res
642}
643
644; CHECK-LABEL: shuffle_undef_v4i32:
645; NO-SIMD128-NOT: i8x16
646; SIMD128-NEXT: .functype shuffle_undef_v4i32 (v128, v128) -> (v128){{$}}
647; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
648; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
649; SIMD128-NEXT: return $pop[[R]]{{$}}
650define <4 x i32> @shuffle_undef_v4i32(<4 x i32> %x, <4 x i32> %y) {
651  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
652    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
653  ret <4 x i32> %res
654}
655
656; CHECK-LABEL: build_v4i32:
657; NO-SIMD128-NOT: i32x4
658; SIMD128-NEXT: .functype build_v4i32 (i32, i32, i32, i32) -> (v128){{$}}
659; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
660; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
661; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
662; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
663; SIMD128-NEXT: return $pop[[R]]{{$}}
664define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
665  %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0
666  %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1
667  %t2 = insertelement <4 x i32> %t1, i32 %x2, i32 2
668  %res = insertelement <4 x i32> %t2, i32 %x3, i32 3
669  ret <4 x i32> %res
670}
671
672; ==============================================================================
673; 2 x i64
674; ==============================================================================
675; CHECK-LABEL: const_v2i64:
676; NO-SIMD128-NOT: i64x2
677; SIMD128-NEXT: .functype const_v2i64 () -> (v128){{$}}
678; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}}
679; SIMD128-NEXT: return $pop[[R]]{{$}}
680define <2 x i64> @const_v2i64() {
681  ret <2 x i64> <i64 506097522914230528, i64 1084818905618843912>
682}
683
684; CHECK-LABEL: splat_v2i64:
685; NO-SIMD128-NOT: i64x2
686; SIMD128-NEXT: .functype splat_v2i64 (i64) -> (v128){{$}}
687; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
688; SIMD128-NEXT: return $pop[[R]]{{$}}
689define <2 x i64> @splat_v2i64(i64 %x) {
690  %t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
691  %res = insertelement <2 x i64> %t1, i64 %x, i32 1
692  ret <2 x i64> %res
693}
694
695; CHECK-LABEL: const_splat_v2i64:
696; SIMD128: v128.const $push0=, 42, 42{{$}}
697define <2 x i64> @const_splat_v2i64() {
698  ret <2 x i64> <i64 42, i64 42>
699}
700
701; CHECK-LABEL: extract_v2i64:
702; NO-SIMD128-NOT: i64x2
703; SIMD128-NEXT: .functype extract_v2i64 (v128) -> (i64){{$}}
704; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
705; SIMD128-NEXT: return $pop[[R]]{{$}}
706define i64 @extract_v2i64(<2 x i64> %v) {
707  %elem = extractelement <2 x i64> %v, i64 1
708  ret i64 %elem
709}
710
711; CHECK-LABEL: extract_var_v2i64:
712; NO-SIMD128-NOT: i64x2
713; SIMD128-NEXT: .functype extract_var_v2i64 (v128, i32) -> (i64){{$}}
714; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
715; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
716; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
717; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
718; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
719; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
720; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
721; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
722; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
723; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
724; SIMD128-NEXT: i64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
725; SIMD128-NEXT: return $pop[[R]]{{$}}
726define i64 @extract_var_v2i64(<2 x i64> %v, i32 %i) {
727  %elem = extractelement <2 x i64> %v, i32 %i
728  ret i64 %elem
729}
730
731; CHECK-LABEL: extract_zero_v2i64:
732; NO-SIMD128-NOT: i64x2
733; SIMD128-NEXT: .functype extract_zero_v2i64 (v128) -> (i64){{$}}
734; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
735; SIMD128-NEXT: return $pop[[R]]{{$}}
736define i64 @extract_zero_v2i64(<2 x i64> %v) {
737  %elem = extractelement <2 x i64> %v, i64 0
738  ret i64 %elem
739}
740
741; CHECK-LABEL: replace_v2i64:
742; NO-SIMD128-NOT: i64x2
743; SIMD128-NEXT: .functype replace_v2i64 (v128, i64) -> (v128){{$}}
744; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
745; SIMD128-NEXT: return $pop[[R]]{{$}}
746define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
747  %res = insertelement <2 x i64> %v, i64 %x, i32 0
748  ret <2 x i64> %res
749}
750
751; CHECK-LABEL: replace_var_v2i64:
752; NO-SIMD128-NOT: i64x2
753; SIMD128-NEXT: .functype replace_var_v2i64 (v128, i32, i64) -> (v128){{$}}
754; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
755; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
756; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
757; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
758; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
759; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
760; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
761; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
762; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
763; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
764; SIMD128-NEXT: i64.store 0($pop[[L2]]), $2{{$}}
765; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
766; SIMD128-NEXT: return $pop[[R]]{{$}}
767define <2 x i64> @replace_var_v2i64(<2 x i64> %v, i32 %i, i64 %x) {
768  %res = insertelement <2 x i64> %v, i64 %x, i32 %i
769  ret <2 x i64> %res
770}
771
772; CHECK-LABEL: replace_zero_v2i64:
773; NO-SIMD128-NOT: i64x2
774; SIMD128-NEXT: .functype replace_zero_v2i64 (v128, i64) -> (v128){{$}}
775; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
776; SIMD128-NEXT: return $pop[[R]]{{$}}
777define <2 x i64> @replace_zero_v2i64(<2 x i64> %v, i64 %x) {
778  %res = insertelement <2 x i64> %v, i64 %x, i32 0
779  ret <2 x i64> %res
780}
781
782; CHECK-LABEL: shuffle_v2i64:
783; NO-SIMD128-NOT: i8x16
784; SIMD128-NEXT: .functype shuffle_v2i64 (v128, v128) -> (v128){{$}}
785; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
786; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
787; SIMD128-NEXT: return $pop[[R]]{{$}}
788define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) {
789  %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3>
790  ret <2 x i64> %res
791}
792
793; CHECK-LABEL: shuffle_undef_v2i64:
794; NO-SIMD128-NOT: i8x16
795; SIMD128-NEXT: .functype shuffle_undef_v2i64 (v128, v128) -> (v128){{$}}
796; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
797; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
798; SIMD128-NEXT: return $pop[[R]]{{$}}
799define <2 x i64> @shuffle_undef_v2i64(<2 x i64> %x, <2 x i64> %y) {
800  %res = shufflevector <2 x i64> %x, <2 x i64> %y,
801    <2 x i32> <i32 1, i32 undef>
802  ret <2 x i64> %res
803}
804
805; CHECK-LABEL: build_v2i64:
806; NO-SIMD128-NOT: i64x2
807; SIMD128-NEXT: .functype build_v2i64 (i64, i64) -> (v128){{$}}
808; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
809; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
810; SIMD128-NEXT: return $pop[[R]]{{$}}
811define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) {
812  %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0
813  %res = insertelement <2 x i64> %t0, i64 %x1, i32 1
814  ret <2 x i64> %res
815}
816
817; ==============================================================================
818; 4 x f32
819; ==============================================================================
820; CHECK-LABEL: const_v4f32:
821; NO-SIMD128-NOT: f32x4
822; SIMD128-NEXT: .functype const_v4f32 () -> (v128){{$}}
823; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
824; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}}
825; SIMD128-NEXT: return $pop[[R]]{{$}}
826define <4 x float> @const_v4f32() {
827  ret <4 x float> <float 0x3860402000000000, float 0x38e0c0a080000000,
828                   float 0x3961412100000000, float 0x39e1c1a180000000>
829}
830
831; CHECK-LABEL: splat_v4f32:
832; NO-SIMD128-NOT: f32x4
833; SIMD128-NEXT: .functype splat_v4f32 (f32) -> (v128){{$}}
834; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
835; SIMD128-NEXT: return $pop[[R]]{{$}}
836define <4 x float> @splat_v4f32(float %x) {
837  %v = insertelement <4 x float> undef, float %x, i32 0
838  %res = shufflevector <4 x float> %v, <4 x float> undef,
839    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
840  ret <4 x float> %res
841}
842
843; CHECK-LABEL: const_splat_v4f32
844; SIMD128: v128.const $push0=, 0x1.5p5, 0x1.5p5, 0x1.5p5, 0x1.5p5{{$}}
845define <4 x float> @const_splat_v4f32() {
846  ret <4 x float> <float 42., float 42., float 42., float 42.>
847}
848
849; CHECK-LABEL: extract_v4f32:
850; NO-SIMD128-NOT: f32x4
851; SIMD128-NEXT: .functype extract_v4f32 (v128) -> (f32){{$}}
852; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
853; SIMD128-NEXT: return $pop[[R]]{{$}}
854define float @extract_v4f32(<4 x float> %v) {
855  %elem = extractelement <4 x float> %v, i32 3
856  ret float %elem
857}
858
859; CHECK-LABEL: extract_var_v4f32:
860; NO-SIMD128-NOT: i64x2
861; SIMD128-NEXT: .functype extract_var_v4f32 (v128, i32) -> (f32){{$}}
862; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
863; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
864; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
865; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
866; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
867; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
868; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
869; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
870; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
871; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
872; SIMD128-NEXT: f32.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
873; SIMD128-NEXT: return $pop[[R]]{{$}}
874define float @extract_var_v4f32(<4 x float> %v, i32 %i) {
875  %elem = extractelement <4 x float> %v, i32 %i
876  ret float %elem
877}
878
879; CHECK-LABEL: extract_zero_v4f32:
880; NO-SIMD128-NOT: f32x4
881; SIMD128-NEXT: .functype extract_zero_v4f32 (v128) -> (f32){{$}}
882; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
883; SIMD128-NEXT: return $pop[[R]]{{$}}
884define float @extract_zero_v4f32(<4 x float> %v) {
885  %elem = extractelement <4 x float> %v, i32 0
886  ret float %elem
887}
888
889; CHECK-LABEL: replace_v4f32:
890; NO-SIMD128-NOT: f32x4
891; SIMD128-NEXT: .functype replace_v4f32 (v128, f32) -> (v128){{$}}
892; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
893; SIMD128-NEXT: return $pop[[R]]{{$}}
894define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
895  %res = insertelement <4 x float> %v, float %x, i32 2
896  ret <4 x float> %res
897}
898
899; CHECK-LABEL: replace_var_v4f32:
900; NO-SIMD128-NOT: f32x4
901; SIMD128-NEXT: .functype replace_var_v4f32 (v128, i32, f32) -> (v128){{$}}
902; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
903; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
904; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
905; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
906; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
907; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
908; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
909; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
910; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
911; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
912; SIMD128-NEXT: f32.store 0($pop[[L2]]), $2{{$}}
913; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
914; SIMD128-NEXT: return $pop[[R]]{{$}}
915define <4 x float> @replace_var_v4f32(<4 x float> %v, i32 %i, float %x) {
916  %res = insertelement <4 x float> %v, float %x, i32 %i
917  ret <4 x float> %res
918}
919
920; CHECK-LABEL: replace_zero_v4f32:
921; NO-SIMD128-NOT: f32x4
922; SIMD128-NEXT: .functype replace_zero_v4f32 (v128, f32) -> (v128){{$}}
923; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
924; SIMD128-NEXT: return $pop[[R]]{{$}}
925define <4 x float> @replace_zero_v4f32(<4 x float> %v, float %x) {
926  %res = insertelement <4 x float> %v, float %x, i32 0
927  ret <4 x float> %res
928}
929
930; CHECK-LABEL: shuffle_v4f32:
931; NO-SIMD128-NOT: i8x16
932; SIMD128-NEXT: .functype shuffle_v4f32 (v128, v128) -> (v128){{$}}
933; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
934; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
935; SIMD128-NEXT: return $pop[[R]]{{$}}
936define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) {
937  %res = shufflevector <4 x float> %x, <4 x float> %y,
938    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
939  ret <4 x float> %res
940}
941
942; CHECK-LABEL: shuffle_undef_v4f32:
943; NO-SIMD128-NOT: i8x16
944; SIMD128-NEXT: .functype shuffle_undef_v4f32 (v128, v128) -> (v128){{$}}
945; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
946; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
947; SIMD128-NEXT: return $pop[[R]]{{$}}
948define <4 x float> @shuffle_undef_v4f32(<4 x float> %x, <4 x float> %y) {
949  %res = shufflevector <4 x float> %x, <4 x float> %y,
950    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
951  ret <4 x float> %res
952}
953
954; CHECK-LABEL: build_v4f32:
955; NO-SIMD128-NOT: f32x4
956; SIMD128-NEXT: .functype build_v4f32 (f32, f32, f32, f32) -> (v128){{$}}
957; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
958; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
959; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
960; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
961; SIMD128-NEXT: return $pop[[R]]{{$}}
962define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) {
963  %t0 = insertelement <4 x float> undef, float %x0, i32 0
964  %t1 = insertelement <4 x float> %t0, float %x1, i32 1
965  %t2 = insertelement <4 x float> %t1, float %x2, i32 2
966  %res = insertelement <4 x float> %t2, float %x3, i32 3
967  ret <4 x float> %res
968}
969
970; ==============================================================================
971; 2 x f64
972; ==============================================================================
973; CHECK-LABEL: const_v2f64:
974; NO-SIMD128-NOT: f64x2
975; SIMD128-NEXT: .functype const_v2f64 () -> (v128){{$}}
976; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}}
977; SIMD128-NEXT: return $pop[[R]]{{$}}
978define <2 x double> @const_v2f64() {
979  ret <2 x double> <double 0x0706050403020100, double 0x0F0E0D0C0B0A0908>
980}
981
982; CHECK-LABEL: splat_v2f64:
983; NO-SIMD128-NOT: f64x2
984; SIMD128-NEXT: .functype splat_v2f64 (f64) -> (v128){{$}}
985; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
986; SIMD128-NEXT: return $pop[[R]]{{$}}
987define <2 x double> @splat_v2f64(double %x) {
988  %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0
989  %res = insertelement <2 x double> %t1, double %x, i32 1
990  ret <2 x double> %res
991}
992
993; CHECK-LABEL: const_splat_v2f64:
994; SIMD128: v128.const $push0=, 0x1.5p5, 0x1.5p5{{$}}
995define <2 x double> @const_splat_v2f64() {
996  ret <2 x double> <double 42., double 42.>
997}
998
999; CHECK-LABEL: extract_v2f64:
1000; NO-SIMD128-NOT: f64x2
1001; SIMD128-NEXT: .functype extract_v2f64 (v128) -> (f64){{$}}
1002; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
1003; SIMD128-NEXT: return $pop[[R]]{{$}}
1004define double @extract_v2f64(<2 x double> %v) {
1005  %elem = extractelement <2 x double> %v, i32 1
1006  ret double %elem
1007}
1008
1009; CHECK-LABEL: extract_var_v2f64:
1010; NO-SIMD128-NOT: i62x2
1011; SIMD128-NEXT: .functype extract_var_v2f64 (v128, i32) -> (f64){{$}}
1012; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
1013; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
1014; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
1015; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
1016; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
1017; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
1018; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
1019; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
1020; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
1021; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
1022; SIMD128-NEXT: f64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
1023; SIMD128-NEXT: return $pop[[R]]{{$}}
1024define double @extract_var_v2f64(<2 x double> %v, i32 %i) {
1025  %elem = extractelement <2 x double> %v, i32 %i
1026  ret double %elem
1027}
1028
1029; CHECK-LABEL: extract_zero_v2f64:
1030; NO-SIMD128-NOT: f64x2
1031; SIMD128-NEXT: .functype extract_zero_v2f64 (v128) -> (f64){{$}}
1032; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
1033; SIMD128-NEXT: return $pop[[R]]{{$}}
1034define double @extract_zero_v2f64(<2 x double> %v) {
1035  %elem = extractelement <2 x double> %v, i32 0
1036  ret double %elem
1037}
1038
1039; CHECK-LABEL: replace_v2f64:
1040; NO-SIMD128-NOT: f64x2
1041; SIMD128-NEXT: .functype replace_v2f64 (v128, f64) -> (v128){{$}}
1042; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
1043; SIMD128-NEXT: return $pop[[R]]{{$}}
1044define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
1045  %res = insertelement <2 x double> %v, double %x, i32 0
1046  ret <2 x double> %res
1047}
1048
1049; CHECK-LABEL: replace_var_v2f64:
1050; NO-SIMD128-NOT: f64x2
1051; SIMD128-NEXT: .functype replace_var_v2f64 (v128, i32, f64) -> (v128){{$}}
1052; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}}
1053; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
1054; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
1055; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
1056; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
1057; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
1058; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
1059; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
1060; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
1061; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
1062; SIMD128-NEXT: f64.store 0($pop[[L2]]), $2{{$}}
1063; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
1064; SIMD128-NEXT: return $pop[[R]]{{$}}
1065define <2 x double> @replace_var_v2f64(<2 x double> %v, i32 %i, double %x) {
1066  %res = insertelement <2 x double> %v, double %x, i32 %i
1067  ret <2 x double> %res
1068}
1069
1070; CHECK-LABEL: replace_zero_v2f64:
1071; NO-SIMD128-NOT: f64x2
1072; SIMD128-NEXT: .functype replace_zero_v2f64 (v128, f64) -> (v128){{$}}
1073; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
1074; SIMD128-NEXT: return $pop[[R]]{{$}}
1075define <2 x double> @replace_zero_v2f64(<2 x double> %v, double %x) {
1076  %res = insertelement <2 x double> %v, double %x, i32 0
1077  ret <2 x double> %res
1078}
1079
1080; CHECK-LABEL: shuffle_v2f64:
1081; NO-SIMD128-NOT: i8x16
1082; SIMD128-NEXT: .functype shuffle_v2f64 (v128, v128) -> (v128){{$}}
1083; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
1084; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
1085; SIMD128-NEXT: return $pop[[R]]{{$}}
1086define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) {
1087  %res = shufflevector <2 x double> %x, <2 x double> %y,
1088    <2 x i32> <i32 0, i32 3>
1089  ret <2 x double> %res
1090}
1091
1092; CHECK-LABEL: shuffle_undef_v2f64:
1093; NO-SIMD128-NOT: i8x16
1094; SIMD128-NEXT: .functype shuffle_undef_v2f64 (v128, v128) -> (v128){{$}}
1095; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
1096; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
1097; SIMD128-NEXT: return $pop[[R]]{{$}}
1098define <2 x double> @shuffle_undef_v2f64(<2 x double> %x, <2 x double> %y) {
1099  %res = shufflevector <2 x double> %x, <2 x double> %y,
1100    <2 x i32> <i32 1, i32 undef>
1101  ret <2 x double> %res
1102}
1103
1104; CHECK-LABEL: build_v2f64:
1105; NO-SIMD128-NOT: f64x2
1106; SIMD128-NEXT: .functype build_v2f64 (f64, f64) -> (v128){{$}}
1107; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
1108; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
1109; SIMD128-NEXT: return $pop[[R]]{{$}}
1110define <2 x double> @build_v2f64(double %x0, double %x1) {
1111  %t0 = insertelement <2 x double> undef, double %x0, i32 0
1112  %res = insertelement <2 x double> %t0, double %x1, i32 1
1113  ret <2 x double> %res
1114}
1115