1; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
3; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
4
5; Test that basic SIMD128 vector manipulation operations assemble as expected.
6
7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
8target triple = "wasm32-unknown-unknown"
9
10; ==============================================================================
11; 16 x i8
12; ==============================================================================
13; CHECK-LABEL: const_v16i8:
14; NO-SIMD128-NOT: i8x16
15; SIMD128-NEXT: .result v128{{$}}
16; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
17; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
18; SIMD128-NEXT: return $pop[[R]]{{$}}
19define <16 x i8> @const_v16i8() {
20  ret <16 x i8> <i8 00, i8 01, i8 02, i8 03, i8 04, i8 05, i8 06, i8 07,
21                 i8 08, i8 09, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
22}
23
24; CHECK-LABEL: splat_v16i8:
25; NO-SIMD128-NOT: i8x16
26; SIMD128-NEXT: .param i32{{$}}
27; SIMD128-NEXT: .result v128{{$}}
28; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}}
29; SIMD128-NEXT: return $pop[[R]]{{$}}
30define <16 x i8> @splat_v16i8(i8 %x) {
31  %v = insertelement <16 x i8> undef, i8 %x, i32 0
32  %res = shufflevector <16 x i8> %v, <16 x i8> undef,
33    <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0,
34                i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
35  ret <16 x i8> %res
36}
37
38; CHECK-LABEL: const_splat_v16i8:
39; SIMD128: i8x16.splat
40define <16 x i8> @const_splat_v16i8() {
41  ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
42                 i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
43}
44
45; CHECK-LABEL: extract_v16i8_s:
46; NO-SIMD128-NOT: i8x16
47; SIMD128-NEXT: .param v128{{$}}
48; SIMD128-NEXT: .result i32{{$}}
49; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}}
50; SIMD128-NEXT: return $pop[[R]]{{$}}
51define i32 @extract_v16i8_s(<16 x i8> %v) {
52  %elem = extractelement <16 x i8> %v, i8 13
53  %a = sext i8 %elem to i32
54  ret i32 %a
55}
56
57; CHECK-LABEL: extract_var_v16i8_s:
58; NO-SIMD128-NOT: i8x16
59; SIMD128-NEXT: .param v128, i32{{$}}
60; SIMD128-NEXT: .result i32{{$}}
61; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
62; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
63; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
64; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
65; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
66; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15
67; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
68; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]
69; SIMD128-NEXT: i32.load8_s $push[[R:[0-9]+]]=, 0($pop[[L6]])
70; SIMD128-NEXT: return $pop[[R]]
71define i32 @extract_var_v16i8_s(<16 x i8> %v, i32 %i) {
72  %elem = extractelement <16 x i8> %v, i32 %i
73  %a = sext i8 %elem to i32
74  ret i32 %a
75}
76
77; CHECK-LABEL: extract_undef_v16i8_s:
78; NO-SIMD128-NOT: i8x16
79; SIMD128-NEXT: .param v128{{$}}
80; SIMD128-NEXT: .result i32{{$}}
81; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
82; SIMD128-NEXT: return $pop[[R]]{{$}}
83define i32 @extract_undef_v16i8_s(<16 x i8> %v) {
84  %elem = extractelement <16 x i8> %v, i8 undef
85  %a = sext i8 %elem to i32
86  ret i32 %a
87}
88
89; CHECK-LABEL: extract_v16i8_u:
90; NO-SIMD128-NOT: i8x16
91; SIMD128-NEXT: .param v128{{$}}
92; SIMD128-NEXT: .result i32{{$}}
93; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
94; SIMD128-NEXT: return $pop[[R]]{{$}}
95define i32 @extract_v16i8_u(<16 x i8> %v) {
96  %elem = extractelement <16 x i8> %v, i8 13
97  %a = zext i8 %elem to i32
98  ret i32 %a
99}
100
101; CHECK-LABEL: extract_var_v16i8_u:
102; NO-SIMD128-NOT: i8x16
103; SIMD128-NEXT: .param v128, i32{{$}}
104; SIMD128-NEXT: .result i32{{$}}
105; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
106; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
107; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
108; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
109; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
110; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
111; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
112; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
113; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
114; SIMD128-NEXT: return $pop[[R]]{{$}}
115define i32 @extract_var_v16i8_u(<16 x i8> %v, i32 %i) {
116  %elem = extractelement <16 x i8> %v, i32 %i
117  %a = zext i8 %elem to i32
118  ret i32 %a
119}
120
121; CHECK-LABEL: extract_undef_v16i8_u:
122; NO-SIMD128-NOT: i8x16
123; SIMD128-NEXT: .param v128{{$}}
124; SIMD128-NEXT: .result i32{{$}}
125; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
126; SIMD128-NEXT: return $pop[[R]]{{$}}
127define i32 @extract_undef_v16i8_u(<16 x i8> %v) {
128  %elem = extractelement <16 x i8> %v, i8 undef
129  %a = zext i8 %elem to i32
130  ret i32 %a
131}
132
133; CHECK-LABEL: extract_v16i8:
134; NO-SIMD128-NOT: i8x16
135; SIMD128-NEXT: .param v128{{$}}
136; SIMD128-NEXT: .result i32{{$}}
137; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
138; SIMD128-NEXT: return $pop[[R]]{{$}}
139define i8 @extract_v16i8(<16 x i8> %v) {
140  %elem = extractelement <16 x i8> %v, i8 13
141  ret i8 %elem
142}
143
144; CHECK-LABEL: extract_var_v16i8:
145; NO-SIMD128-NOT: i8x16
146; SIMD128-NEXT: .param v128, i32{{$}}
147; SIMD128-NEXT: .result i32{{$}}
148; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
149; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
150; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
151; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
152; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
153; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
154; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
155; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
156; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
157; SIMD128-NEXT: return $pop[[R]]{{$}}
158define i8 @extract_var_v16i8(<16 x i8> %v, i32 %i) {
159  %elem = extractelement <16 x i8> %v, i32 %i
160  ret i8 %elem
161}
162
163; CHECK-LABEL: extract_undef_v16i8:
164; NO-SIMD128-NOT: i8x16
165; SIMD128-NEXT: .param v128{{$}}
166; SIMD128-NEXT: .result i32{{$}}
167; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
168; SIMD128-NEXT: return $pop[[R]]{{$}}
169define i8 @extract_undef_v16i8(<16 x i8> %v) {
170  %elem = extractelement <16 x i8> %v, i8 undef
171  ret i8 %elem
172}
173
174; CHECK-LABEL: replace_v16i8:
175; NO-SIMD128-NOT: i8x16
176; SIMD128-NEXT: .param v128, i32{{$}}
177; SIMD128-NEXT: .result v128{{$}}
178; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}}
179; SIMD128-NEXT: return $pop[[R]]{{$}}
180define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
181  %res = insertelement <16 x i8> %v, i8 %x, i32 11
182  ret <16 x i8> %res
183}
184
185; CHECK-LABEL: replace_var_v16i8:
186; NO-SIMD128-NOT: i8x16
187; SIMD128-NEXT: .param v128, i32, i32{{$}}
188; SIMD128-NEXT: .result v128{{$}}
189; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
190; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
191; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
192; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
193; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
194; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
195; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
196; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $3, $pop[[L5]]{{$}}
197; SIMD128-NEXT: i32.store8 0($pop[[L6]]), $2{{$}}
198; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
199; SIMD128-NEXT: return $pop[[R]]{{$}}
200define <16 x i8> @replace_var_v16i8(<16 x i8> %v, i32 %i, i8 %x) {
201  %res = insertelement <16 x i8> %v, i8 %x, i32 %i
202  ret <16 x i8> %res
203}
204
205; CHECK-LABEL: replace_undef_v16i8:
206; NO-SIMD128-NOT: i8x16
207; SIMD128-NEXT: .param v128, i32{{$}}
208; SIMD128-NEXT: .result v128{{$}}
209; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
210; SIMD128-NEXT: return $pop[[R]]{{$}}
211define <16 x i8> @replace_undef_v16i8(<16 x i8> %v, i8 %x) {
212  %res = insertelement <16 x i8> %v, i8 %x, i32 undef
213  ret <16 x i8> %res
214}
215
216; CHECK-LABEL: shuffle_v16i8:
217; NO-SIMD128-NOT: v8x16
218; SIMD128-NEXT: .param v128, v128{{$}}
219; SIMD128-NEXT: .result v128{{$}}
220; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
221; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}}
222; SIMD128-NEXT: return $pop[[R]]{{$}}
223define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
224  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
225    <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23,
226                i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
227  ret <16 x i8> %res
228}
229
230; CHECK-LABEL: shuffle_undef_v16i8:
231; NO-SIMD128-NOT: v8x16
232; SIMD128-NEXT: .param v128, v128{{$}}
233; SIMD128-NEXT: .result v128{{$}}
234; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
235; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
236; SIMD128-NEXT: return $pop[[R]]{{$}}
237define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) {
238  %res = shufflevector <16 x i8> %x, <16 x i8> %y,
239    <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
240                i32 undef, i32 undef, i32 undef, i32 undef,
241                i32 undef, i32 undef, i32 undef, i32 undef,
242                i32 undef, i32 undef, i32 undef, i32 undef>
243  ret <16 x i8> %res
244}
245
246; CHECK-LABEL: build_v16i8:
247; NO-SIMD128-NOT: i8x16
248; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
249; SIMD128-NEXT: .result v128{{$}}
250; SIMD128-NEXT: i8x16.splat $push[[L0:[0-9]+]]=, $0{{$}}
251; SIMD128-NEXT: i8x16.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
252; SIMD128-NEXT: i8x16.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
253; SIMD128-NEXT: i8x16.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
254; SIMD128-NEXT: i8x16.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
255; SIMD128-NEXT: i8x16.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
256; SIMD128-NEXT: i8x16.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
257; SIMD128-NEXT: i8x16.replace_lane $push[[L7:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
258; SIMD128-NEXT: i8x16.replace_lane $push[[L8:[0-9]+]]=, $pop[[L7]], 8, $8{{$}}
259; SIMD128-NEXT: i8x16.replace_lane $push[[L9:[0-9]+]]=, $pop[[L8]], 9, $9{{$}}
260; SIMD128-NEXT: i8x16.replace_lane $push[[L10:[0-9]+]]=, $pop[[L9]], 10, $10{{$}}
261; SIMD128-NEXT: i8x16.replace_lane $push[[L11:[0-9]+]]=, $pop[[L10]], 11, $11{{$}}
262; SIMD128-NEXT: i8x16.replace_lane $push[[L12:[0-9]+]]=, $pop[[L11]], 12, $12{{$}}
263; SIMD128-NEXT: i8x16.replace_lane $push[[L13:[0-9]+]]=, $pop[[L12]], 13, $13{{$}}
264; SIMD128-NEXT: i8x16.replace_lane $push[[L14:[0-9]+]]=, $pop[[L13]], 14, $14{{$}}
265; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $pop[[L14]], 15, $15{{$}}
266; SIMD128-NEXT: return $pop[[R]]{{$}}
267define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3,
268                              i8 %x4, i8 %x5, i8 %x6, i8 %x7,
269                              i8 %x8, i8 %x9, i8 %x10, i8 %x11,
270                              i8 %x12, i8 %x13, i8 %x14, i8 %x15) {
271  %t0 = insertelement <16 x i8> undef, i8 %x0, i32 0
272  %t1 = insertelement <16 x i8> %t0, i8 %x1, i32 1
273  %t2 = insertelement <16 x i8> %t1, i8 %x2, i32 2
274  %t3 = insertelement <16 x i8> %t2, i8 %x3, i32 3
275  %t4 = insertelement <16 x i8> %t3, i8 %x4, i32 4
276  %t5 = insertelement <16 x i8> %t4, i8 %x5, i32 5
277  %t6 = insertelement <16 x i8> %t5, i8 %x6, i32 6
278  %t7 = insertelement <16 x i8> %t6, i8 %x7, i32 7
279  %t8 = insertelement <16 x i8> %t7, i8 %x8, i32 8
280  %t9 = insertelement <16 x i8> %t8, i8 %x9, i32 9
281  %t10 = insertelement <16 x i8> %t9, i8 %x10, i32 10
282  %t11 = insertelement <16 x i8> %t10, i8 %x11, i32 11
283  %t12 = insertelement <16 x i8> %t11, i8 %x12, i32 12
284  %t13 = insertelement <16 x i8> %t12, i8 %x13, i32 13
285  %t14 = insertelement <16 x i8> %t13, i8 %x14, i32 14
286  %res = insertelement <16 x i8> %t14, i8 %x15, i32 15
287  ret <16 x i8> %res
288}
289
290; ==============================================================================
291; 8 x i16
292; ==============================================================================
293; CHECK-LABEL: const_v8i16:
294; NO-SIMD128-NOT: i16x8
295; SIMD128-NEXT: .result v128{{$}}
296; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}}
297; SIMD128-NEXT: return $pop[[R]]{{$}}
298define <8 x i16> @const_v8i16() {
299  ret <8 x i16> <i16 256, i16 770, i16 1284, i16 1798,
300                 i16 2312, i16 2826, i16 3340, i16 3854>
301}
302
303; CHECK-LABEL: splat_v8i16:
304; NO-SIMD128-NOT: i16x8
305; SIMD128-NEXT: .param i32{{$}}
306; SIMD128-NEXT: .result v128{{$}}
307; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}}
308; SIMD128-NEXT: return $pop[[R]]{{$}}
309define <8 x i16> @splat_v8i16(i16 %x) {
310  %v = insertelement <8 x i16> undef, i16 %x, i32 0
311  %res = shufflevector <8 x i16> %v, <8 x i16> undef,
312    <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
313  ret <8 x i16> %res
314}
315
316; CHECK-LABEL: const_splat_v8i16:
317; SIMD128: i16x8.splat
318define <8 x i16> @const_splat_v8i16() {
319  ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
320}
321
322; CHECK-LABEL: extract_v8i16_s:
323; NO-SIMD128-NOT: i16x8
324; SIMD128-NEXT: .param v128{{$}}
325; SIMD128-NEXT: .result i32{{$}}
326; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}}
327; SIMD128-NEXT: return $pop[[R]]{{$}}
328define i32 @extract_v8i16_s(<8 x i16> %v) {
329  %elem = extractelement <8 x i16> %v, i16 5
330  %a = sext i16 %elem to i32
331  ret i32 %a
332}
333
334; CHECK-LABEL: extract_var_v8i16_s:
335; NO-SIMD128-NOT: i16x8
336; SIMD128-NEXT: .param v128, i32{{$}}
337; SIMD128-NEXT: .result i32{{$}}
338; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
339; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
340; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
341; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
342; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
343; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
344; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
345; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
346; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
347; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
348; SIMD128-NEXT: i32.load16_s $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
349; SIMD128-NEXT: return $pop[[R]]{{$}}
350define i32 @extract_var_v8i16_s(<8 x i16> %v, i32 %i) {
351  %elem = extractelement <8 x i16> %v, i32 %i
352  %a = sext i16 %elem to i32
353  ret i32 %a
354}
355
356; CHECK-LABEL: extract_undef_v8i16_s:
357; NO-SIMD128-NOT: i16x8
358; SIMD128-NEXT: .param v128{{$}}
359; SIMD128-NEXT: .result i32{{$}}
360; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
361; SIMD128-NEXT: return $pop[[R]]{{$}}
362define i32 @extract_undef_v8i16_s(<8 x i16> %v) {
363  %elem = extractelement <8 x i16> %v, i16 undef
364  %a = sext i16 %elem to i32
365  ret i32 %a
366}
367
368; CHECK-LABEL: extract_v8i16_u:
369; NO-SIMD128-NOT: i16x8
370; SIMD128-NEXT: .param v128{{$}}
371; SIMD128-NEXT: .result i32{{$}}
372; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
373; SIMD128-NEXT: return $pop[[R]]{{$}}
374define i32 @extract_v8i16_u(<8 x i16> %v) {
375  %elem = extractelement <8 x i16> %v, i16 5
376  %a = zext i16 %elem to i32
377  ret i32 %a
378}
379
380; CHECK-LABEL: extract_var_v8i16_u:
381; NO-SIMD128-NOT: i16x8
382; SIMD128-NEXT: .param v128, i32{{$}}
383; SIMD128-NEXT: .result i32{{$}}
384; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
385; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
386; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
387; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
388; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
389; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
390; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
391; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
392; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
393; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
394; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
395; SIMD128-NEXT: return $pop[[R]]{{$}}
396define i32 @extract_var_v8i16_u(<8 x i16> %v, i32 %i) {
397  %elem = extractelement <8 x i16> %v, i32 %i
398  %a = zext i16 %elem to i32
399  ret i32 %a
400}
401
402; CHECK-LABEL: extract_undef_v8i16_u:
403; NO-SIMD128-NOT: i16x8
404; SIMD128-NEXT: .param v128{{$}}
405; SIMD128-NEXT: .result i32{{$}}
406; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
407; SIMD128-NEXT: return $pop[[R]]{{$}}
408define i32 @extract_undef_v8i16_u(<8 x i16> %v) {
409  %elem = extractelement <8 x i16> %v, i16 undef
410  %a = zext i16 %elem to i32
411  ret i32 %a
412}
413
414; CHECK-LABEL: extract_v8i16:
415; NO-SIMD128-NOT: i16x8
416; SIMD128-NEXT: .param v128{{$}}
417; SIMD128-NEXT: .result i32{{$}}
418; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
419; SIMD128-NEXT: return $pop[[R]]{{$}}
420define i16 @extract_v8i16(<8 x i16> %v) {
421  %elem = extractelement <8 x i16> %v, i16 5
422  ret i16 %elem
423}
424
425; CHECK-LABEL: extract_var_v8i16:
426; NO-SIMD128-NOT: i16x8
427; SIMD128-NEXT: .param v128, i32{{$}}
428; SIMD128-NEXT: .result i32{{$}}
429; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
430; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
431; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
432; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
433; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
434; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
435; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
436; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
437; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
438; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
439; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
440; SIMD128-NEXT: return $pop[[R]]{{$}}
441define i16 @extract_var_v8i16(<8 x i16> %v, i32 %i) {
442  %elem = extractelement <8 x i16> %v, i32 %i
443  ret i16 %elem
444}
445
446; CHECK-LABEL: extract_undef_v8i16:
447; NO-SIMD128-NOT: i16x8
448; SIMD128-NEXT: .param v128{{$}}
449; SIMD128-NEXT: .result i32{{$}}
450; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
451; SIMD128-NEXT: return $pop[[R]]{{$}}
452define i16 @extract_undef_v8i16(<8 x i16> %v) {
453  %elem = extractelement <8 x i16> %v, i16 undef
454  ret i16 %elem
455}
456
457; CHECK-LABEL: replace_v8i16:
458; NO-SIMD128-NOT: i16x8
459; SIMD128-NEXT: .param v128, i32{{$}}
460; SIMD128-NEXT: .result v128{{$}}
461; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}}
462; SIMD128-NEXT: return $pop[[R]]{{$}}
463define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
464  %res = insertelement <8 x i16> %v, i16 %x, i32 7
465  ret <8 x i16> %res
466}
467
468; CHECK-LABEL: replace_var_v8i16:
469; NO-SIMD128-NOT: i16x8
470; SIMD128-NEXT: .param v128, i32, i32{{$}}
471; SIMD128-NEXT: .result v128{{$}}
472; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
473; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
474; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
475; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
476; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
477; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
478; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
479; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
480; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
481; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $3, $pop[[L7]]{{$}}
482; SIMD128-NEXT: i32.store16 0($pop[[L8]]), $2{{$}}
483; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
484; SIMD128-NEXT: return $pop[[R]]{{$}}
485define <8 x i16> @replace_var_v8i16(<8 x i16> %v, i32 %i, i16 %x) {
486  %res = insertelement <8 x i16> %v, i16 %x, i32 %i
487  ret <8 x i16> %res
488}
489
490; CHECK-LABEL: replace_undef_v8i16:
491; NO-SIMD128-NOT: i16x8
492; SIMD128-NEXT: .param v128, i32{{$}}
493; SIMD128-NEXT: .result v128{{$}}
494; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
495; SIMD128-NEXT: return $pop[[R]]{{$}}
496define <8 x i16> @replace_undef_v8i16(<8 x i16> %v, i16 %x) {
497  %res = insertelement <8 x i16> %v, i16 %x, i32 undef
498  ret <8 x i16> %res
499}
500
501; CHECK-LABEL: shuffle_v8i16:
502; NO-SIMD128-NOT: v8x16
503; SIMD128-NEXT: .param v128, v128{{$}}
504; SIMD128-NEXT: .result v128{{$}}
505; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
506; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}}
507; SIMD128-NEXT: return $pop[[R]]{{$}}
508define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) {
509  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
510    <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
511  ret <8 x i16> %res
512}
513
514; CHECK-LABEL: shuffle_undef_v8i16:
515; NO-SIMD128-NOT: v8x16
516; SIMD128-NEXT: .param v128, v128{{$}}
517; SIMD128-NEXT: .result v128{{$}}
518; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
519; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
520; SIMD128-NEXT: return $pop[[R]]{{$}}
521define <8 x i16> @shuffle_undef_v8i16(<8 x i16> %x, <8 x i16> %y) {
522  %res = shufflevector <8 x i16> %x, <8 x i16> %y,
523    <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
524               i32 undef, i32 undef, i32 undef, i32 undef>
525  ret <8 x i16> %res
526}
527
528; CHECK-LABEL: build_v8i16:
529; NO-SIMD128-NOT: i16x8
530; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32{{$}}
531; SIMD128-NEXT: .result v128{{$}}
532; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}}
533; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
534; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
535; SIMD128-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
536; SIMD128-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}}
537; SIMD128-NEXT: i16x8.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}}
538; SIMD128-NEXT: i16x8.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}}
539; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $pop[[L6]], 7, $7{{$}}
540; SIMD128-NEXT: return $pop[[R]]{{$}}
541define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3,
542                              i16 %x4, i16 %x5, i16 %x6, i16 %x7) {
543  %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0
544  %t1 = insertelement <8 x i16> %t0, i16 %x1, i32 1
545  %t2 = insertelement <8 x i16> %t1, i16 %x2, i32 2
546  %t3 = insertelement <8 x i16> %t2, i16 %x3, i32 3
547  %t4 = insertelement <8 x i16> %t3, i16 %x4, i32 4
548  %t5 = insertelement <8 x i16> %t4, i16 %x5, i32 5
549  %t6 = insertelement <8 x i16> %t5, i16 %x6, i32 6
550  %res = insertelement <8 x i16> %t6, i16 %x7, i32 7
551  ret <8 x i16> %res
552}
553
554; ==============================================================================
555; 4 x i32
556; ==============================================================================
557; CHECK-LABEL: const_v4i32:
558; NO-SIMD128-NOT: i32x4
559; SIMD128-NEXT: .result v128{{$}}
560; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}}
561; SIMD128-NEXT: return $pop[[R]]{{$}}
562define <4 x i32> @const_v4i32() {
563  ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084>
564}
565
566; CHECK-LABEL: splat_v4i32:
567; NO-SIMD128-NOT: i32x4
568; SIMD128-NEXT: .param i32{{$}}
569; SIMD128-NEXT: .result v128{{$}}
570; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
571; SIMD128-NEXT: return $pop[[R]]{{$}}
572define <4 x i32> @splat_v4i32(i32 %x) {
573  %v = insertelement <4 x i32> undef, i32 %x, i32 0
574  %res = shufflevector <4 x i32> %v, <4 x i32> undef,
575    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
576  ret <4 x i32> %res
577}
578
579; CHECK-LABEL: const_splat_v4i32:
580; SIMD128: i32x4.splat
581define <4 x i32> @const_splat_v4i32() {
582  ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
583}
584
585; CHECK-LABEL: extract_v4i32:
586; NO-SIMD128-NOT: i32x4
587; SIMD128-NEXT: .param v128{{$}}
588; SIMD128-NEXT: .result i32{{$}}
589; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
590; SIMD128-NEXT: return $pop[[R]]{{$}}
591define i32 @extract_v4i32(<4 x i32> %v) {
592  %elem = extractelement <4 x i32> %v, i32 3
593  ret i32 %elem
594}
595
596; CHECK-LABEL: extract_var_v4i32:
597; NO-SIMD128-NOT: i32x4
598; SIMD128-NEXT: .param v128, i32{{$}}
599; SIMD128-NEXT: .result i32{{$}}
600; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
601; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
602; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
603; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
604; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
605; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
606; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
607; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
608; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
609; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $2, $pop[[L7]]{{$}}
610; SIMD128-NEXT: i32.load $push[[R:[0-9]+]]=, 0($pop[[L4]]){{$}}
611; SIMD128-NEXT: return $pop[[R]]{{$}}
612define i32 @extract_var_v4i32(<4 x i32> %v, i32 %i) {
613  %elem = extractelement <4 x i32> %v, i32 %i
614  ret i32 %elem
615}
616
617; CHECK-LABEL: extract_undef_v4i32:
618; NO-SIMD128-NOT: i32x4
619; SIMD128-NEXT: .param v128{{$}}
620; SIMD128-NEXT: .result i32{{$}}
621; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
622; SIMD128-NEXT: return $pop[[R]]{{$}}
623define i32 @extract_undef_v4i32(<4 x i32> %v) {
624  %elem = extractelement <4 x i32> %v, i32 undef
625  ret i32 %elem
626}
627
628; CHECK-LABEL: replace_v4i32:
629; NO-SIMD128-NOT: i32x4
630; SIMD128-NEXT: .param v128, i32{{$}}
631; SIMD128-NEXT: .result v128{{$}}
632; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
633; SIMD128-NEXT: return $pop[[R]]{{$}}
634define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
635  %res = insertelement <4 x i32> %v, i32 %x, i32 2
636  ret <4 x i32> %res
637}
638
639; CHECK-LABEL: replace_var_v4i32:
640; NO-SIMD128-NOT: i32x4
641; SIMD128-NEXT: .param v128, i32, i32{{$}}
642; SIMD128-NEXT: .result v128{{$}}
643; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
644; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
645; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
646; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
647; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
648; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
649; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
650; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
651; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
652; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $3, $pop[[L7]]{{$}}
653; SIMD128-NEXT: i32.store 0($pop[[L4]]), $2{{$}}
654; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
655; SIMD128-NEXT: return $pop[[R]]{{$}}
656define <4 x i32> @replace_var_v4i32(<4 x i32> %v, i32 %i, i32 %x) {
657  %res = insertelement <4 x i32> %v, i32 %x, i32 %i
658  ret <4 x i32> %res
659}
660
661; CHECK-LABEL: replace_undef_v4i32:
662; NO-SIMD128-NOT: i32x4
663; SIMD128-NEXT: .param v128, i32{{$}}
664; SIMD128-NEXT: .result v128{{$}}
665; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
666; SIMD128-NEXT: return $pop[[R]]{{$}}
667define <4 x i32> @replace_undef_v4i32(<4 x i32> %v, i32 %x) {
668  %res = insertelement <4 x i32> %v, i32 %x, i32 undef
669  ret <4 x i32> %res
670}
671
672; CHECK-LABEL: shuffle_v4i32:
673; NO-SIMD128-NOT: v8x16
674; SIMD128-NEXT: .param v128, v128{{$}}
675; SIMD128-NEXT: .result v128{{$}}
676; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
677; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
678; SIMD128-NEXT: return $pop[[R]]{{$}}
679define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) {
680  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
681    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
682  ret <4 x i32> %res
683}
684
685; CHECK-LABEL: shuffle_undef_v4i32:
686; NO-SIMD128-NOT: v8x16
687; SIMD128-NEXT: .param v128, v128{{$}}
688; SIMD128-NEXT: .result v128{{$}}
689; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
690; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
691; SIMD128-NEXT: return $pop[[R]]{{$}}
692define <4 x i32> @shuffle_undef_v4i32(<4 x i32> %x, <4 x i32> %y) {
693  %res = shufflevector <4 x i32> %x, <4 x i32> %y,
694    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
695  ret <4 x i32> %res
696}
697
698; CHECK-LABEL: build_v4i32:
699; NO-SIMD128-NOT: i32x4
700; SIMD128-NEXT: .param i32, i32, i32, i32{{$}}
701; SIMD128-NEXT: .result v128{{$}}
702; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
703; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
704; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
705; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
706; SIMD128-NEXT: return $pop[[R]]{{$}}
707define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
708  %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0
709  %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1
710  %t2 = insertelement <4 x i32> %t1, i32 %x2, i32 2
711  %res = insertelement <4 x i32> %t2, i32 %x3, i32 3
712  ret <4 x i32> %res
713}
714
715; ==============================================================================
716; 2 x i64
717; ==============================================================================
718; CHECK-LABEL: const_v2i64:
719; NO-SIMD128-NOT: i64x2
720; SIMD128-VM-NOT: i64x2
721; SIMD128-NEXT: .result v128{{$}}
722; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}}
723; SIMD128-NEXT: return $pop[[R]]{{$}}
724define <2 x i64> @const_v2i64() {
725  ret <2 x i64> <i64 506097522914230528, i64 1084818905618843912>
726}
727
728; CHECK-LABEL: splat_v2i64:
729; NO-SIMD128-NOT: i64x2
730; SIMD128-VM-NOT: i64x2
731; SIMD128-NEXT: .param i64{{$}}
732; SIMD128-NEXT: .result v128{{$}}
733; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
734; SIMD128-NEXT: return $pop[[R]]{{$}}
735define <2 x i64> @splat_v2i64(i64 %x) {
736  %t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
737  %res = insertelement <2 x i64> %t1, i64 %x, i32 1
738  ret <2 x i64> %res
739}
740
741; CHECK-LABEL: const_splat_v2i64:
742; SIMD128: i64x2.splat
743define <2 x i64> @const_splat_v2i64() {
744  ret <2 x i64> <i64 42, i64 42>
745}
746
747; CHECK-LABEL: extract_v2i64:
748; NO-SIMD128-NOT: i64x2
749; SIMD128-VM-NOT: i64x2
750; SIMD128-NEXT: .param v128{{$}}
751; SIMD128-NEXT: .result i64{{$}}
752; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
753; SIMD128-NEXT: return $pop[[R]]{{$}}
754define i64 @extract_v2i64(<2 x i64> %v) {
755  %elem = extractelement <2 x i64> %v, i64 1
756  ret i64 %elem
757}
758
759; CHECK-LABEL: extract_var_v2i64:
760; NO-SIMD128-NOT: i64x2
761; SIMD128-NEXT: .param v128, i32{{$}}
762; SIMD128-NEXT: .result i64{{$}}
763; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
764; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
765; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
766; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
767; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
768; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
769; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
770; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
771; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
772; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
773; SIMD128-NEXT: i64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
774; SIMD128-NEXT: return $pop[[R]]{{$}}
775define i64 @extract_var_v2i64(<2 x i64> %v, i32 %i) {
776  %elem = extractelement <2 x i64> %v, i32 %i
777  ret i64 %elem
778}
779
780; CHECK-LABEL: extract_undef_v2i64:
781; NO-SIMD128-NOT: i64x2
782; SIMD128-VM-NOT: i64x2
783; SIMD128-NEXT: .param v128{{$}}
784; SIMD128-NEXT: .result i64{{$}}
785; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
786; SIMD128-NEXT: return $pop[[R]]{{$}}
787define i64 @extract_undef_v2i64(<2 x i64> %v) {
788  %elem = extractelement <2 x i64> %v, i64 undef
789  ret i64 %elem
790}
791
792; CHECK-LABEL: replace_v2i64:
793; NO-SIMD128-NOT: i64x2
794; SIMD128-VM-NOT: i64x2
795; SIMD128-NEXT: .param v128, i64{{$}}
796; SIMD128-NEXT: .result v128{{$}}
797; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
798; SIMD128-NEXT: return $pop[[R]]{{$}}
799define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
800  %res = insertelement <2 x i64> %v, i64 %x, i32 0
801  ret <2 x i64> %res
802}
803
804; CHECK-LABEL: replace_var_v2i64:
805; NO-SIMD128-NOT: i64x2
806; SIMD128-VM-NOT: i64x2
807; SIMD128-NEXT: .param v128, i32, i64{{$}}
808; SIMD128-NEXT: .result v128{{$}}
809; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
810; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
811; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
812; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
813; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
814; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
815; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
816; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
817; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
818; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
819; SIMD128-NEXT: i64.store 0($pop[[L2]]), $2{{$}}
820; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
821; SIMD128-NEXT: return $pop[[R]]{{$}}
822define <2 x i64> @replace_var_v2i64(<2 x i64> %v, i32 %i, i64 %x) {
823  %res = insertelement <2 x i64> %v, i64 %x, i32 %i
824  ret <2 x i64> %res
825}
826
827; CHECK-LABEL: replace_undef_v2i64:
828; NO-SIMD128-NOT: i64x2
829; SIMD128-VM-NOT: i64x2
830; SIMD128-NEXT: .param v128, i64{{$}}
831; SIMD128-NEXT: .result v128{{$}}
832; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
833; SIMD128-NEXT: return $pop[[R]]{{$}}
834define <2 x i64> @replace_undef_v2i64(<2 x i64> %v, i64 %x) {
835  %res = insertelement <2 x i64> %v, i64 %x, i32 undef
836  ret <2 x i64> %res
837}
838
839; CHECK-LABEL: shuffle_v2i64:
840; NO-SIMD128-NOT: v8x16
841; SIMD128-NEXT: .param v128, v128{{$}}
842; SIMD128-NEXT: .result v128{{$}}
843; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
844; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
845; SIMD128-NEXT: return $pop[[R]]{{$}}
846define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) {
847  %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3>
848  ret <2 x i64> %res
849}
850
851; CHECK-LABEL: shuffle_undef_v2i64:
852; NO-SIMD128-NOT: v8x16
853; SIMD128-NEXT: .param v128, v128{{$}}
854; SIMD128-NEXT: .result v128{{$}}
855; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
856; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
857; SIMD128-NEXT: return $pop[[R]]{{$}}
858define <2 x i64> @shuffle_undef_v2i64(<2 x i64> %x, <2 x i64> %y) {
859  %res = shufflevector <2 x i64> %x, <2 x i64> %y,
860    <2 x i32> <i32 1, i32 undef>
861  ret <2 x i64> %res
862}
863
864; CHECK-LABEL: build_v2i64:
865; NO-SIMD128-NOT: i64x2
866; SIMD128-VM-NOT: i64x2
867; SIMD128-NEXT: .param i64, i64{{$}}
868; SIMD128-NEXT: .result v128{{$}}
869; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
870; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
871; SIMD128-NEXT: return $pop[[R]]{{$}}
872define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) {
873  %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0
874  %res = insertelement <2 x i64> %t0, i64 %x1, i32 1
875  ret <2 x i64> %res
876}
877
878; ==============================================================================
879; 4 x f32
880; ==============================================================================
881; CHECK-LABEL: const_v4f32:
882; NO-SIMD128-NOT: f32x4
883; SIMD128-NEXT: .result v128{{$}}
884; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
885; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}}
886; SIMD128-NEXT: return $pop[[R]]{{$}}
887define <4 x float> @const_v4f32() {
888  ret <4 x float> <float 0x3860402000000000, float 0x38e0c0a080000000,
889                   float 0x3961412100000000, float 0x39e1c1a180000000>
890}
891
892; CHECK-LABEL: splat_v4f32:
893; NO-SIMD128-NOT: f32x4
894; SIMD128-NEXT: .param f32{{$}}
895; SIMD128-NEXT: .result v128{{$}}
896; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
897; SIMD128-NEXT: return $pop[[R]]{{$}}
898define <4 x float> @splat_v4f32(float %x) {
899  %v = insertelement <4 x float> undef, float %x, i32 0
900  %res = shufflevector <4 x float> %v, <4 x float> undef,
901    <4 x i32> <i32 0, i32 0, i32 0, i32 0>
902  ret <4 x float> %res
903}
904
905; CHECK-LABEL: const_splat_v4f32
906; SIMD128: f32x4.splat
907define <4 x float> @const_splat_v4f32() {
908  ret <4 x float> <float 42., float 42., float 42., float 42.>
909}
910
911; CHECK-LABEL: extract_v4f32:
912; NO-SIMD128-NOT: f32x4
913; SIMD128-NEXT: .param v128{{$}}
914; SIMD128-NEXT: .result f32{{$}}
915; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
916; SIMD128-NEXT: return $pop[[R]]{{$}}
917define float @extract_v4f32(<4 x float> %v) {
918  %elem = extractelement <4 x float> %v, i32 3
919  ret float %elem
920}
921
922; CHECK-LABEL: extract_var_v4f32:
923; NO-SIMD128-NOT: i64x2
924; SIMD128-NEXT: .param v128, i32{{$}}
925; SIMD128-NEXT: .result f32{{$}}
926; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
927; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
928; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
929; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
930; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
931; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
932; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
933; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
934; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
935; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
936; SIMD128-NEXT: f32.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
937; SIMD128-NEXT: return $pop[[R]]{{$}}
938define float @extract_var_v4f32(<4 x float> %v, i32 %i) {
939  %elem = extractelement <4 x float> %v, i32 %i
940  ret float %elem
941}
942
943; CHECK-LABEL: extract_undef_v4f32:
944; NO-SIMD128-NOT: f32x4
945; SIMD128-NEXT: .param v128{{$}}
946; SIMD128-NEXT: .result f32{{$}}
947; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
948; SIMD128-NEXT: return $pop[[R]]{{$}}
949define float @extract_undef_v4f32(<4 x float> %v) {
950  %elem = extractelement <4 x float> %v, i32 undef
951  ret float %elem
952}
953
954; CHECK-LABEL: replace_v4f32:
955; NO-SIMD128-NOT: f32x4
956; SIMD128-NEXT: .param v128, f32{{$}}
957; SIMD128-NEXT: .result v128{{$}}
958; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
959; SIMD128-NEXT: return $pop[[R]]{{$}}
960define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
961  %res = insertelement <4 x float> %v, float %x, i32 2
962  ret <4 x float> %res
963}
964
965; CHECK-LABEL: replace_var_v4f32:
966; NO-SIMD128-NOT: f32x4
967; SIMD128-NEXT: .param v128, i32, f32{{$}}
968; SIMD128-NEXT: .result v128{{$}}
969; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
970; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
971; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
972; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
973; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
974; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
975; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
976; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
977; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
978; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
979; SIMD128-NEXT: f32.store 0($pop[[L2]]), $2{{$}}
980; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
981; SIMD128-NEXT: return $pop[[R]]{{$}}
982define <4 x float> @replace_var_v4f32(<4 x float> %v, i32 %i, float %x) {
983  %res = insertelement <4 x float> %v, float %x, i32 %i
984  ret <4 x float> %res
985}
986
987; CHECK-LABEL: replace_undef_v4f32:
988; NO-SIMD128-NOT: f32x4
989; SIMD128-NEXT: .param v128, f32{{$}}
990; SIMD128-NEXT: .result v128{{$}}
991; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
992; SIMD128-NEXT: return $pop[[R]]{{$}}
993define <4 x float> @replace_undef_v4f32(<4 x float> %v, float %x) {
994  %res = insertelement <4 x float> %v, float %x, i32 undef
995  ret <4 x float> %res
996}
997
998; CHECK-LABEL: shuffle_v4f32:
999; NO-SIMD128-NOT: v8x16
1000; SIMD128-NEXT: .param v128, v128{{$}}
1001; SIMD128-NEXT: .result v128{{$}}
1002; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
1003; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
1004; SIMD128-NEXT: return $pop[[R]]{{$}}
1005define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) {
1006  %res = shufflevector <4 x float> %x, <4 x float> %y,
1007    <4 x i32> <i32 0, i32 5, i32 2, i32 7>
1008  ret <4 x float> %res
1009}
1010
1011; CHECK-LABEL: shuffle_undef_v4f32:
1012; NO-SIMD128-NOT: v8x16
1013; SIMD128-NEXT: .param v128, v128{{$}}
1014; SIMD128-NEXT: .result v128{{$}}
1015; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
1016; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
1017; SIMD128-NEXT: return $pop[[R]]{{$}}
1018define <4 x float> @shuffle_undef_v4f32(<4 x float> %x, <4 x float> %y) {
1019  %res = shufflevector <4 x float> %x, <4 x float> %y,
1020    <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
1021  ret <4 x float> %res
1022}
1023
1024; CHECK-LABEL: build_v4f32:
1025; NO-SIMD128-NOT: f32x4
1026; SIMD128-NEXT: .param f32, f32, f32, f32{{$}}
1027; SIMD128-NEXT: .result v128{{$}}
1028; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
1029; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
1030; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
1031; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}}
1032; SIMD128-NEXT: return $pop[[R]]{{$}}
1033define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) {
1034  %t0 = insertelement <4 x float> undef, float %x0, i32 0
1035  %t1 = insertelement <4 x float> %t0, float %x1, i32 1
1036  %t2 = insertelement <4 x float> %t1, float %x2, i32 2
1037  %res = insertelement <4 x float> %t2, float %x3, i32 3
1038  ret <4 x float> %res
1039}
1040
1041; ==============================================================================
1042; 2 x f64
1043; ==============================================================================
1044; CHECK-LABEL: const_v2f64:
1045; NO-SIMD128-NOT: f64x2
1046; SIMD128-NEXT: .result v128{{$}}
1047; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}}
1048; SIMD128-NEXT: return $pop[[R]]{{$}}
1049define <2 x double> @const_v2f64() {
1050  ret <2 x double> <double 0x0706050403020100, double 0x0F0E0D0C0B0A0908>
1051}
1052
1053; CHECK-LABEL: splat_v2f64:
1054; NO-SIMD128-NOT: f64x2
1055; SIMD128-VM-NOT: f64x2
1056; SIMD128-NEXT: .param f64{{$}}
1057; SIMD128-NEXT: .result v128{{$}}
1058; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
1059; SIMD128-NEXT: return $pop[[R]]{{$}}
1060define <2 x double> @splat_v2f64(double %x) {
1061  %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0
1062  %res = insertelement <2 x double> %t1, double %x, i32 1
1063  ret <2 x double> %res
1064}
1065
1066; CHECK-LABEL: const_splat_v2f64:
1067; SIMD128: f64x2.splat
1068define <2 x double> @const_splat_v2f64() {
1069  ret <2 x double> <double 42., double 42.>
1070}
1071
1072; CHECK-LABEL: extract_v2f64:
1073; NO-SIMD128-NOT: f64x2
1074; SIMD128-VM-NOT: f64x2
1075; SIMD128-NEXT: .param v128{{$}}
1076; SIMD128-NEXT: .result f64{{$}}
1077; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
1078; SIMD128-NEXT: return $pop[[R]]{{$}}
1079define double @extract_v2f64(<2 x double> %v) {
1080  %elem = extractelement <2 x double> %v, i32 1
1081  ret double %elem
1082}
1083
1084; CHECK-LABEL: extract_var_v2f64:
1085; NO-SIMD128-NOT: i62x2
1086; SIMD128-NEXT: .param v128, i32{{$}}
1087; SIMD128-NEXT: .result f64{{$}}
1088; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
1089; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
1090; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
1091; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
1092; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
1093; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
1094; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
1095; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
1096; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
1097; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
1098; SIMD128-NEXT: f64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
1099; SIMD128-NEXT: return $pop[[R]]{{$}}
1100define double @extract_var_v2f64(<2 x double> %v, i32 %i) {
1101  %elem = extractelement <2 x double> %v, i32 %i
1102  ret double %elem
1103}
1104
1105; CHECK-LABEL: extract_undef_v2f64:
1106; NO-SIMD128-NOT: f64x2
1107; SIMD128-VM-NOT: f64x2
1108; SIMD128-NEXT: .param v128{{$}}
1109; SIMD128-NEXT: .result f64{{$}}
1110; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
1111; SIMD128-NEXT: return $pop[[R]]{{$}}
1112define double @extract_undef_v2f64(<2 x double> %v) {
1113  %elem = extractelement <2 x double> %v, i32 undef
1114  ret double %elem
1115}
1116
1117; CHECK-LABEL: replace_v2f64:
1118; NO-SIMD128-NOT: f64x2
1119; SIMD128-VM-NOT: f64x2
1120; SIMD128-NEXT: .param v128, f64{{$}}
1121; SIMD128-NEXT: .result v128{{$}}
1122; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
1123; SIMD128-NEXT: return $pop[[R]]{{$}}
1124define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
1125  %res = insertelement <2 x double> %v, double %x, i32 0
1126  ret <2 x double> %res
1127}
1128
1129; CHECK-LABEL: replace_var_v2f64:
1130; NO-SIMD128-NOT: f64x2
1131; SIMD128-VM-NOT: f64x2
1132; SIMD128-NEXT: .param v128, i32, f64{{$}}
1133; SIMD128-NEXT: .result v128{{$}}
1134; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
1135; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
1136; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
1137; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
1138; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
1139; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
1140; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
1141; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
1142; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
1143; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
1144; SIMD128-NEXT: f64.store 0($pop[[L2]]), $2{{$}}
1145; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
1146; SIMD128-NEXT: return $pop[[R]]{{$}}
1147define <2 x double> @replace_var_v2f64(<2 x double> %v, i32 %i, double %x) {
1148  %res = insertelement <2 x double> %v, double %x, i32 %i
1149  ret <2 x double> %res
1150}
1151
1152; CHECK-LABEL: replace_undef_v2f64:
1153; NO-SIMD128-NOT: f64x2
1154; SIMD128-VM-NOT: f64x2
1155; SIMD128-NEXT: .param v128, f64{{$}}
1156; SIMD128-NEXT: .result v128{{$}}
1157; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
1158; SIMD128-NEXT: return $pop[[R]]{{$}}
1159define <2 x double> @replace_undef_v2f64(<2 x double> %v, double %x) {
1160  %res = insertelement <2 x double> %v, double %x, i32 undef
1161  ret <2 x double> %res
1162}
1163
1164; CHECK-LABEL: shuffle_v2f64:
1165; NO-SIMD128-NOT: v8x16
1166; SIMD128-NEXT: .param v128, v128{{$}}
1167; SIMD128-NEXT: .result v128{{$}}
1168; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
1169; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
1170; SIMD128-NEXT: return $pop[[R]]{{$}}
1171define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) {
1172  %res = shufflevector <2 x double> %x, <2 x double> %y,
1173    <2 x i32> <i32 0, i32 3>
1174  ret <2 x double> %res
1175}
1176
1177; CHECK-LABEL: shuffle_undef_v2f64:
1178; NO-SIMD128-NOT: v8x16
1179; SIMD128-NEXT: .param v128, v128{{$}}
1180; SIMD128-NEXT: .result v128{{$}}
1181; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
1182; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
1183; SIMD128-NEXT: return $pop[[R]]{{$}}
1184define <2 x double> @shuffle_undef_v2f64(<2 x double> %x, <2 x double> %y) {
1185  %res = shufflevector <2 x double> %x, <2 x double> %y,
1186    <2 x i32> <i32 1, i32 undef>
1187  ret <2 x double> %res
1188}
1189
1190; CHECK-LABEL: build_v2f64:
1191; NO-SIMD128-NOT: f64x2
1192; SIMD128-VM-NOT: f64x2
1193; SIMD128-NEXT: .param f64, f64{{$}}
1194; SIMD128-NEXT: .result v128{{$}}
1195; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
1196; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
1197; SIMD128-NEXT: return $pop[[R]]{{$}}
1198define <2 x double> @build_v2f64(double %x0, double %x1) {
1199  %t0 = insertelement <2 x double> undef, double %x0, i32 0
1200  %res = insertelement <2 x double> %t0, double %x1, i32 1
1201  ret <2 x double> %res
1202}
1203